linux/drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h
<<
>>
Prefs
   1/*
   2 *
   3 * Copyright (C) 2016 Advanced Micro Devices, Inc.
   4 *
   5 * Permission is hereby granted, free of charge, to any person obtaining a
   6 * copy of this software and associated documentation files (the "Software"),
   7 * to deal in the Software without restriction, including without limitation
   8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9 * and/or sell copies of the Software, and to permit persons to whom the
  10 * Software is furnished to do so, subject to the following conditions:
  11 *
  12 * The above copyright notice and this permission notice shall be included
  13 * in all copies or substantial portions of the Software.
  14 *
  15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  16 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
  19 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  21 */
  22
  23#ifndef SMU_6_0_D_H
  24#define SMU_6_0_D_H
  25
  26#define ixLCAC_MC0_CNTL 0x011C
  27#define ixLCAC_MC0_OVR_SEL 0x011D
  28#define ixLCAC_MC0_OVR_VAL 0x011E
  29#define ixLCAC_MC1_CNTL 0x011F
  30#define ixLCAC_MC1_OVR_SEL 0x0120
  31#define ixLCAC_MC1_OVR_VAL 0x0121
  32#define ixLCAC_MC2_CNTL 0x0122
  33#define ixLCAC_MC2_OVR_SEL 0x0123
  34#define ixLCAC_MC2_OVR_VAL 0x0124
  35#define ixLCAC_MC3_CNTL 0x0125
  36#define ixLCAC_MC3_OVR_SEL 0x0126
  37#define ixLCAC_MC3_OVR_VAL 0x0127
  38#define ixLCAC_MC4_CNTL 0x0128
  39#define ixLCAC_MC4_OVR_SEL 0x0129
  40#define ixLCAC_MC4_OVR_VAL 0x012A
  41#define ixLCAC_MC5_CNTL 0x012B
  42#define ixLCAC_MC5_OVR_SEL 0x012C
  43#define ixLCAC_MC5_OVR_VAL 0x012D
  44#define ixSMC_PC_C 0x80000370
  45#define ixTHM_TMON0_DEBUG 0x03F0
  46#define ixTHM_TMON0_INT_DATA 0x0380
  47#define ixTHM_TMON0_RDIL0_DATA 0x0300
  48#define ixTHM_TMON0_RDIL10_DATA 0x030A
  49#define ixTHM_TMON0_RDIL11_DATA 0x030B
  50#define ixTHM_TMON0_RDIL12_DATA 0x030C
  51#define ixTHM_TMON0_RDIL13_DATA 0x030D
  52#define ixTHM_TMON0_RDIL14_DATA 0x030E
  53#define ixTHM_TMON0_RDIL15_DATA 0x030F
  54#define ixTHM_TMON0_RDIL1_DATA 0x0301
  55#define ixTHM_TMON0_RDIL2_DATA 0x0302
  56#define ixTHM_TMON0_RDIL3_DATA 0x0303
  57#define ixTHM_TMON0_RDIL4_DATA 0x0304
  58#define ixTHM_TMON0_RDIL5_DATA 0x0305
  59#define ixTHM_TMON0_RDIL6_DATA 0x0306
  60#define ixTHM_TMON0_RDIL7_DATA 0x0307
  61#define ixTHM_TMON0_RDIL8_DATA 0x0308
  62#define ixTHM_TMON0_RDIL9_DATA 0x0309
  63#define ixTHM_TMON0_RDIR0_DATA 0x0310
  64#define ixTHM_TMON0_RDIR10_DATA 0x031A
  65#define ixTHM_TMON0_RDIR11_DATA 0x031B
  66#define ixTHM_TMON0_RDIR12_DATA 0x031C
  67#define ixTHM_TMON0_RDIR13_DATA 0x031D
  68#define ixTHM_TMON0_RDIR14_DATA 0x031E
  69#define ixTHM_TMON0_RDIR15_DATA 0x031F
  70#define ixTHM_TMON0_RDIR1_DATA 0x0311
  71#define ixTHM_TMON0_RDIR2_DATA 0x0312
  72#define ixTHM_TMON0_RDIR3_DATA 0x0313
  73#define ixTHM_TMON0_RDIR4_DATA 0x0314
  74#define ixTHM_TMON0_RDIR5_DATA 0x0315
  75#define ixTHM_TMON0_RDIR6_DATA 0x0316
  76#define ixTHM_TMON0_RDIR7_DATA 0x0317
  77#define ixTHM_TMON0_RDIR8_DATA 0x0318
  78#define ixTHM_TMON0_RDIR9_DATA 0x0319
  79#define ixTHM_TMON1_DEBUG 0x03F1
  80#define ixTHM_TMON1_INT_DATA 0x0381
  81#define ixTHM_TMON1_RDIL0_DATA 0x0320
  82#define ixTHM_TMON1_RDIL10_DATA 0x032A
  83#define ixTHM_TMON1_RDIL11_DATA 0x032B
  84#define ixTHM_TMON1_RDIL12_DATA 0x032C
  85#define ixTHM_TMON1_RDIL13_DATA 0x032D
  86#define ixTHM_TMON1_RDIL14_DATA 0x032E
  87#define ixTHM_TMON1_RDIL15_DATA 0x032F
  88#define ixTHM_TMON1_RDIL1_DATA 0x0321
  89#define ixTHM_TMON1_RDIL2_DATA 0x0322
  90#define ixTHM_TMON1_RDIL3_DATA 0x0323
  91#define ixTHM_TMON1_RDIL4_DATA 0x0324
  92#define ixTHM_TMON1_RDIL5_DATA 0x0325
  93#define ixTHM_TMON1_RDIL6_DATA 0x0326
  94#define ixTHM_TMON1_RDIL7_DATA 0x0327
  95#define ixTHM_TMON1_RDIL8_DATA 0x0328
  96#define ixTHM_TMON1_RDIL9_DATA 0x0329
  97#define ixTHM_TMON1_RDIR0_DATA 0x0330
  98#define ixTHM_TMON1_RDIR10_DATA 0x033A
  99#define ixTHM_TMON1_RDIR11_DATA 0x033B
 100#define ixTHM_TMON1_RDIR12_DATA 0x033C
 101#define ixTHM_TMON1_RDIR13_DATA 0x033D
 102#define ixTHM_TMON1_RDIR14_DATA 0x033E
 103#define ixTHM_TMON1_RDIR15_DATA 0x033F
 104#define ixTHM_TMON1_RDIR1_DATA 0x0331
 105#define ixTHM_TMON1_RDIR2_DATA 0x0332
 106#define ixTHM_TMON1_RDIR3_DATA 0x0333
 107#define ixTHM_TMON1_RDIR4_DATA 0x0334
 108#define ixTHM_TMON1_RDIR5_DATA 0x0335
 109#define ixTHM_TMON1_RDIR6_DATA 0x0336
 110#define ixTHM_TMON1_RDIR7_DATA 0x0337
 111#define ixTHM_TMON1_RDIR8_DATA 0x0338
 112#define ixTHM_TMON1_RDIR9_DATA 0x0339
 113#define mmGPIOPAD_A 0x05E7
 114#define mmGPIOPAD_EN 0x05E8
 115#define mmGPIOPAD_EXTERN_TRIG_CNTL 0x05F1
 116#define mmGPIOPAD_INT_EN 0x05EE
 117#define mmGPIOPAD_INT_POLARITY 0x05F0
 118#define mmGPIOPAD_INT_STAT 0x05EC
 119#define mmGPIOPAD_INT_STAT_AK 0x05ED
 120#define mmGPIOPAD_INT_STAT_EN 0x05EB
 121#define mmGPIOPAD_INT_TYPE 0x05EF
 122#define mmGPIOPAD_MASK 0x05E6
 123#define mmGPIOPAD_PD_EN 0x05F4
 124#define mmGPIOPAD_PINSTRAPS 0x05EA
 125#define mmGPIOPAD_PU_EN 0x05F3
 126#define mmGPIOPAD_RCVR_SEL 0x05F2
 127#define mmGPIOPAD_STRENGTH 0x05E5
 128#define mmGPIOPAD_SW_INT_STAT 0x05E4
 129#define mmGPIOPAD_Y 0x05E9
 130#define mmSMC_IND_ACCESS_CNTL 0x008A
 131#define mmSMC_IND_DATA_0 0x0081
 132#define mmSMC_IND_DATA 0x0081
 133#define mmSMC_IND_DATA_1 0x0083
 134#define mmSMC_IND_DATA_2 0x0085
 135#define mmSMC_IND_DATA_3 0x0087
 136#define mmSMC_IND_INDEX_0 0x0080
 137#define mmSMC_IND_INDEX 0x0080
 138#define mmSMC_IND_INDEX_1 0x0082
 139#define mmSMC_IND_INDEX_2 0x0084
 140#define mmSMC_IND_INDEX_3 0x0086
 141#define mmSMC_MESSAGE_0 0x008B
 142#define mmSMC_MESSAGE_1 0x008D
 143#define mmSMC_MESSAGE_2 0x008F
 144#define mmSMC_RESP_0 0x008C
 145#define mmSMC_RESP_1 0x008E
 146#define mmSMC_RESP_2 0x0090
 147
 148#endif
 149