linux/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h
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   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 * (C) COPYRIGHT 2018 ARM Limited. All rights reserved.
   4 * Author: James.Qian.Wang <james.qian.wang@arm.com>
   5 *
   6 */
   7#ifndef _KOMEDA_PIPELINE_H_
   8#define _KOMEDA_PIPELINE_H_
   9
  10#include <linux/types.h>
  11#include <drm/drm_atomic.h>
  12#include <drm/drm_atomic_helper.h>
  13#include "malidp_utils.h"
  14
  15#define KOMEDA_MAX_PIPELINES            2
  16#define KOMEDA_PIPELINE_MAX_LAYERS      4
  17#define KOMEDA_PIPELINE_MAX_SCALERS     2
  18#define KOMEDA_COMPONENT_N_INPUTS       5
  19
  20/* pipeline component IDs */
  21enum {
  22        KOMEDA_COMPONENT_LAYER0         = 0,
  23        KOMEDA_COMPONENT_LAYER1         = 1,
  24        KOMEDA_COMPONENT_LAYER2         = 2,
  25        KOMEDA_COMPONENT_LAYER3         = 3,
  26        KOMEDA_COMPONENT_WB_LAYER       = 7, /* write back layer */
  27        KOMEDA_COMPONENT_SCALER0        = 8,
  28        KOMEDA_COMPONENT_SCALER1        = 9,
  29        KOMEDA_COMPONENT_SPLITTER       = 12,
  30        KOMEDA_COMPONENT_MERGER         = 14,
  31        KOMEDA_COMPONENT_COMPIZ0        = 16, /* compositor */
  32        KOMEDA_COMPONENT_COMPIZ1        = 17,
  33        KOMEDA_COMPONENT_IPS0           = 20, /* post image processor */
  34        KOMEDA_COMPONENT_IPS1           = 21,
  35        KOMEDA_COMPONENT_TIMING_CTRLR   = 22, /* timing controller */
  36};
  37
  38#define KOMEDA_PIPELINE_LAYERS          (BIT(KOMEDA_COMPONENT_LAYER0) |\
  39                                         BIT(KOMEDA_COMPONENT_LAYER1) |\
  40                                         BIT(KOMEDA_COMPONENT_LAYER2) |\
  41                                         BIT(KOMEDA_COMPONENT_LAYER3))
  42
  43#define KOMEDA_PIPELINE_SCALERS         (BIT(KOMEDA_COMPONENT_SCALER0) |\
  44                                         BIT(KOMEDA_COMPONENT_SCALER1))
  45
  46#define KOMEDA_PIPELINE_COMPIZS         (BIT(KOMEDA_COMPONENT_COMPIZ0) |\
  47                                         BIT(KOMEDA_COMPONENT_COMPIZ1))
  48
  49#define KOMEDA_PIPELINE_IMPROCS         (BIT(KOMEDA_COMPONENT_IPS0) |\
  50                                         BIT(KOMEDA_COMPONENT_IPS1))
  51struct komeda_component;
  52struct komeda_component_state;
  53
  54/** komeda_component_funcs - component control functions */
  55struct komeda_component_funcs {
  56        /** @validate: optional,
  57         * component may has special requirements or limitations, this function
  58         * supply HW the ability to do the further HW specific check.
  59         */
  60        int (*validate)(struct komeda_component *c,
  61                        struct komeda_component_state *state);
  62        /** @update: update is a active update */
  63        void (*update)(struct komeda_component *c,
  64                       struct komeda_component_state *state);
  65        /** @disable: disable component */
  66        void (*disable)(struct komeda_component *c);
  67        /** @dump_register: Optional, dump registers to seq_file */
  68        void (*dump_register)(struct komeda_component *c, struct seq_file *seq);
  69};
  70
  71/**
  72 * struct komeda_component
  73 *
  74 * struct komeda_component describe the data flow capabilities for how to link a
  75 * component into the display pipeline.
  76 * all specified components are subclass of this structure.
  77 */
  78struct komeda_component {
  79        /** @obj: treat component as private obj */
  80        struct drm_private_obj obj;
  81        /** @pipeline: the komeda pipeline this component belongs to */
  82        struct komeda_pipeline *pipeline;
  83        /** @name: component name */
  84        char name[32];
  85        /**
  86         * @reg:
  87         * component register base,
  88         * which is initialized by chip and used by chip only
  89         */
  90        u32 __iomem *reg;
  91        /** @id: component id */
  92        u32 id;
  93        /**
  94         * @hw_id: component hw id,
  95         * which is initialized by chip and used by chip only
  96         */
  97        u32 hw_id;
  98
  99        /**
 100         * @max_active_inputs:
 101         * @max_active_outputs:
 102         *
 103         * maximum number of inputs/outputs that can be active at the same time
 104         * Note:
 105         * the number isn't the bit number of @supported_inputs or
 106         * @supported_outputs, but may be less than it, since component may not
 107         * support enabling all @supported_inputs/outputs at the same time.
 108         */
 109        u8 max_active_inputs;
 110        /** @max_active_outputs: maximum number of outputs */
 111        u8 max_active_outputs;
 112        /**
 113         * @supported_inputs:
 114         * @supported_outputs:
 115         *
 116         * bitmask of BIT(component->id) for the supported inputs/outputs,
 117         * describes the possibilities of how a component is linked into a
 118         * pipeline.
 119         */
 120        u32 supported_inputs;
 121        /** @supported_outputs: bitmask of supported output componenet ids */
 122        u32 supported_outputs;
 123
 124        /**
 125         * @funcs: chip functions to access HW
 126         */
 127        const struct komeda_component_funcs *funcs;
 128};
 129
 130/**
 131 * struct komeda_component_output
 132 *
 133 * a component has multiple outputs, if want to know where the data
 134 * comes from, only know the component is not enough, we still need to know
 135 * its output port
 136 */
 137struct komeda_component_output {
 138        /** @component: indicate which component the data comes from */
 139        struct komeda_component *component;
 140        /**
 141         * @output_port:
 142         * the output port of the &komeda_component_output.component
 143         */
 144        u8 output_port;
 145};
 146
 147/**
 148 * struct komeda_component_state
 149 *
 150 * component_state is the data flow configuration of the component, and it's
 151 * the superclass of all specific component_state like @komeda_layer_state,
 152 * @komeda_scaler_state
 153 */
 154struct komeda_component_state {
 155        /** @obj: tracking component_state by drm_atomic_state */
 156        struct drm_private_state obj;
 157        /** @component: backpointer to the component */
 158        struct komeda_component *component;
 159        /**
 160         * @binding_user:
 161         * currently bound user, the user can be @crtc, @plane or @wb_conn,
 162         * which is valid decided by @component and @inputs
 163         *
 164         * -  Layer: its user always is plane.
 165         * -  compiz/improc/timing_ctrlr: the user is crtc.
 166         * -  wb_layer: wb_conn;
 167         * -  scaler: plane when input is layer, wb_conn if input is compiz.
 168         */
 169        union {
 170                /** @crtc: backpointer for user crtc */
 171                struct drm_crtc *crtc;
 172                /** @plane: backpointer for user plane */
 173                struct drm_plane *plane;
 174                /** @wb_conn: backpointer for user wb_connector  */
 175                struct drm_connector *wb_conn;
 176                void *binding_user;
 177        };
 178
 179        /**
 180         * @active_inputs:
 181         *
 182         * active_inputs is bitmask of @inputs index
 183         *
 184         * -  active_inputs = changed_active_inputs | unchanged_active_inputs
 185         * -  affected_inputs = old->active_inputs | new->active_inputs;
 186         * -  disabling_inputs = affected_inputs ^ active_inputs;
 187         * -  changed_inputs = disabling_inputs | changed_active_inputs;
 188         *
 189         * NOTE:
 190         * changed_inputs doesn't include all active_input but only
 191         * @changed_active_inputs, and this bitmask can be used in chip
 192         * level for dirty update.
 193         */
 194        u16 active_inputs;
 195        /** @changed_active_inputs: bitmask of the changed @active_inputs */
 196        u16 changed_active_inputs;
 197        /** @affected_inputs: bitmask for affected @inputs */
 198        u16 affected_inputs;
 199        /**
 200         * @inputs:
 201         *
 202         * the specific inputs[i] only valid on BIT(i) has been set in
 203         * @active_inputs, if not the inputs[i] is undefined.
 204         */
 205        struct komeda_component_output inputs[KOMEDA_COMPONENT_N_INPUTS];
 206};
 207
 208static inline u16 component_disabling_inputs(struct komeda_component_state *st)
 209{
 210        return st->affected_inputs ^ st->active_inputs;
 211}
 212
 213static inline u16 component_changed_inputs(struct komeda_component_state *st)
 214{
 215        return component_disabling_inputs(st) | st->changed_active_inputs;
 216}
 217
 218#define for_each_changed_input(st, i)   \
 219        for ((i) = 0; (i) < (st)->component->max_active_inputs; (i)++)  \
 220                if (has_bit((i), component_changed_inputs(st)))
 221
 222#define to_comp(__c)    (((__c) == NULL) ? NULL : &((__c)->base))
 223#define to_cpos(__c)    ((struct komeda_component **)&(__c))
 224
 225struct komeda_layer {
 226        struct komeda_component base;
 227        /* accepted h/v input range before rotation */
 228        struct malidp_range hsize_in, vsize_in;
 229        u32 layer_type; /* RICH, SIMPLE or WB */
 230        u32 supported_rots;
 231        /* komeda supports layer split which splits a whole image to two parts
 232         * left and right and handle them by two individual layer processors
 233         * Note: left/right are always according to the final display rect,
 234         * not the source buffer.
 235         */
 236        struct komeda_layer *right;
 237};
 238
 239struct komeda_layer_state {
 240        struct komeda_component_state base;
 241        /* layer specific configuration state */
 242        u16 hsize, vsize;
 243        u32 rot;
 244        u16 afbc_crop_l;
 245        u16 afbc_crop_r;
 246        u16 afbc_crop_t;
 247        u16 afbc_crop_b;
 248        dma_addr_t addr[3];
 249};
 250
 251struct komeda_scaler {
 252        struct komeda_component base;
 253        struct malidp_range hsize, vsize;
 254        u32 max_upscaling;
 255        u32 max_downscaling;
 256        u8 scaling_split_overlap; /* split overlap for scaling */
 257        u8 enh_split_overlap; /* split overlap for image enhancement */
 258};
 259
 260struct komeda_scaler_state {
 261        struct komeda_component_state base;
 262        u16 hsize_in, vsize_in;
 263        u16 hsize_out, vsize_out;
 264        u16 total_hsize_in, total_vsize_in;
 265        u16 total_hsize_out; /* total_xxxx are size before split */
 266        u16 left_crop, right_crop;
 267        u8 en_scaling : 1,
 268           en_alpha : 1, /* enable alpha processing */
 269           en_img_enhancement : 1,
 270           en_split : 1,
 271           right_part : 1; /* right part of split image */
 272};
 273
 274struct komeda_compiz {
 275        struct komeda_component base;
 276        struct malidp_range hsize, vsize;
 277};
 278
 279struct komeda_compiz_input_cfg {
 280        u16 hsize, vsize;
 281        u16 hoffset, voffset;
 282        u8 pixel_blend_mode, layer_alpha;
 283};
 284
 285struct komeda_compiz_state {
 286        struct komeda_component_state base;
 287        /* composition size */
 288        u16 hsize, vsize;
 289        struct komeda_compiz_input_cfg cins[KOMEDA_COMPONENT_N_INPUTS];
 290};
 291
 292struct komeda_merger {
 293        struct komeda_component base;
 294        struct malidp_range hsize_merged;
 295        struct malidp_range vsize_merged;
 296};
 297
 298struct komeda_merger_state {
 299        struct komeda_component_state base;
 300        u16 hsize_merged;
 301        u16 vsize_merged;
 302};
 303
 304struct komeda_splitter {
 305        struct komeda_component base;
 306        struct malidp_range hsize, vsize;
 307};
 308
 309struct komeda_splitter_state {
 310        struct komeda_component_state base;
 311        u16 hsize, vsize;
 312        u16 overlap;
 313};
 314
 315struct komeda_improc {
 316        struct komeda_component base;
 317        u32 supported_color_formats;  /* DRM_RGB/YUV444/YUV420*/
 318        u32 supported_color_depths; /* BIT(8) | BIT(10)*/
 319        u8 supports_degamma : 1;
 320        u8 supports_csc : 1;
 321        u8 supports_gamma : 1;
 322};
 323
 324struct komeda_improc_state {
 325        struct komeda_component_state base;
 326        u16 hsize, vsize;
 327};
 328
 329/* display timing controller */
 330struct komeda_timing_ctrlr {
 331        struct komeda_component base;
 332        u8 supports_dual_link : 1;
 333};
 334
 335struct komeda_timing_ctrlr_state {
 336        struct komeda_component_state base;
 337};
 338
 339/* Why define A separated structure but not use plane_state directly ?
 340 * 1. Komeda supports layer_split which means a plane_state can be split and
 341 *    handled by two layers, one layer only handle half of plane image.
 342 * 2. Fix up the user properties according to HW's capabilities, like user
 343 *    set rotation to R180, but HW only supports REFLECT_X+Y. the rot here is
 344 *    after drm_rotation_simplify()
 345 */
 346struct komeda_data_flow_cfg {
 347        struct komeda_component_output input;
 348        u16 in_x, in_y, in_w, in_h;
 349        u32 out_x, out_y, out_w, out_h;
 350        u16 total_in_h, total_in_w;
 351        u16 total_out_w;
 352        u16 left_crop, right_crop, overlap;
 353        u32 rot;
 354        int blending_zorder;
 355        u8 pixel_blend_mode, layer_alpha;
 356        u8 en_scaling : 1,
 357           en_img_enhancement : 1,
 358           en_split : 1,
 359           is_yuv : 1,
 360           right_part : 1; /* right part of display image if split enabled */
 361};
 362
 363struct komeda_pipeline_funcs {
 364        /* check if the aclk (main engine clock) can satisfy the clock
 365         * requirements of the downscaling that specified by dflow
 366         */
 367        int (*downscaling_clk_check)(struct komeda_pipeline *pipe,
 368                                     struct drm_display_mode *mode,
 369                                     unsigned long aclk_rate,
 370                                     struct komeda_data_flow_cfg *dflow);
 371        /* dump_register: Optional, dump registers to seq_file */
 372        void (*dump_register)(struct komeda_pipeline *pipe,
 373                              struct seq_file *sf);
 374};
 375
 376/**
 377 * struct komeda_pipeline
 378 *
 379 * Represent a complete display pipeline and hold all functional components.
 380 */
 381struct komeda_pipeline {
 382        /** @obj: link pipeline as private obj of drm_atomic_state */
 383        struct drm_private_obj obj;
 384        /** @mdev: the parent komeda_dev */
 385        struct komeda_dev *mdev;
 386        /** @pxlclk: pixel clock */
 387        struct clk *pxlclk;
 388        /** @id: pipeline id */
 389        int id;
 390        /** @avail_comps: available components mask of pipeline */
 391        u32 avail_comps;
 392        /** @n_layers: the number of layer on @layers */
 393        int n_layers;
 394        /** @layers: the pipeline layers */
 395        struct komeda_layer *layers[KOMEDA_PIPELINE_MAX_LAYERS];
 396        /** @n_scalers: the number of scaler on @scalers */
 397        int n_scalers;
 398        /** @scalers: the pipeline scalers */
 399        struct komeda_scaler *scalers[KOMEDA_PIPELINE_MAX_SCALERS];
 400        /** @compiz: compositor */
 401        struct komeda_compiz *compiz;
 402        /** @splitter: for split the compiz output to two half data flows */
 403        struct komeda_splitter *splitter;
 404        /** @merger: merger */
 405        struct komeda_merger *merger;
 406        /** @wb_layer: writeback layer */
 407        struct komeda_layer  *wb_layer;
 408        /** @improc: post image processor */
 409        struct komeda_improc *improc;
 410        /** @ctrlr: timing controller */
 411        struct komeda_timing_ctrlr *ctrlr;
 412        /** @funcs: chip private pipeline functions */
 413        const struct komeda_pipeline_funcs *funcs;
 414
 415        /** @of_node: pipeline dt node */
 416        struct device_node *of_node;
 417        /** @of_output_port: pipeline output port */
 418        struct device_node *of_output_port;
 419        /** @of_output_links: output connector device nodes */
 420        struct device_node *of_output_links[2];
 421        /** @dual_link: true if of_output_links[0] and [1] are both valid */
 422        bool dual_link;
 423};
 424
 425/**
 426 * struct komeda_pipeline_state
 427 *
 428 * NOTE:
 429 * Unlike the pipeline, pipeline_state doesn’t gather any component_state
 430 * into it. It because all component will be managed by drm_atomic_state.
 431 */
 432struct komeda_pipeline_state {
 433        /** @obj: tracking pipeline_state by drm_atomic_state */
 434        struct drm_private_state obj;
 435        /** @pipe: backpointer to the pipeline */
 436        struct komeda_pipeline *pipe;
 437        /** @crtc: currently bound crtc */
 438        struct drm_crtc *crtc;
 439        /**
 440         * @active_comps:
 441         *
 442         * bitmask - BIT(component->id) of active components
 443         */
 444        u32 active_comps;
 445};
 446
 447#define to_layer(c)     container_of(c, struct komeda_layer, base)
 448#define to_compiz(c)    container_of(c, struct komeda_compiz, base)
 449#define to_scaler(c)    container_of(c, struct komeda_scaler, base)
 450#define to_splitter(c)  container_of(c, struct komeda_splitter, base)
 451#define to_merger(c)    container_of(c, struct komeda_merger, base)
 452#define to_improc(c)    container_of(c, struct komeda_improc, base)
 453#define to_ctrlr(c)     container_of(c, struct komeda_timing_ctrlr, base)
 454
 455#define to_layer_st(c)  container_of(c, struct komeda_layer_state, base)
 456#define to_compiz_st(c) container_of(c, struct komeda_compiz_state, base)
 457#define to_scaler_st(c) container_of(c, struct komeda_scaler_state, base)
 458#define to_splitter_st(c) container_of(c, struct komeda_splitter_state, base)
 459#define to_merger_st(c) container_of(c, struct komeda_merger_state, base)
 460#define to_improc_st(c) container_of(c, struct komeda_improc_state, base)
 461#define to_ctrlr_st(c)  container_of(c, struct komeda_timing_ctrlr_state, base)
 462
 463#define priv_to_comp_st(o) container_of(o, struct komeda_component_state, obj)
 464#define priv_to_pipe_st(o) container_of(o, struct komeda_pipeline_state, obj)
 465
 466/* pipeline APIs */
 467struct komeda_pipeline *
 468komeda_pipeline_add(struct komeda_dev *mdev, size_t size,
 469                    const struct komeda_pipeline_funcs *funcs);
 470void komeda_pipeline_destroy(struct komeda_dev *mdev,
 471                             struct komeda_pipeline *pipe);
 472struct komeda_pipeline *
 473komeda_pipeline_get_slave(struct komeda_pipeline *master);
 474int komeda_assemble_pipelines(struct komeda_dev *mdev);
 475struct komeda_component *
 476komeda_pipeline_get_component(struct komeda_pipeline *pipe, int id);
 477struct komeda_component *
 478komeda_pipeline_get_first_component(struct komeda_pipeline *pipe,
 479                                    u32 comp_mask);
 480
 481void komeda_pipeline_dump_register(struct komeda_pipeline *pipe,
 482                                   struct seq_file *sf);
 483
 484/* component APIs */
 485extern __printf(10, 11)
 486struct komeda_component *
 487komeda_component_add(struct komeda_pipeline *pipe,
 488                     size_t comp_sz, u32 id, u32 hw_id,
 489                     const struct komeda_component_funcs *funcs,
 490                     u8 max_active_inputs, u32 supported_inputs,
 491                     u8 max_active_outputs, u32 __iomem *reg,
 492                     const char *name_fmt, ...);
 493
 494void komeda_component_destroy(struct komeda_dev *mdev,
 495                              struct komeda_component *c);
 496
 497static inline struct komeda_component *
 498komeda_component_pickup_output(struct komeda_component *c, u32 avail_comps)
 499{
 500        u32 avail_inputs = c->supported_outputs & (avail_comps);
 501
 502        return komeda_pipeline_get_first_component(c->pipeline, avail_inputs);
 503}
 504
 505struct komeda_plane_state;
 506struct komeda_crtc_state;
 507struct komeda_crtc;
 508
 509void pipeline_composition_size(struct komeda_crtc_state *kcrtc_st,
 510                               u16 *hsize, u16 *vsize);
 511
 512int komeda_build_layer_data_flow(struct komeda_layer *layer,
 513                                 struct komeda_plane_state *kplane_st,
 514                                 struct komeda_crtc_state *kcrtc_st,
 515                                 struct komeda_data_flow_cfg *dflow);
 516int komeda_build_wb_data_flow(struct komeda_layer *wb_layer,
 517                              struct drm_connector_state *conn_st,
 518                              struct komeda_crtc_state *kcrtc_st,
 519                              struct komeda_data_flow_cfg *dflow);
 520int komeda_build_display_data_flow(struct komeda_crtc *kcrtc,
 521                                   struct komeda_crtc_state *kcrtc_st);
 522
 523int komeda_build_layer_split_data_flow(struct komeda_layer *left,
 524                                       struct komeda_plane_state *kplane_st,
 525                                       struct komeda_crtc_state *kcrtc_st,
 526                                       struct komeda_data_flow_cfg *dflow);
 527int komeda_build_wb_split_data_flow(struct komeda_layer *wb_layer,
 528                                    struct drm_connector_state *conn_st,
 529                                    struct komeda_crtc_state *kcrtc_st,
 530                                    struct komeda_data_flow_cfg *dflow);
 531
 532int komeda_release_unclaimed_resources(struct komeda_pipeline *pipe,
 533                                       struct komeda_crtc_state *kcrtc_st);
 534
 535struct komeda_pipeline_state *
 536komeda_pipeline_get_old_state(struct komeda_pipeline *pipe,
 537                              struct drm_atomic_state *state);
 538void komeda_pipeline_disable(struct komeda_pipeline *pipe,
 539                             struct drm_atomic_state *old_state);
 540void komeda_pipeline_update(struct komeda_pipeline *pipe,
 541                            struct drm_atomic_state *old_state);
 542
 543void komeda_complete_data_flow_cfg(struct komeda_layer *layer,
 544                                   struct komeda_data_flow_cfg *dflow,
 545                                   struct drm_framebuffer *fb);
 546
 547#endif /* _KOMEDA_PIPELINE_H_*/
 548