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6#ifndef _GUC_ACTIONS_SLPC_ABI_H_
7#define _GUC_ACTIONS_SLPC_ABI_H_
8
9#include <linux/types.h>
10#include "i915_reg.h"
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49#define SLPC_MAX_OVERRIDE_PARAMETERS 256
50#define SLPC_OVERRIDE_BITFIELD_SIZE \
51 (SLPC_MAX_OVERRIDE_PARAMETERS / 32)
52
53#define SLPC_PAGE_SIZE_BYTES 4096
54#define SLPC_CACHELINE_SIZE_BYTES 64
55#define SLPC_SHARED_DATA_SIZE_BYTE_HEADER SLPC_CACHELINE_SIZE_BYTES
56#define SLPC_SHARED_DATA_SIZE_BYTE_PLATFORM_INFO SLPC_CACHELINE_SIZE_BYTES
57#define SLPC_SHARED_DATA_SIZE_BYTE_TASK_STATE SLPC_CACHELINE_SIZE_BYTES
58#define SLPC_SHARED_DATA_MODE_DEFN_TABLE_SIZE SLPC_PAGE_SIZE_BYTES
59#define SLPC_SHARED_DATA_SIZE_BYTE_MAX (2 * SLPC_PAGE_SIZE_BYTES)
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65#define SLPC_OVERRIDE_PARAMS_TOTAL_BYTES (((((SLPC_MAX_OVERRIDE_PARAMETERS * 4) \
66 + ((SLPC_MAX_OVERRIDE_PARAMETERS / 32) * 4)) \
67 + (SLPC_CACHELINE_SIZE_BYTES - 1)) / SLPC_CACHELINE_SIZE_BYTES) * \
68 SLPC_CACHELINE_SIZE_BYTES)
69
70#define SLPC_SHARED_DATA_SIZE_BYTE_OTHER (SLPC_SHARED_DATA_SIZE_BYTE_MAX - \
71 (SLPC_SHARED_DATA_SIZE_BYTE_HEADER \
72 + SLPC_SHARED_DATA_SIZE_BYTE_PLATFORM_INFO \
73 + SLPC_SHARED_DATA_SIZE_BYTE_TASK_STATE \
74 + SLPC_OVERRIDE_PARAMS_TOTAL_BYTES \
75 + SLPC_SHARED_DATA_MODE_DEFN_TABLE_SIZE))
76
77enum slpc_task_enable {
78 SLPC_PARAM_TASK_DEFAULT = 0,
79 SLPC_PARAM_TASK_ENABLED,
80 SLPC_PARAM_TASK_DISABLED,
81 SLPC_PARAM_TASK_UNKNOWN
82};
83
84enum slpc_global_state {
85 SLPC_GLOBAL_STATE_NOT_RUNNING = 0,
86 SLPC_GLOBAL_STATE_INITIALIZING = 1,
87 SLPC_GLOBAL_STATE_RESETTING = 2,
88 SLPC_GLOBAL_STATE_RUNNING = 3,
89 SLPC_GLOBAL_STATE_SHUTTING_DOWN = 4,
90 SLPC_GLOBAL_STATE_ERROR = 5
91};
92
93enum slpc_param_id {
94 SLPC_PARAM_TASK_ENABLE_GTPERF = 0,
95 SLPC_PARAM_TASK_DISABLE_GTPERF = 1,
96 SLPC_PARAM_TASK_ENABLE_BALANCER = 2,
97 SLPC_PARAM_TASK_DISABLE_BALANCER = 3,
98 SLPC_PARAM_TASK_ENABLE_DCC = 4,
99 SLPC_PARAM_TASK_DISABLE_DCC = 5,
100 SLPC_PARAM_GLOBAL_MIN_GT_UNSLICE_FREQ_MHZ = 6,
101 SLPC_PARAM_GLOBAL_MAX_GT_UNSLICE_FREQ_MHZ = 7,
102 SLPC_PARAM_GLOBAL_MIN_GT_SLICE_FREQ_MHZ = 8,
103 SLPC_PARAM_GLOBAL_MAX_GT_SLICE_FREQ_MHZ = 9,
104 SLPC_PARAM_GTPERF_THRESHOLD_MAX_FPS = 10,
105 SLPC_PARAM_GLOBAL_DISABLE_GT_FREQ_MANAGEMENT = 11,
106 SLPC_PARAM_GTPERF_ENABLE_FRAMERATE_STALLING = 12,
107 SLPC_PARAM_GLOBAL_DISABLE_RC6_MODE_CHANGE = 13,
108 SLPC_PARAM_GLOBAL_OC_UNSLICE_FREQ_MHZ = 14,
109 SLPC_PARAM_GLOBAL_OC_SLICE_FREQ_MHZ = 15,
110 SLPC_PARAM_GLOBAL_ENABLE_IA_GT_BALANCING = 16,
111 SLPC_PARAM_GLOBAL_ENABLE_ADAPTIVE_BURST_TURBO = 17,
112 SLPC_PARAM_GLOBAL_ENABLE_EVAL_MODE = 18,
113 SLPC_PARAM_GLOBAL_ENABLE_BALANCER_IN_NON_GAMING_MODE = 19,
114 SLPC_PARAM_GLOBAL_RT_MODE_TURBO_FREQ_DELTA_MHZ = 20,
115 SLPC_PARAM_PWRGATE_RC_MODE = 21,
116 SLPC_PARAM_EDR_MODE_COMPUTE_TIMEOUT_MS = 22,
117 SLPC_PARAM_EDR_QOS_FREQ_MHZ = 23,
118 SLPC_PARAM_MEDIA_FF_RATIO_MODE = 24,
119 SLPC_PARAM_ENABLE_IA_FREQ_LIMITING = 25,
120 SLPC_PARAM_STRATEGIES = 26,
121 SLPC_PARAM_POWER_PROFILE = 27,
122 SLPC_PARAM_IGNORE_EFFICIENT_FREQUENCY = 28,
123 SLPC_MAX_PARAM = 32,
124};
125
126enum slpc_event_id {
127 SLPC_EVENT_RESET = 0,
128 SLPC_EVENT_SHUTDOWN = 1,
129 SLPC_EVENT_PLATFORM_INFO_CHANGE = 2,
130 SLPC_EVENT_DISPLAY_MODE_CHANGE = 3,
131 SLPC_EVENT_FLIP_COMPLETE = 4,
132 SLPC_EVENT_QUERY_TASK_STATE = 5,
133 SLPC_EVENT_PARAMETER_SET = 6,
134 SLPC_EVENT_PARAMETER_UNSET = 7,
135};
136
137struct slpc_task_state_data {
138 union {
139 u32 task_status_padding;
140 struct {
141 u32 status;
142#define SLPC_GTPERF_TASK_ENABLED REG_BIT(0)
143#define SLPC_DCC_TASK_ENABLED REG_BIT(11)
144#define SLPC_IN_DCC REG_BIT(12)
145#define SLPC_BALANCER_ENABLED REG_BIT(15)
146#define SLPC_IBC_TASK_ENABLED REG_BIT(16)
147#define SLPC_BALANCER_IA_LMT_ENABLED REG_BIT(17)
148#define SLPC_BALANCER_IA_LMT_ACTIVE REG_BIT(18)
149 };
150 };
151 union {
152 u32 freq_padding;
153 struct {
154#define SLPC_MAX_UNSLICE_FREQ_MASK REG_GENMASK(7, 0)
155#define SLPC_MIN_UNSLICE_FREQ_MASK REG_GENMASK(15, 8)
156#define SLPC_MAX_SLICE_FREQ_MASK REG_GENMASK(23, 16)
157#define SLPC_MIN_SLICE_FREQ_MASK REG_GENMASK(31, 24)
158 u32 freq;
159 };
160 };
161} __packed;
162
163struct slpc_shared_data_header {
164
165 u32 size;
166 u32 global_state;
167 u32 display_data_addr;
168} __packed;
169
170struct slpc_override_params {
171 u32 bits[SLPC_OVERRIDE_BITFIELD_SIZE];
172 u32 values[SLPC_MAX_OVERRIDE_PARAMETERS];
173} __packed;
174
175struct slpc_shared_data {
176 struct slpc_shared_data_header header;
177 u8 shared_data_header_pad[SLPC_SHARED_DATA_SIZE_BYTE_HEADER -
178 sizeof(struct slpc_shared_data_header)];
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180 u8 platform_info_pad[SLPC_SHARED_DATA_SIZE_BYTE_PLATFORM_INFO];
181
182 struct slpc_task_state_data task_state_data;
183 u8 task_state_data_pad[SLPC_SHARED_DATA_SIZE_BYTE_TASK_STATE -
184 sizeof(struct slpc_task_state_data)];
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186 struct slpc_override_params override_params;
187 u8 override_params_pad[SLPC_OVERRIDE_PARAMS_TOTAL_BYTES -
188 sizeof(struct slpc_override_params)];
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190 u8 shared_data_pad[SLPC_SHARED_DATA_SIZE_BYTE_OTHER];
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193 u8 reserved_mode_definition[4096];
194} __packed;
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222#define GUC_ACTION_HOST2GUC_PC_SLPC_REQUEST 0x3003
223
224#define HOST2GUC_PC_SLPC_REQUEST_MSG_MIN_LEN \
225 (GUC_HXG_REQUEST_MSG_MIN_LEN + 1u)
226#define HOST2GUC_PC_SLPC_EVENT_MAX_INPUT_ARGS 9
227#define HOST2GUC_PC_SLPC_REQUEST_MSG_MAX_LEN \
228 (HOST2GUC_PC_SLPC_REQUEST_REQUEST_MSG_MIN_LEN + \
229 HOST2GUC_PC_SLPC_EVENT_MAX_INPUT_ARGS)
230#define HOST2GUC_PC_SLPC_REQUEST_MSG_0_MBZ GUC_HXG_REQUEST_MSG_0_DATA0
231#define HOST2GUC_PC_SLPC_REQUEST_MSG_1_EVENT_ID (0xff << 8)
232#define HOST2GUC_PC_SLPC_REQUEST_MSG_1_EVENT_ARGC (0xff << 0)
233#define HOST2GUC_PC_SLPC_REQUEST_MSG_N_EVENT_DATA_N GUC_HXG_REQUEST_MSG_n_DATAn
234
235#endif
236
