1
2
3
4
5#if !defined(_DPU_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ)
6#define _DPU_TRACE_H_
7
8#include <linux/stringify.h>
9#include <linux/types.h>
10#include <linux/tracepoint.h>
11
12#include <drm/drm_rect.h>
13#include "dpu_crtc.h"
14#include "dpu_encoder_phys.h"
15#include "dpu_hw_mdss.h"
16#include "dpu_hw_vbif.h"
17#include "dpu_plane.h"
18
19#undef TRACE_SYSTEM
20#define TRACE_SYSTEM dpu
21#undef TRACE_INCLUDE_FILE
22#define TRACE_INCLUDE_FILE dpu_trace
23
24TRACE_EVENT(dpu_perf_set_qos_luts,
25 TP_PROTO(u32 pnum, u32 fmt, bool rt, u32 fl,
26 u32 lut, u32 lut_usage),
27 TP_ARGS(pnum, fmt, rt, fl, lut, lut_usage),
28 TP_STRUCT__entry(
29 __field(u32, pnum)
30 __field(u32, fmt)
31 __field(bool, rt)
32 __field(u32, fl)
33 __field(u64, lut)
34 __field(u32, lut_usage)
35 ),
36 TP_fast_assign(
37 __entry->pnum = pnum;
38 __entry->fmt = fmt;
39 __entry->rt = rt;
40 __entry->fl = fl;
41 __entry->lut = lut;
42 __entry->lut_usage = lut_usage;
43 ),
44 TP_printk("pnum=%d fmt=%x rt=%d fl=%d lut=0x%llx lut_usage=%d",
45 __entry->pnum, __entry->fmt,
46 __entry->rt, __entry->fl,
47 __entry->lut, __entry->lut_usage)
48);
49
50TRACE_EVENT(dpu_perf_set_danger_luts,
51 TP_PROTO(u32 pnum, u32 fmt, u32 mode, u32 danger_lut,
52 u32 safe_lut),
53 TP_ARGS(pnum, fmt, mode, danger_lut, safe_lut),
54 TP_STRUCT__entry(
55 __field(u32, pnum)
56 __field(u32, fmt)
57 __field(u32, mode)
58 __field(u32, danger_lut)
59 __field(u32, safe_lut)
60 ),
61 TP_fast_assign(
62 __entry->pnum = pnum;
63 __entry->fmt = fmt;
64 __entry->mode = mode;
65 __entry->danger_lut = danger_lut;
66 __entry->safe_lut = safe_lut;
67 ),
68 TP_printk("pnum=%d fmt=%x mode=%d luts[0x%x, 0x%x]",
69 __entry->pnum, __entry->fmt,
70 __entry->mode, __entry->danger_lut,
71 __entry->safe_lut)
72);
73
74TRACE_EVENT(dpu_perf_set_ot,
75 TP_PROTO(u32 pnum, u32 xin_id, u32 rd_lim, u32 vbif_idx),
76 TP_ARGS(pnum, xin_id, rd_lim, vbif_idx),
77 TP_STRUCT__entry(
78 __field(u32, pnum)
79 __field(u32, xin_id)
80 __field(u32, rd_lim)
81 __field(u32, vbif_idx)
82 ),
83 TP_fast_assign(
84 __entry->pnum = pnum;
85 __entry->xin_id = xin_id;
86 __entry->rd_lim = rd_lim;
87 __entry->vbif_idx = vbif_idx;
88 ),
89 TP_printk("pnum:%d xin_id:%d ot:%d vbif:%d",
90 __entry->pnum, __entry->xin_id, __entry->rd_lim,
91 __entry->vbif_idx)
92)
93
94TRACE_EVENT(dpu_cmd_release_bw,
95 TP_PROTO(u32 crtc_id),
96 TP_ARGS(crtc_id),
97 TP_STRUCT__entry(
98 __field(u32, crtc_id)
99 ),
100 TP_fast_assign(
101 __entry->crtc_id = crtc_id;
102 ),
103 TP_printk("crtc:%d", __entry->crtc_id)
104);
105
106TRACE_EVENT(tracing_mark_write,
107 TP_PROTO(int pid, const char *name, bool trace_begin),
108 TP_ARGS(pid, name, trace_begin),
109 TP_STRUCT__entry(
110 __field(int, pid)
111 __string(trace_name, name)
112 __field(bool, trace_begin)
113 ),
114 TP_fast_assign(
115 __entry->pid = pid;
116 __assign_str(trace_name, name);
117 __entry->trace_begin = trace_begin;
118 ),
119 TP_printk("%s|%d|%s", __entry->trace_begin ? "B" : "E",
120 __entry->pid, __get_str(trace_name))
121)
122
123TRACE_EVENT(dpu_trace_counter,
124 TP_PROTO(int pid, char *name, int value),
125 TP_ARGS(pid, name, value),
126 TP_STRUCT__entry(
127 __field(int, pid)
128 __string(counter_name, name)
129 __field(int, value)
130 ),
131 TP_fast_assign(
132 __entry->pid = current->tgid;
133 __assign_str(counter_name, name);
134 __entry->value = value;
135 ),
136 TP_printk("%d|%s|%d", __entry->pid,
137 __get_str(counter_name), __entry->value)
138)
139
140TRACE_EVENT(dpu_perf_crtc_update,
141 TP_PROTO(u32 crtc, u64 bw_ctl, u32 core_clk_rate,
142 bool stop_req, bool update_bus, bool update_clk),
143 TP_ARGS(crtc, bw_ctl, core_clk_rate, stop_req, update_bus, update_clk),
144 TP_STRUCT__entry(
145 __field(u32, crtc)
146 __field(u64, bw_ctl)
147 __field(u32, core_clk_rate)
148 __field(bool, stop_req)
149 __field(u32, update_bus)
150 __field(u32, update_clk)
151 ),
152 TP_fast_assign(
153 __entry->crtc = crtc;
154 __entry->bw_ctl = bw_ctl;
155 __entry->core_clk_rate = core_clk_rate;
156 __entry->stop_req = stop_req;
157 __entry->update_bus = update_bus;
158 __entry->update_clk = update_clk;
159 ),
160 TP_printk(
161 "crtc=%d bw_ctl=%llu clk_rate=%u stop_req=%d u_bus=%d u_clk=%d",
162 __entry->crtc,
163 __entry->bw_ctl,
164 __entry->core_clk_rate,
165 __entry->stop_req,
166 __entry->update_bus,
167 __entry->update_clk)
168);
169
170DECLARE_EVENT_CLASS(dpu_enc_irq_template,
171 TP_PROTO(uint32_t drm_id, enum dpu_intr_idx intr_idx,
172 int irq_idx),
173 TP_ARGS(drm_id, intr_idx, irq_idx),
174 TP_STRUCT__entry(
175 __field( uint32_t, drm_id )
176 __field( enum dpu_intr_idx, intr_idx )
177 __field( int, irq_idx )
178 ),
179 TP_fast_assign(
180 __entry->drm_id = drm_id;
181 __entry->intr_idx = intr_idx;
182 __entry->irq_idx = irq_idx;
183 ),
184 TP_printk("id=%u, intr=%d, irq=%d",
185 __entry->drm_id, __entry->intr_idx,
186 __entry->irq_idx)
187);
188DEFINE_EVENT(dpu_enc_irq_template, dpu_enc_irq_register_success,
189 TP_PROTO(uint32_t drm_id, enum dpu_intr_idx intr_idx,
190 int irq_idx),
191 TP_ARGS(drm_id, intr_idx, irq_idx)
192);
193DEFINE_EVENT(dpu_enc_irq_template, dpu_enc_irq_unregister_success,
194 TP_PROTO(uint32_t drm_id, enum dpu_intr_idx intr_idx,
195 int irq_idx),
196 TP_ARGS(drm_id, intr_idx, irq_idx)
197);
198
199TRACE_EVENT(dpu_enc_irq_wait_success,
200 TP_PROTO(uint32_t drm_id, enum dpu_intr_idx intr_idx,
201 int irq_idx, enum dpu_pingpong pp_idx, int atomic_cnt),
202 TP_ARGS(drm_id, intr_idx, irq_idx, pp_idx, atomic_cnt),
203 TP_STRUCT__entry(
204 __field( uint32_t, drm_id )
205 __field( enum dpu_intr_idx, intr_idx )
206 __field( int, irq_idx )
207 __field( enum dpu_pingpong, pp_idx )
208 __field( int, atomic_cnt )
209 ),
210 TP_fast_assign(
211 __entry->drm_id = drm_id;
212 __entry->intr_idx = intr_idx;
213 __entry->irq_idx = irq_idx;
214 __entry->pp_idx = pp_idx;
215 __entry->atomic_cnt = atomic_cnt;
216 ),
217 TP_printk("id=%u, intr=%d, irq=%d, pp=%d, atomic_cnt=%d",
218 __entry->drm_id, __entry->intr_idx,
219 __entry->irq_idx, __entry->pp_idx, __entry->atomic_cnt)
220);
221
222DECLARE_EVENT_CLASS(dpu_drm_obj_template,
223 TP_PROTO(uint32_t drm_id),
224 TP_ARGS(drm_id),
225 TP_STRUCT__entry(
226 __field( uint32_t, drm_id )
227 ),
228 TP_fast_assign(
229 __entry->drm_id = drm_id;
230 ),
231 TP_printk("id=%u", __entry->drm_id)
232);
233DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_atomic_check,
234 TP_PROTO(uint32_t drm_id),
235 TP_ARGS(drm_id)
236);
237DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_mode_set,
238 TP_PROTO(uint32_t drm_id),
239 TP_ARGS(drm_id)
240);
241DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_disable,
242 TP_PROTO(uint32_t drm_id),
243 TP_ARGS(drm_id)
244);
245DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_kickoff,
246 TP_PROTO(uint32_t drm_id),
247 TP_ARGS(drm_id)
248);
249DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_prepare_kickoff,
250 TP_PROTO(uint32_t drm_id),
251 TP_ARGS(drm_id)
252);
253DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_prepare_kickoff_reset,
254 TP_PROTO(uint32_t drm_id),
255 TP_ARGS(drm_id)
256);
257DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_complete_flip,
258 TP_PROTO(uint32_t drm_id),
259 TP_ARGS(drm_id)
260);
261DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_vblank_cb,
262 TP_PROTO(uint32_t drm_id),
263 TP_ARGS(drm_id)
264);
265DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_complete_commit,
266 TP_PROTO(uint32_t drm_id),
267 TP_ARGS(drm_id)
268);
269DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_enc_enable,
270 TP_PROTO(uint32_t drm_id),
271 TP_ARGS(drm_id)
272);
273DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_commit,
274 TP_PROTO(uint32_t drm_id),
275 TP_ARGS(drm_id)
276);
277DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_wait_for_commit_done,
278 TP_PROTO(uint32_t drm_id),
279 TP_ARGS(drm_id)
280);
281DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_runtime_resume,
282 TP_PROTO(uint32_t drm_id),
283 TP_ARGS(drm_id)
284);
285
286TRACE_EVENT(dpu_enc_enable,
287 TP_PROTO(uint32_t drm_id, int hdisplay, int vdisplay),
288 TP_ARGS(drm_id, hdisplay, vdisplay),
289 TP_STRUCT__entry(
290 __field( uint32_t, drm_id )
291 __field( int, hdisplay )
292 __field( int, vdisplay )
293 ),
294 TP_fast_assign(
295 __entry->drm_id = drm_id;
296 __entry->hdisplay = hdisplay;
297 __entry->vdisplay = vdisplay;
298 ),
299 TP_printk("id=%u, mode=%dx%d",
300 __entry->drm_id, __entry->hdisplay, __entry->vdisplay)
301);
302
303DECLARE_EVENT_CLASS(dpu_enc_keyval_template,
304 TP_PROTO(uint32_t drm_id, int val),
305 TP_ARGS(drm_id, val),
306 TP_STRUCT__entry(
307 __field( uint32_t, drm_id )
308 __field( int, val )
309 ),
310 TP_fast_assign(
311 __entry->drm_id = drm_id;
312 __entry->val = val;
313 ),
314 TP_printk("id=%u, val=%d", __entry->drm_id, __entry->val)
315);
316DEFINE_EVENT(dpu_enc_keyval_template, dpu_enc_underrun_cb,
317 TP_PROTO(uint32_t drm_id, int count),
318 TP_ARGS(drm_id, count)
319);
320DEFINE_EVENT(dpu_enc_keyval_template, dpu_enc_trigger_start,
321 TP_PROTO(uint32_t drm_id, int ctl_idx),
322 TP_ARGS(drm_id, ctl_idx)
323);
324
325TRACE_EVENT(dpu_enc_atomic_check_flags,
326 TP_PROTO(uint32_t drm_id, unsigned int flags),
327 TP_ARGS(drm_id, flags),
328 TP_STRUCT__entry(
329 __field( uint32_t, drm_id )
330 __field( unsigned int, flags )
331 ),
332 TP_fast_assign(
333 __entry->drm_id = drm_id;
334 __entry->flags = flags;
335 ),
336 TP_printk("id=%u, flags=%u",
337 __entry->drm_id, __entry->flags)
338);
339
340DECLARE_EVENT_CLASS(dpu_enc_id_enable_template,
341 TP_PROTO(uint32_t drm_id, bool enable),
342 TP_ARGS(drm_id, enable),
343 TP_STRUCT__entry(
344 __field( uint32_t, drm_id )
345 __field( bool, enable )
346 ),
347 TP_fast_assign(
348 __entry->drm_id = drm_id;
349 __entry->enable = enable;
350 ),
351 TP_printk("id=%u, enable=%s",
352 __entry->drm_id, __entry->enable ? "true" : "false")
353);
354DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_rc_helper,
355 TP_PROTO(uint32_t drm_id, bool enable),
356 TP_ARGS(drm_id, enable)
357);
358DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_vblank_cb,
359 TP_PROTO(uint32_t drm_id, bool enable),
360 TP_ARGS(drm_id, enable)
361);
362DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_frame_event_cb,
363 TP_PROTO(uint32_t drm_id, bool enable),
364 TP_ARGS(drm_id, enable)
365);
366DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_phys_cmd_connect_te,
367 TP_PROTO(uint32_t drm_id, bool enable),
368 TP_ARGS(drm_id, enable)
369);
370
371TRACE_EVENT(dpu_enc_rc,
372 TP_PROTO(uint32_t drm_id, u32 sw_event, bool idle_pc_supported,
373 int rc_state, const char *stage),
374 TP_ARGS(drm_id, sw_event, idle_pc_supported, rc_state, stage),
375 TP_STRUCT__entry(
376 __field( uint32_t, drm_id )
377 __field( u32, sw_event )
378 __field( bool, idle_pc_supported )
379 __field( int, rc_state )
380 __string( stage_str, stage )
381 ),
382 TP_fast_assign(
383 __entry->drm_id = drm_id;
384 __entry->sw_event = sw_event;
385 __entry->idle_pc_supported = idle_pc_supported;
386 __entry->rc_state = rc_state;
387 __assign_str(stage_str, stage);
388 ),
389 TP_printk("%s: id:%u, sw_event:%d, idle_pc_supported:%s, rc_state:%d",
390 __get_str(stage_str), __entry->drm_id, __entry->sw_event,
391 __entry->idle_pc_supported ? "true" : "false",
392 __entry->rc_state)
393);
394
395TRACE_EVENT(dpu_enc_frame_done_cb_not_busy,
396 TP_PROTO(uint32_t drm_id, u32 event, enum dpu_intf intf_idx),
397 TP_ARGS(drm_id, event, intf_idx),
398 TP_STRUCT__entry(
399 __field( uint32_t, drm_id )
400 __field( u32, event )
401 __field( enum dpu_intf, intf_idx )
402 ),
403 TP_fast_assign(
404 __entry->drm_id = drm_id;
405 __entry->event = event;
406 __entry->intf_idx = intf_idx;
407 ),
408 TP_printk("id=%u, event=%u, intf=%d", __entry->drm_id, __entry->event,
409 __entry->intf_idx)
410);
411
412TRACE_EVENT(dpu_enc_frame_done_cb,
413 TP_PROTO(uint32_t drm_id, unsigned int idx,
414 unsigned long frame_busy_mask),
415 TP_ARGS(drm_id, idx, frame_busy_mask),
416 TP_STRUCT__entry(
417 __field( uint32_t, drm_id )
418 __field( unsigned int, idx )
419 __field( unsigned long, frame_busy_mask )
420 ),
421 TP_fast_assign(
422 __entry->drm_id = drm_id;
423 __entry->idx = idx;
424 __entry->frame_busy_mask = frame_busy_mask;
425 ),
426 TP_printk("id=%u, idx=%u, frame_busy_mask=%lx", __entry->drm_id,
427 __entry->idx, __entry->frame_busy_mask)
428);
429
430TRACE_EVENT(dpu_enc_trigger_flush,
431 TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx,
432 int pending_kickoff_cnt, int ctl_idx, u32 extra_flush_bits,
433 u32 pending_flush_ret),
434 TP_ARGS(drm_id, intf_idx, pending_kickoff_cnt, ctl_idx,
435 extra_flush_bits, pending_flush_ret),
436 TP_STRUCT__entry(
437 __field( uint32_t, drm_id )
438 __field( enum dpu_intf, intf_idx )
439 __field( int, pending_kickoff_cnt )
440 __field( int, ctl_idx )
441 __field( u32, extra_flush_bits )
442 __field( u32, pending_flush_ret )
443 ),
444 TP_fast_assign(
445 __entry->drm_id = drm_id;
446 __entry->intf_idx = intf_idx;
447 __entry->pending_kickoff_cnt = pending_kickoff_cnt;
448 __entry->ctl_idx = ctl_idx;
449 __entry->extra_flush_bits = extra_flush_bits;
450 __entry->pending_flush_ret = pending_flush_ret;
451 ),
452 TP_printk("id=%u, intf_idx=%d, pending_kickoff_cnt=%d ctl_idx=%d "
453 "extra_flush_bits=0x%x pending_flush_ret=0x%x",
454 __entry->drm_id, __entry->intf_idx,
455 __entry->pending_kickoff_cnt, __entry->ctl_idx,
456 __entry->extra_flush_bits, __entry->pending_flush_ret)
457);
458
459DECLARE_EVENT_CLASS(dpu_enc_ktime_template,
460 TP_PROTO(uint32_t drm_id, ktime_t time),
461 TP_ARGS(drm_id, time),
462 TP_STRUCT__entry(
463 __field( uint32_t, drm_id )
464 __field( ktime_t, time )
465 ),
466 TP_fast_assign(
467 __entry->drm_id = drm_id;
468 __entry->time = time;
469 ),
470 TP_printk("id=%u, time=%lld", __entry->drm_id,
471 ktime_to_ms(__entry->time))
472);
473DEFINE_EVENT(dpu_enc_ktime_template, dpu_enc_vsync_event_work,
474 TP_PROTO(uint32_t drm_id, ktime_t time),
475 TP_ARGS(drm_id, time)
476);
477DEFINE_EVENT(dpu_enc_ktime_template, dpu_enc_early_kickoff,
478 TP_PROTO(uint32_t drm_id, ktime_t time),
479 TP_ARGS(drm_id, time)
480);
481
482DECLARE_EVENT_CLASS(dpu_id_event_template,
483 TP_PROTO(uint32_t drm_id, u32 event),
484 TP_ARGS(drm_id, event),
485 TP_STRUCT__entry(
486 __field( uint32_t, drm_id )
487 __field( u32, event )
488 ),
489 TP_fast_assign(
490 __entry->drm_id = drm_id;
491 __entry->event = event;
492 ),
493 TP_printk("id=%u, event=%u", __entry->drm_id, __entry->event)
494);
495DEFINE_EVENT(dpu_id_event_template, dpu_enc_frame_done_timeout,
496 TP_PROTO(uint32_t drm_id, u32 event),
497 TP_ARGS(drm_id, event)
498);
499DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_cb,
500 TP_PROTO(uint32_t drm_id, u32 event),
501 TP_ARGS(drm_id, event)
502);
503DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_done,
504 TP_PROTO(uint32_t drm_id, u32 event),
505 TP_ARGS(drm_id, event)
506);
507DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_more_pending,
508 TP_PROTO(uint32_t drm_id, u32 event),
509 TP_ARGS(drm_id, event)
510);
511
512TRACE_EVENT(dpu_enc_wait_event_timeout,
513 TP_PROTO(uint32_t drm_id, int irq_idx, int rc, s64 time,
514 s64 expected_time, int atomic_cnt),
515 TP_ARGS(drm_id, irq_idx, rc, time, expected_time, atomic_cnt),
516 TP_STRUCT__entry(
517 __field( uint32_t, drm_id )
518 __field( int, irq_idx )
519 __field( int, rc )
520 __field( s64, time )
521 __field( s64, expected_time )
522 __field( int, atomic_cnt )
523 ),
524 TP_fast_assign(
525 __entry->drm_id = drm_id;
526 __entry->irq_idx = irq_idx;
527 __entry->rc = rc;
528 __entry->time = time;
529 __entry->expected_time = expected_time;
530 __entry->atomic_cnt = atomic_cnt;
531 ),
532 TP_printk("id=%u, irq_idx=%d, rc=%d, time=%lld, expected=%lld cnt=%d",
533 __entry->drm_id, __entry->irq_idx, __entry->rc, __entry->time,
534 __entry->expected_time, __entry->atomic_cnt)
535);
536
537TRACE_EVENT(dpu_enc_phys_cmd_irq_ctrl,
538 TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp, bool enable,
539 int refcnt),
540 TP_ARGS(drm_id, pp, enable, refcnt),
541 TP_STRUCT__entry(
542 __field( uint32_t, drm_id )
543 __field( enum dpu_pingpong, pp )
544 __field( bool, enable )
545 __field( int, refcnt )
546 ),
547 TP_fast_assign(
548 __entry->drm_id = drm_id;
549 __entry->pp = pp;
550 __entry->enable = enable;
551 __entry->refcnt = refcnt;
552 ),
553 TP_printk("id=%u, pp=%d, enable=%s, refcnt=%d", __entry->drm_id,
554 __entry->pp, __entry->enable ? "true" : "false",
555 __entry->refcnt)
556);
557
558TRACE_EVENT(dpu_enc_phys_cmd_pp_tx_done,
559 TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp, int new_count,
560 u32 event),
561 TP_ARGS(drm_id, pp, new_count, event),
562 TP_STRUCT__entry(
563 __field( uint32_t, drm_id )
564 __field( enum dpu_pingpong, pp )
565 __field( int, new_count )
566 __field( u32, event )
567 ),
568 TP_fast_assign(
569 __entry->drm_id = drm_id;
570 __entry->pp = pp;
571 __entry->new_count = new_count;
572 __entry->event = event;
573 ),
574 TP_printk("id=%u, pp=%d, new_count=%d, event=%u", __entry->drm_id,
575 __entry->pp, __entry->new_count, __entry->event)
576);
577
578TRACE_EVENT(dpu_enc_phys_cmd_pdone_timeout,
579 TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp, int timeout_count,
580 int kickoff_count, u32 event),
581 TP_ARGS(drm_id, pp, timeout_count, kickoff_count, event),
582 TP_STRUCT__entry(
583 __field( uint32_t, drm_id )
584 __field( enum dpu_pingpong, pp )
585 __field( int, timeout_count )
586 __field( int, kickoff_count )
587 __field( u32, event )
588 ),
589 TP_fast_assign(
590 __entry->drm_id = drm_id;
591 __entry->pp = pp;
592 __entry->timeout_count = timeout_count;
593 __entry->kickoff_count = kickoff_count;
594 __entry->event = event;
595 ),
596 TP_printk("id=%u, pp=%d, timeout_count=%d, kickoff_count=%d, event=%u",
597 __entry->drm_id, __entry->pp, __entry->timeout_count,
598 __entry->kickoff_count, __entry->event)
599);
600
601TRACE_EVENT(dpu_enc_phys_vid_post_kickoff,
602 TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx),
603 TP_ARGS(drm_id, intf_idx),
604 TP_STRUCT__entry(
605 __field( uint32_t, drm_id )
606 __field( enum dpu_intf, intf_idx )
607 ),
608 TP_fast_assign(
609 __entry->drm_id = drm_id;
610 __entry->intf_idx = intf_idx;
611 ),
612 TP_printk("id=%u, intf_idx=%d", __entry->drm_id, __entry->intf_idx)
613);
614
615TRACE_EVENT(dpu_enc_phys_vid_irq_ctrl,
616 TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx, bool enable,
617 int refcnt),
618 TP_ARGS(drm_id, intf_idx, enable, refcnt),
619 TP_STRUCT__entry(
620 __field( uint32_t, drm_id )
621 __field( enum dpu_intf, intf_idx )
622 __field( bool, enable )
623 __field( int, refcnt )
624 ),
625 TP_fast_assign(
626 __entry->drm_id = drm_id;
627 __entry->intf_idx = intf_idx;
628 __entry->enable = enable;
629 __entry->refcnt = refcnt;
630 ),
631 TP_printk("id=%u, intf_idx=%d enable=%s refcnt=%d", __entry->drm_id,
632 __entry->intf_idx, __entry->enable ? "true" : "false",
633 __entry->drm_id)
634);
635
636TRACE_EVENT(dpu_crtc_setup_mixer,
637 TP_PROTO(uint32_t crtc_id, uint32_t plane_id,
638 struct drm_plane_state *state, struct dpu_plane_state *pstate,
639 uint32_t stage_idx, enum dpu_sspp sspp, uint32_t pixel_format,
640 uint64_t modifier),
641 TP_ARGS(crtc_id, plane_id, state, pstate, stage_idx, sspp,
642 pixel_format, modifier),
643 TP_STRUCT__entry(
644 __field( uint32_t, crtc_id )
645 __field( uint32_t, plane_id )
646 __field( uint32_t, fb_id )
647 __field_struct( struct drm_rect, src_rect )
648 __field_struct( struct drm_rect, dst_rect )
649 __field( uint32_t, stage_idx )
650 __field( enum dpu_stage, stage )
651 __field( enum dpu_sspp, sspp )
652 __field( uint32_t, multirect_idx )
653 __field( uint32_t, multirect_mode )
654 __field( uint32_t, pixel_format )
655 __field( uint64_t, modifier )
656 ),
657 TP_fast_assign(
658 __entry->crtc_id = crtc_id;
659 __entry->plane_id = plane_id;
660 __entry->fb_id = state ? state->fb->base.id : 0;
661 __entry->src_rect = drm_plane_state_src(state);
662 __entry->dst_rect = drm_plane_state_dest(state);
663 __entry->stage_idx = stage_idx;
664 __entry->stage = pstate->stage;
665 __entry->sspp = sspp;
666 __entry->multirect_idx = pstate->multirect_index;
667 __entry->multirect_mode = pstate->multirect_mode;
668 __entry->pixel_format = pixel_format;
669 __entry->modifier = modifier;
670 ),
671 TP_printk("crtc_id:%u plane_id:%u fb_id:%u src:" DRM_RECT_FP_FMT
672 " dst:" DRM_RECT_FMT " stage_idx:%u stage:%d, sspp:%d "
673 "multirect_index:%d multirect_mode:%u pix_format:%u "
674 "modifier:%llu",
675 __entry->crtc_id, __entry->plane_id, __entry->fb_id,
676 DRM_RECT_FP_ARG(&__entry->src_rect),
677 DRM_RECT_ARG(&__entry->dst_rect),
678 __entry->stage_idx, __entry->stage, __entry->sspp,
679 __entry->multirect_idx, __entry->multirect_mode,
680 __entry->pixel_format, __entry->modifier)
681);
682
683TRACE_EVENT(dpu_crtc_setup_lm_bounds,
684 TP_PROTO(uint32_t drm_id, int mixer, struct drm_rect *bounds),
685 TP_ARGS(drm_id, mixer, bounds),
686 TP_STRUCT__entry(
687 __field( uint32_t, drm_id )
688 __field( int, mixer )
689 __field_struct( struct drm_rect, bounds )
690 ),
691 TP_fast_assign(
692 __entry->drm_id = drm_id;
693 __entry->mixer = mixer;
694 __entry->bounds = *bounds;
695 ),
696 TP_printk("id:%u mixer:%d bounds:" DRM_RECT_FMT, __entry->drm_id,
697 __entry->mixer, DRM_RECT_ARG(&__entry->bounds))
698);
699
700TRACE_EVENT(dpu_crtc_vblank_enable,
701 TP_PROTO(uint32_t drm_id, uint32_t enc_id, bool enable,
702 struct dpu_crtc *crtc),
703 TP_ARGS(drm_id, enc_id, enable, crtc),
704 TP_STRUCT__entry(
705 __field( uint32_t, drm_id )
706 __field( uint32_t, enc_id )
707 __field( bool, enable )
708 __field( bool, enabled )
709 ),
710 TP_fast_assign(
711 __entry->drm_id = drm_id;
712 __entry->enc_id = enc_id;
713 __entry->enable = enable;
714 __entry->enabled = crtc->enabled;
715 ),
716 TP_printk("id:%u encoder:%u enable:%s state{enabled:%s}",
717 __entry->drm_id, __entry->enc_id,
718 __entry->enable ? "true" : "false",
719 __entry->enabled ? "true" : "false")
720);
721
722DECLARE_EVENT_CLASS(dpu_crtc_enable_template,
723 TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),
724 TP_ARGS(drm_id, enable, crtc),
725 TP_STRUCT__entry(
726 __field( uint32_t, drm_id )
727 __field( bool, enable )
728 __field( bool, enabled )
729 ),
730 TP_fast_assign(
731 __entry->drm_id = drm_id;
732 __entry->enable = enable;
733 __entry->enabled = crtc->enabled;
734 ),
735 TP_printk("id:%u enable:%s state{enabled:%s}",
736 __entry->drm_id, __entry->enable ? "true" : "false",
737 __entry->enabled ? "true" : "false")
738);
739DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_enable,
740 TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),
741 TP_ARGS(drm_id, enable, crtc)
742);
743DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_disable,
744 TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),
745 TP_ARGS(drm_id, enable, crtc)
746);
747DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_vblank,
748 TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),
749 TP_ARGS(drm_id, enable, crtc)
750);
751
752TRACE_EVENT(dpu_crtc_disable_frame_pending,
753 TP_PROTO(uint32_t drm_id, int frame_pending),
754 TP_ARGS(drm_id, frame_pending),
755 TP_STRUCT__entry(
756 __field( uint32_t, drm_id )
757 __field( int, frame_pending )
758 ),
759 TP_fast_assign(
760 __entry->drm_id = drm_id;
761 __entry->frame_pending = frame_pending;
762 ),
763 TP_printk("id:%u frame_pending:%d", __entry->drm_id,
764 __entry->frame_pending)
765);
766
767TRACE_EVENT(dpu_plane_set_scanout,
768 TP_PROTO(enum dpu_sspp index, struct dpu_hw_fmt_layout *layout,
769 enum dpu_sspp_multirect_index multirect_index),
770 TP_ARGS(index, layout, multirect_index),
771 TP_STRUCT__entry(
772 __field( enum dpu_sspp, index )
773 __field_struct( struct dpu_hw_fmt_layout, layout )
774 __field( enum dpu_sspp_multirect_index, multirect_index)
775 ),
776 TP_fast_assign(
777 __entry->index = index;
778 __entry->layout = *layout;
779 __entry->multirect_index = multirect_index;
780 ),
781 TP_printk("index:%d layout:{%ux%u @ [%u/%u, %u/%u, %u/%u, %u/%u]} "
782 "multirect_index:%d", __entry->index, __entry->layout.width,
783 __entry->layout.height, __entry->layout.plane_addr[0],
784 __entry->layout.plane_size[0],
785 __entry->layout.plane_addr[1],
786 __entry->layout.plane_size[1],
787 __entry->layout.plane_addr[2],
788 __entry->layout.plane_size[2],
789 __entry->layout.plane_addr[3],
790 __entry->layout.plane_size[3], __entry->multirect_index)
791);
792
793TRACE_EVENT(dpu_plane_disable,
794 TP_PROTO(uint32_t drm_id, bool is_virtual, uint32_t multirect_mode),
795 TP_ARGS(drm_id, is_virtual, multirect_mode),
796 TP_STRUCT__entry(
797 __field( uint32_t, drm_id )
798 __field( bool, is_virtual )
799 __field( uint32_t, multirect_mode )
800 ),
801 TP_fast_assign(
802 __entry->drm_id = drm_id;
803 __entry->is_virtual = is_virtual;
804 __entry->multirect_mode = multirect_mode;
805 ),
806 TP_printk("id:%u is_virtual:%s multirect_mode:%u", __entry->drm_id,
807 __entry->is_virtual ? "true" : "false",
808 __entry->multirect_mode)
809);
810
811DECLARE_EVENT_CLASS(dpu_rm_iter_template,
812 TP_PROTO(uint32_t id, uint32_t enc_id),
813 TP_ARGS(id, enc_id),
814 TP_STRUCT__entry(
815 __field( uint32_t, id )
816 __field( uint32_t, enc_id )
817 ),
818 TP_fast_assign(
819 __entry->id = id;
820 __entry->enc_id = enc_id;
821 ),
822 TP_printk("id:%d enc_id:%u", __entry->id, __entry->enc_id)
823);
824DEFINE_EVENT(dpu_rm_iter_template, dpu_rm_reserve_intf,
825 TP_PROTO(uint32_t id, uint32_t enc_id),
826 TP_ARGS(id, enc_id)
827);
828DEFINE_EVENT(dpu_rm_iter_template, dpu_rm_reserve_ctls,
829 TP_PROTO(uint32_t id, uint32_t enc_id),
830 TP_ARGS(id, enc_id)
831);
832
833TRACE_EVENT(dpu_rm_reserve_lms,
834 TP_PROTO(uint32_t id, uint32_t enc_id, uint32_t pp_id),
835 TP_ARGS(id, enc_id, pp_id),
836 TP_STRUCT__entry(
837 __field( uint32_t, id )
838 __field( uint32_t, enc_id )
839 __field( uint32_t, pp_id )
840 ),
841 TP_fast_assign(
842 __entry->id = id;
843 __entry->enc_id = enc_id;
844 __entry->pp_id = pp_id;
845 ),
846 TP_printk("id:%d enc_id:%u pp_id:%u", __entry->id,
847 __entry->enc_id, __entry->pp_id)
848);
849
850TRACE_EVENT(dpu_vbif_wait_xin_halt_fail,
851 TP_PROTO(enum dpu_vbif index, u32 xin_id),
852 TP_ARGS(index, xin_id),
853 TP_STRUCT__entry(
854 __field( enum dpu_vbif, index )
855 __field( u32, xin_id )
856 ),
857 TP_fast_assign(
858 __entry->index = index;
859 __entry->xin_id = xin_id;
860 ),
861 TP_printk("index:%d xin_id:%u", __entry->index, __entry->xin_id)
862);
863
864TRACE_EVENT(dpu_pp_connect_ext_te,
865 TP_PROTO(enum dpu_pingpong pp, u32 cfg),
866 TP_ARGS(pp, cfg),
867 TP_STRUCT__entry(
868 __field( enum dpu_pingpong, pp )
869 __field( u32, cfg )
870 ),
871 TP_fast_assign(
872 __entry->pp = pp;
873 __entry->cfg = cfg;
874 ),
875 TP_printk("pp:%d cfg:%u", __entry->pp, __entry->cfg)
876);
877
878DECLARE_EVENT_CLASS(dpu_core_irq_callback_template,
879 TP_PROTO(int irq_idx, struct dpu_irq_callback *callback),
880 TP_ARGS(irq_idx, callback),
881 TP_STRUCT__entry(
882 __field( int, irq_idx )
883 __field( struct dpu_irq_callback *, callback)
884 ),
885 TP_fast_assign(
886 __entry->irq_idx = irq_idx;
887 __entry->callback = callback;
888 ),
889 TP_printk("irq_idx:%d callback:%pK", __entry->irq_idx,
890 __entry->callback)
891);
892DEFINE_EVENT(dpu_core_irq_callback_template, dpu_core_irq_register_callback,
893 TP_PROTO(int irq_idx, struct dpu_irq_callback *callback),
894 TP_ARGS(irq_idx, callback)
895);
896DEFINE_EVENT(dpu_core_irq_callback_template, dpu_core_irq_unregister_callback,
897 TP_PROTO(int irq_idx, struct dpu_irq_callback *callback),
898 TP_ARGS(irq_idx, callback)
899);
900
901TRACE_EVENT(dpu_core_perf_update_clk,
902 TP_PROTO(struct drm_device *dev, bool stop_req, u64 clk_rate),
903 TP_ARGS(dev, stop_req, clk_rate),
904 TP_STRUCT__entry(
905 __string( dev_name, dev->unique )
906 __field( bool, stop_req )
907 __field( u64, clk_rate )
908 ),
909 TP_fast_assign(
910 __assign_str(dev_name, dev->unique);
911 __entry->stop_req = stop_req;
912 __entry->clk_rate = clk_rate;
913 ),
914 TP_printk("dev:%s stop_req:%s clk_rate:%llu", __get_str(dev_name),
915 __entry->stop_req ? "true" : "false", __entry->clk_rate)
916);
917
918TRACE_EVENT(dpu_hw_ctl_update_pending_flush,
919 TP_PROTO(u32 new_bits, u32 pending_mask),
920 TP_ARGS(new_bits, pending_mask),
921 TP_STRUCT__entry(
922 __field( u32, new_bits )
923 __field( u32, pending_mask )
924 ),
925 TP_fast_assign(
926 __entry->new_bits = new_bits;
927 __entry->pending_mask = pending_mask;
928 ),
929 TP_printk("new=%x existing=%x", __entry->new_bits,
930 __entry->pending_mask)
931);
932
933DECLARE_EVENT_CLASS(dpu_hw_ctl_pending_flush_template,
934 TP_PROTO(u32 pending_mask, u32 ctl_flush),
935 TP_ARGS(pending_mask, ctl_flush),
936 TP_STRUCT__entry(
937 __field( u32, pending_mask )
938 __field( u32, ctl_flush )
939 ),
940 TP_fast_assign(
941 __entry->pending_mask = pending_mask;
942 __entry->ctl_flush = ctl_flush;
943 ),
944 TP_printk("pending_mask=%x CTL_FLUSH=%x", __entry->pending_mask,
945 __entry->ctl_flush)
946);
947DEFINE_EVENT(dpu_hw_ctl_pending_flush_template, dpu_hw_ctl_clear_pending_flush,
948 TP_PROTO(u32 pending_mask, u32 ctl_flush),
949 TP_ARGS(pending_mask, ctl_flush)
950);
951DEFINE_EVENT(dpu_hw_ctl_pending_flush_template,
952 dpu_hw_ctl_trigger_pending_flush,
953 TP_PROTO(u32 pending_mask, u32 ctl_flush),
954 TP_ARGS(pending_mask, ctl_flush)
955);
956DEFINE_EVENT(dpu_hw_ctl_pending_flush_template, dpu_hw_ctl_trigger_prepare,
957 TP_PROTO(u32 pending_mask, u32 ctl_flush),
958 TP_ARGS(pending_mask, ctl_flush)
959);
960DEFINE_EVENT(dpu_hw_ctl_pending_flush_template, dpu_hw_ctl_trigger_start,
961 TP_PROTO(u32 pending_mask, u32 ctl_flush),
962 TP_ARGS(pending_mask, ctl_flush)
963);
964
965#define DPU_ATRACE_END(name) trace_tracing_mark_write(current->tgid, name, 0)
966#define DPU_ATRACE_BEGIN(name) trace_tracing_mark_write(current->tgid, name, 1)
967#define DPU_ATRACE_FUNC() DPU_ATRACE_BEGIN(__func__)
968
969#define DPU_ATRACE_INT(name, value) \
970 trace_dpu_trace_counter(current->tgid, name, value)
971
972#endif
973
974
975#undef TRACE_INCLUDE_PATH
976#define TRACE_INCLUDE_PATH .
977#include <trace/define_trace.h>
978
