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6
7#include <drm/drm_print.h>
8#include <drm/drm_vblank.h>
9
10#include "msm_drv.h"
11#include "mdp4_kms.h"
12
13void mdp4_set_irqmask(struct mdp_kms *mdp_kms, uint32_t irqmask,
14 uint32_t old_irqmask)
15{
16 mdp4_write(to_mdp4_kms(mdp_kms), REG_MDP4_INTR_CLEAR,
17 irqmask ^ (irqmask & old_irqmask));
18 mdp4_write(to_mdp4_kms(mdp_kms), REG_MDP4_INTR_ENABLE, irqmask);
19}
20
21static void mdp4_irq_error_handler(struct mdp_irq *irq, uint32_t irqstatus)
22{
23 struct mdp4_kms *mdp4_kms = container_of(irq, struct mdp4_kms, error_handler);
24 static DEFINE_RATELIMIT_STATE(rs, 5*HZ, 1);
25 extern bool dumpstate;
26
27 DRM_ERROR_RATELIMITED("errors: %08x\n", irqstatus);
28
29 if (dumpstate && __ratelimit(&rs)) {
30 struct drm_printer p = drm_info_printer(mdp4_kms->dev->dev);
31 drm_state_dump(mdp4_kms->dev, &p);
32 }
33}
34
35void mdp4_irq_preinstall(struct msm_kms *kms)
36{
37 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
38 mdp4_enable(mdp4_kms);
39 mdp4_write(mdp4_kms, REG_MDP4_INTR_CLEAR, 0xffffffff);
40 mdp4_write(mdp4_kms, REG_MDP4_INTR_ENABLE, 0x00000000);
41 mdp4_disable(mdp4_kms);
42}
43
44int mdp4_irq_postinstall(struct msm_kms *kms)
45{
46 struct mdp_kms *mdp_kms = to_mdp_kms(kms);
47 struct mdp4_kms *mdp4_kms = to_mdp4_kms(mdp_kms);
48 struct mdp_irq *error_handler = &mdp4_kms->error_handler;
49
50 error_handler->irq = mdp4_irq_error_handler;
51 error_handler->irqmask = MDP4_IRQ_PRIMARY_INTF_UDERRUN |
52 MDP4_IRQ_EXTERNAL_INTF_UDERRUN;
53
54 mdp_irq_register(mdp_kms, error_handler);
55
56 return 0;
57}
58
59void mdp4_irq_uninstall(struct msm_kms *kms)
60{
61 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
62 mdp4_enable(mdp4_kms);
63 mdp4_write(mdp4_kms, REG_MDP4_INTR_ENABLE, 0x00000000);
64 mdp4_disable(mdp4_kms);
65}
66
67irqreturn_t mdp4_irq(struct msm_kms *kms)
68{
69 struct mdp_kms *mdp_kms = to_mdp_kms(kms);
70 struct mdp4_kms *mdp4_kms = to_mdp4_kms(mdp_kms);
71 struct drm_device *dev = mdp4_kms->dev;
72 struct msm_drm_private *priv = dev->dev_private;
73 unsigned int id;
74 uint32_t status, enable;
75
76 enable = mdp4_read(mdp4_kms, REG_MDP4_INTR_ENABLE);
77 status = mdp4_read(mdp4_kms, REG_MDP4_INTR_STATUS) & enable;
78 mdp4_write(mdp4_kms, REG_MDP4_INTR_CLEAR, status);
79
80 VERB("status=%08x", status);
81
82 mdp_dispatch_irqs(mdp_kms, status);
83
84 for (id = 0; id < priv->num_crtcs; id++)
85 if (status & mdp4_crtc_vblank(priv->crtcs[id]))
86 drm_handle_vblank(dev, id);
87
88 return IRQ_HANDLED;
89}
90
91int mdp4_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc)
92{
93 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
94
95 mdp4_enable(mdp4_kms);
96 mdp_update_vblank_mask(to_mdp_kms(kms),
97 mdp4_crtc_vblank(crtc), true);
98 mdp4_disable(mdp4_kms);
99
100 return 0;
101}
102
103void mdp4_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc)
104{
105 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
106
107 mdp4_enable(mdp4_kms);
108 mdp_update_vblank_mask(to_mdp_kms(kms),
109 mdp4_crtc_vblank(crtc), false);
110 mdp4_disable(mdp4_kms);
111}
112
