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7#include <drm/drm_atomic.h>
8#include <drm/drm_damage_helper.h>
9#include <drm/drm_fourcc.h>
10
11#include "mdp4_kms.h"
12
13#define DOWN_SCALE_MAX 8
14#define UP_SCALE_MAX 8
15
16struct mdp4_plane {
17 struct drm_plane base;
18 const char *name;
19
20 enum mdp4_pipe pipe;
21
22 uint32_t caps;
23 uint32_t nformats;
24 uint32_t formats[32];
25
26 bool enabled;
27};
28#define to_mdp4_plane(x) container_of(x, struct mdp4_plane, base)
29
30
31static inline
32enum mdp4_frame_format mdp4_get_frame_format(struct drm_framebuffer *fb)
33{
34 bool is_tile = false;
35
36 if (fb->modifier == DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
37 is_tile = true;
38
39 if (fb->format->format == DRM_FORMAT_NV12 && is_tile)
40 return FRAME_TILE_YCBCR_420;
41
42 return FRAME_LINEAR;
43}
44
45static void mdp4_plane_set_scanout(struct drm_plane *plane,
46 struct drm_framebuffer *fb);
47static int mdp4_plane_mode_set(struct drm_plane *plane,
48 struct drm_crtc *crtc, struct drm_framebuffer *fb,
49 int crtc_x, int crtc_y,
50 unsigned int crtc_w, unsigned int crtc_h,
51 uint32_t src_x, uint32_t src_y,
52 uint32_t src_w, uint32_t src_h);
53
54static struct mdp4_kms *get_kms(struct drm_plane *plane)
55{
56 struct msm_drm_private *priv = plane->dev->dev_private;
57 return to_mdp4_kms(to_mdp_kms(priv->kms));
58}
59
60static void mdp4_plane_destroy(struct drm_plane *plane)
61{
62 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
63
64 drm_plane_cleanup(plane);
65
66 kfree(mdp4_plane);
67}
68
69
70static void mdp4_plane_install_properties(struct drm_plane *plane,
71 struct drm_mode_object *obj)
72{
73
74}
75
76static int mdp4_plane_set_property(struct drm_plane *plane,
77 struct drm_property *property, uint64_t val)
78{
79
80 return -EINVAL;
81}
82
83static const struct drm_plane_funcs mdp4_plane_funcs = {
84 .update_plane = drm_atomic_helper_update_plane,
85 .disable_plane = drm_atomic_helper_disable_plane,
86 .destroy = mdp4_plane_destroy,
87 .set_property = mdp4_plane_set_property,
88 .reset = drm_atomic_helper_plane_reset,
89 .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
90 .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
91};
92
93static void mdp4_plane_cleanup_fb(struct drm_plane *plane,
94 struct drm_plane_state *old_state)
95{
96 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
97 struct mdp4_kms *mdp4_kms = get_kms(plane);
98 struct msm_kms *kms = &mdp4_kms->base.base;
99 struct drm_framebuffer *fb = old_state->fb;
100
101 if (!fb)
102 return;
103
104 DBG("%s: cleanup: FB[%u]", mdp4_plane->name, fb->base.id);
105 msm_framebuffer_cleanup(fb, kms->aspace);
106}
107
108
109static int mdp4_plane_atomic_check(struct drm_plane *plane,
110 struct drm_atomic_state *state)
111{
112 return 0;
113}
114
115static void mdp4_plane_atomic_update(struct drm_plane *plane,
116 struct drm_atomic_state *state)
117{
118 struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
119 plane);
120 int ret;
121
122 ret = mdp4_plane_mode_set(plane,
123 new_state->crtc, new_state->fb,
124 new_state->crtc_x, new_state->crtc_y,
125 new_state->crtc_w, new_state->crtc_h,
126 new_state->src_x, new_state->src_y,
127 new_state->src_w, new_state->src_h);
128
129 WARN_ON(ret < 0);
130}
131
132static const struct drm_plane_helper_funcs mdp4_plane_helper_funcs = {
133 .prepare_fb = msm_atomic_prepare_fb,
134 .cleanup_fb = mdp4_plane_cleanup_fb,
135 .atomic_check = mdp4_plane_atomic_check,
136 .atomic_update = mdp4_plane_atomic_update,
137};
138
139static void mdp4_plane_set_scanout(struct drm_plane *plane,
140 struct drm_framebuffer *fb)
141{
142 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
143 struct mdp4_kms *mdp4_kms = get_kms(plane);
144 struct msm_kms *kms = &mdp4_kms->base.base;
145 enum mdp4_pipe pipe = mdp4_plane->pipe;
146
147 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_A(pipe),
148 MDP4_PIPE_SRC_STRIDE_A_P0(fb->pitches[0]) |
149 MDP4_PIPE_SRC_STRIDE_A_P1(fb->pitches[1]));
150
151 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_B(pipe),
152 MDP4_PIPE_SRC_STRIDE_B_P2(fb->pitches[2]) |
153 MDP4_PIPE_SRC_STRIDE_B_P3(fb->pitches[3]));
154
155 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP0_BASE(pipe),
156 msm_framebuffer_iova(fb, kms->aspace, 0));
157 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP1_BASE(pipe),
158 msm_framebuffer_iova(fb, kms->aspace, 1));
159 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP2_BASE(pipe),
160 msm_framebuffer_iova(fb, kms->aspace, 2));
161 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP3_BASE(pipe),
162 msm_framebuffer_iova(fb, kms->aspace, 3));
163}
164
165static void mdp4_write_csc_config(struct mdp4_kms *mdp4_kms,
166 enum mdp4_pipe pipe, struct csc_cfg *csc)
167{
168 int i;
169
170 for (i = 0; i < ARRAY_SIZE(csc->matrix); i++) {
171 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_MV(pipe, i),
172 csc->matrix[i]);
173 }
174
175 for (i = 0; i < ARRAY_SIZE(csc->post_bias) ; i++) {
176 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_BV(pipe, i),
177 csc->pre_bias[i]);
178
179 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_BV(pipe, i),
180 csc->post_bias[i]);
181 }
182
183 for (i = 0; i < ARRAY_SIZE(csc->post_clamp) ; i++) {
184 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_LV(pipe, i),
185 csc->pre_clamp[i]);
186
187 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_LV(pipe, i),
188 csc->post_clamp[i]);
189 }
190}
191
192#define MDP4_VG_PHASE_STEP_DEFAULT 0x20000000
193
194static int mdp4_plane_mode_set(struct drm_plane *plane,
195 struct drm_crtc *crtc, struct drm_framebuffer *fb,
196 int crtc_x, int crtc_y,
197 unsigned int crtc_w, unsigned int crtc_h,
198 uint32_t src_x, uint32_t src_y,
199 uint32_t src_w, uint32_t src_h)
200{
201 struct drm_device *dev = plane->dev;
202 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
203 struct mdp4_kms *mdp4_kms = get_kms(plane);
204 enum mdp4_pipe pipe = mdp4_plane->pipe;
205 const struct mdp_format *format;
206 uint32_t op_mode = 0;
207 uint32_t phasex_step = MDP4_VG_PHASE_STEP_DEFAULT;
208 uint32_t phasey_step = MDP4_VG_PHASE_STEP_DEFAULT;
209 enum mdp4_frame_format frame_type;
210
211 if (!(crtc && fb)) {
212 DBG("%s: disabled!", mdp4_plane->name);
213 return 0;
214 }
215
216 frame_type = mdp4_get_frame_format(fb);
217
218
219 src_x = src_x >> 16;
220 src_y = src_y >> 16;
221 src_w = src_w >> 16;
222 src_h = src_h >> 16;
223
224 DBG("%s: FB[%u] %u,%u,%u,%u -> CRTC[%u] %d,%d,%u,%u", mdp4_plane->name,
225 fb->base.id, src_x, src_y, src_w, src_h,
226 crtc->base.id, crtc_x, crtc_y, crtc_w, crtc_h);
227
228 format = to_mdp_format(msm_framebuffer_format(fb));
229
230 if (src_w > (crtc_w * DOWN_SCALE_MAX)) {
231 DRM_DEV_ERROR(dev->dev, "Width down scaling exceeds limits!\n");
232 return -ERANGE;
233 }
234
235 if (src_h > (crtc_h * DOWN_SCALE_MAX)) {
236 DRM_DEV_ERROR(dev->dev, "Height down scaling exceeds limits!\n");
237 return -ERANGE;
238 }
239
240 if (crtc_w > (src_w * UP_SCALE_MAX)) {
241 DRM_DEV_ERROR(dev->dev, "Width up scaling exceeds limits!\n");
242 return -ERANGE;
243 }
244
245 if (crtc_h > (src_h * UP_SCALE_MAX)) {
246 DRM_DEV_ERROR(dev->dev, "Height up scaling exceeds limits!\n");
247 return -ERANGE;
248 }
249
250 if (src_w != crtc_w) {
251 uint32_t sel_unit = SCALE_FIR;
252 op_mode |= MDP4_PIPE_OP_MODE_SCALEX_EN;
253
254 if (MDP_FORMAT_IS_YUV(format)) {
255 if (crtc_w > src_w)
256 sel_unit = SCALE_PIXEL_RPT;
257 else if (crtc_w <= (src_w / 4))
258 sel_unit = SCALE_MN_PHASE;
259
260 op_mode |= MDP4_PIPE_OP_MODE_SCALEX_UNIT_SEL(sel_unit);
261 phasex_step = mult_frac(MDP4_VG_PHASE_STEP_DEFAULT,
262 src_w, crtc_w);
263 }
264 }
265
266 if (src_h != crtc_h) {
267 uint32_t sel_unit = SCALE_FIR;
268 op_mode |= MDP4_PIPE_OP_MODE_SCALEY_EN;
269
270 if (MDP_FORMAT_IS_YUV(format)) {
271
272 if (crtc_h > src_h)
273 sel_unit = SCALE_PIXEL_RPT;
274 else if (crtc_h <= (src_h / 4))
275 sel_unit = SCALE_MN_PHASE;
276
277 op_mode |= MDP4_PIPE_OP_MODE_SCALEY_UNIT_SEL(sel_unit);
278 phasey_step = mult_frac(MDP4_VG_PHASE_STEP_DEFAULT,
279 src_h, crtc_h);
280 }
281 }
282
283 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_SIZE(pipe),
284 MDP4_PIPE_SRC_SIZE_WIDTH(src_w) |
285 MDP4_PIPE_SRC_SIZE_HEIGHT(src_h));
286
287 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_XY(pipe),
288 MDP4_PIPE_SRC_XY_X(src_x) |
289 MDP4_PIPE_SRC_XY_Y(src_y));
290
291 mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_SIZE(pipe),
292 MDP4_PIPE_DST_SIZE_WIDTH(crtc_w) |
293 MDP4_PIPE_DST_SIZE_HEIGHT(crtc_h));
294
295 mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_XY(pipe),
296 MDP4_PIPE_DST_XY_X(crtc_x) |
297 MDP4_PIPE_DST_XY_Y(crtc_y));
298
299 mdp4_plane_set_scanout(plane, fb);
300
301 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_FORMAT(pipe),
302 MDP4_PIPE_SRC_FORMAT_A_BPC(format->bpc_a) |
303 MDP4_PIPE_SRC_FORMAT_R_BPC(format->bpc_r) |
304 MDP4_PIPE_SRC_FORMAT_G_BPC(format->bpc_g) |
305 MDP4_PIPE_SRC_FORMAT_B_BPC(format->bpc_b) |
306 COND(format->alpha_enable, MDP4_PIPE_SRC_FORMAT_ALPHA_ENABLE) |
307 MDP4_PIPE_SRC_FORMAT_CPP(format->cpp - 1) |
308 MDP4_PIPE_SRC_FORMAT_UNPACK_COUNT(format->unpack_count - 1) |
309 MDP4_PIPE_SRC_FORMAT_FETCH_PLANES(format->fetch_type) |
310 MDP4_PIPE_SRC_FORMAT_CHROMA_SAMP(format->chroma_sample) |
311 MDP4_PIPE_SRC_FORMAT_FRAME_FORMAT(frame_type) |
312 COND(format->unpack_tight, MDP4_PIPE_SRC_FORMAT_UNPACK_TIGHT));
313
314 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_UNPACK(pipe),
315 MDP4_PIPE_SRC_UNPACK_ELEM0(format->unpack[0]) |
316 MDP4_PIPE_SRC_UNPACK_ELEM1(format->unpack[1]) |
317 MDP4_PIPE_SRC_UNPACK_ELEM2(format->unpack[2]) |
318 MDP4_PIPE_SRC_UNPACK_ELEM3(format->unpack[3]));
319
320 if (MDP_FORMAT_IS_YUV(format)) {
321 struct csc_cfg *csc = mdp_get_default_csc_cfg(CSC_YUV2RGB);
322
323 op_mode |= MDP4_PIPE_OP_MODE_SRC_YCBCR;
324 op_mode |= MDP4_PIPE_OP_MODE_CSC_EN;
325 mdp4_write_csc_config(mdp4_kms, pipe, csc);
326 }
327
328 mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(pipe), op_mode);
329 mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEX_STEP(pipe), phasex_step);
330 mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEY_STEP(pipe), phasey_step);
331
332 if (frame_type != FRAME_LINEAR)
333 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SSTILE_FRAME_SIZE(pipe),
334 MDP4_PIPE_SSTILE_FRAME_SIZE_WIDTH(src_w) |
335 MDP4_PIPE_SSTILE_FRAME_SIZE_HEIGHT(src_h));
336
337 return 0;
338}
339
340static const char *pipe_names[] = {
341 "VG1", "VG2",
342 "RGB1", "RGB2", "RGB3",
343 "VG3", "VG4",
344};
345
346enum mdp4_pipe mdp4_plane_pipe(struct drm_plane *plane)
347{
348 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
349 return mdp4_plane->pipe;
350}
351
352static const uint64_t supported_format_modifiers[] = {
353 DRM_FORMAT_MOD_SAMSUNG_64_32_TILE,
354 DRM_FORMAT_MOD_LINEAR,
355 DRM_FORMAT_MOD_INVALID
356};
357
358
359struct drm_plane *mdp4_plane_init(struct drm_device *dev,
360 enum mdp4_pipe pipe_id, bool private_plane)
361{
362 struct drm_plane *plane = NULL;
363 struct mdp4_plane *mdp4_plane;
364 int ret;
365 enum drm_plane_type type;
366
367 mdp4_plane = kzalloc(sizeof(*mdp4_plane), GFP_KERNEL);
368 if (!mdp4_plane) {
369 ret = -ENOMEM;
370 goto fail;
371 }
372
373 plane = &mdp4_plane->base;
374
375 mdp4_plane->pipe = pipe_id;
376 mdp4_plane->name = pipe_names[pipe_id];
377 mdp4_plane->caps = mdp4_pipe_caps(pipe_id);
378
379 mdp4_plane->nformats = mdp_get_formats(mdp4_plane->formats,
380 ARRAY_SIZE(mdp4_plane->formats),
381 !pipe_supports_yuv(mdp4_plane->caps));
382
383 type = private_plane ? DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY;
384 ret = drm_universal_plane_init(dev, plane, 0xff, &mdp4_plane_funcs,
385 mdp4_plane->formats, mdp4_plane->nformats,
386 supported_format_modifiers, type, NULL);
387 if (ret)
388 goto fail;
389
390 drm_plane_helper_add(plane, &mdp4_plane_helper_funcs);
391
392 mdp4_plane_install_properties(plane, &plane->base);
393
394 drm_plane_enable_fb_damage_clips(plane);
395
396 return plane;
397
398fail:
399 if (plane)
400 mdp4_plane_destroy(plane);
401
402 return ERR_PTR(ret);
403}
404
