linux/drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c
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   1/*
   2 * Copyright 2013 Red Hat Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: Ben Skeggs <bskeggs@redhat.com>
  23 */
  24#include "ctrl.h"
  25
  26#include <core/client.h>
  27#include <subdev/clk.h>
  28
  29#include <nvif/class.h>
  30#include <nvif/if0001.h>
  31#include <nvif/ioctl.h>
  32#include <nvif/unpack.h>
  33
  34static int
  35nvkm_control_mthd_pstate_info(struct nvkm_control *ctrl, void *data, u32 size)
  36{
  37        union {
  38                struct nvif_control_pstate_info_v0 v0;
  39        } *args = data;
  40        struct nvkm_clk *clk = ctrl->device->clk;
  41        int ret = -ENOSYS;
  42
  43        nvif_ioctl(&ctrl->object, "control pstate info size %d\n", size);
  44        if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) {
  45                nvif_ioctl(&ctrl->object, "control pstate info vers %d\n",
  46                           args->v0.version);
  47        } else
  48                return ret;
  49
  50        if (clk) {
  51                args->v0.count = clk->state_nr;
  52                args->v0.ustate_ac = clk->ustate_ac;
  53                args->v0.ustate_dc = clk->ustate_dc;
  54                args->v0.pwrsrc = clk->pwrsrc;
  55                args->v0.pstate = clk->pstate;
  56        } else {
  57                args->v0.count = 0;
  58                args->v0.ustate_ac = NVIF_CONTROL_PSTATE_INFO_V0_USTATE_DISABLE;
  59                args->v0.ustate_dc = NVIF_CONTROL_PSTATE_INFO_V0_USTATE_DISABLE;
  60                args->v0.pwrsrc = -ENODEV;
  61                args->v0.pstate = NVIF_CONTROL_PSTATE_INFO_V0_PSTATE_UNKNOWN;
  62        }
  63
  64        return 0;
  65}
  66
  67static int
  68nvkm_control_mthd_pstate_attr(struct nvkm_control *ctrl, void *data, u32 size)
  69{
  70        union {
  71                struct nvif_control_pstate_attr_v0 v0;
  72        } *args = data;
  73        struct nvkm_clk *clk = ctrl->device->clk;
  74        const struct nvkm_domain *domain;
  75        struct nvkm_pstate *pstate;
  76        struct nvkm_cstate *cstate;
  77        int i = 0, j = -1;
  78        u32 lo, hi;
  79        int ret = -ENOSYS;
  80
  81        nvif_ioctl(&ctrl->object, "control pstate attr size %d\n", size);
  82        if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) {
  83                nvif_ioctl(&ctrl->object,
  84                           "control pstate attr vers %d state %d index %d\n",
  85                           args->v0.version, args->v0.state, args->v0.index);
  86                if (!clk)
  87                        return -ENODEV;
  88                if (args->v0.state < NVIF_CONTROL_PSTATE_ATTR_V0_STATE_CURRENT)
  89                        return -EINVAL;
  90                if (args->v0.state >= clk->state_nr)
  91                        return -EINVAL;
  92        } else
  93                return ret;
  94        domain = clk->domains;
  95
  96        while (domain->name != nv_clk_src_max) {
  97                if (domain->mname && ++j == args->v0.index)
  98                        break;
  99                domain++;
 100        }
 101
 102        if (domain->name == nv_clk_src_max)
 103                return -EINVAL;
 104
 105        if (args->v0.state != NVIF_CONTROL_PSTATE_ATTR_V0_STATE_CURRENT) {
 106                list_for_each_entry(pstate, &clk->states, head) {
 107                        if (i++ == args->v0.state)
 108                                break;
 109                }
 110
 111                lo = pstate->base.domain[domain->name];
 112                hi = lo;
 113                list_for_each_entry(cstate, &pstate->list, head) {
 114                        lo = min(lo, cstate->domain[domain->name]);
 115                        hi = max(hi, cstate->domain[domain->name]);
 116                }
 117
 118                args->v0.state = pstate->pstate;
 119        } else {
 120                lo = max(nvkm_clk_read(clk, domain->name), 0);
 121                hi = lo;
 122        }
 123
 124        snprintf(args->v0.name, sizeof(args->v0.name), "%s", domain->mname);
 125        snprintf(args->v0.unit, sizeof(args->v0.unit), "MHz");
 126        args->v0.min = lo / domain->mdiv;
 127        args->v0.max = hi / domain->mdiv;
 128
 129        args->v0.index = 0;
 130        while ((++domain)->name != nv_clk_src_max) {
 131                if (domain->mname) {
 132                        args->v0.index = ++j;
 133                        break;
 134                }
 135        }
 136
 137        return 0;
 138}
 139
 140static int
 141nvkm_control_mthd_pstate_user(struct nvkm_control *ctrl, void *data, u32 size)
 142{
 143        union {
 144                struct nvif_control_pstate_user_v0 v0;
 145        } *args = data;
 146        struct nvkm_clk *clk = ctrl->device->clk;
 147        int ret = -ENOSYS;
 148
 149        nvif_ioctl(&ctrl->object, "control pstate user size %d\n", size);
 150        if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) {
 151                nvif_ioctl(&ctrl->object,
 152                           "control pstate user vers %d ustate %d pwrsrc %d\n",
 153                           args->v0.version, args->v0.ustate, args->v0.pwrsrc);
 154                if (!clk)
 155                        return -ENODEV;
 156        } else
 157                return ret;
 158
 159        if (args->v0.pwrsrc >= 0) {
 160                ret |= nvkm_clk_ustate(clk, args->v0.ustate, args->v0.pwrsrc);
 161        } else {
 162                ret |= nvkm_clk_ustate(clk, args->v0.ustate, 0);
 163                ret |= nvkm_clk_ustate(clk, args->v0.ustate, 1);
 164        }
 165
 166        return ret;
 167}
 168
 169static int
 170nvkm_control_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size)
 171{
 172        struct nvkm_control *ctrl = nvkm_control(object);
 173        switch (mthd) {
 174        case NVIF_CONTROL_PSTATE_INFO:
 175                return nvkm_control_mthd_pstate_info(ctrl, data, size);
 176        case NVIF_CONTROL_PSTATE_ATTR:
 177                return nvkm_control_mthd_pstate_attr(ctrl, data, size);
 178        case NVIF_CONTROL_PSTATE_USER:
 179                return nvkm_control_mthd_pstate_user(ctrl, data, size);
 180        default:
 181                break;
 182        }
 183        return -EINVAL;
 184}
 185
 186static const struct nvkm_object_func
 187nvkm_control = {
 188        .mthd = nvkm_control_mthd,
 189};
 190
 191static int
 192nvkm_control_new(struct nvkm_device *device, const struct nvkm_oclass *oclass,
 193                 void *data, u32 size, struct nvkm_object **pobject)
 194{
 195        struct nvkm_control *ctrl;
 196
 197        if (!(ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL)))
 198                return -ENOMEM;
 199        *pobject = &ctrl->object;
 200        ctrl->device = device;
 201
 202        nvkm_object_ctor(&nvkm_control, oclass, &ctrl->object);
 203        return 0;
 204}
 205
 206const struct nvkm_device_oclass
 207nvkm_control_oclass = {
 208        .base.oclass = NVIF_CLASS_CONTROL,
 209        .base.minver = -1,
 210        .base.maxver = -1,
 211        .ctor = nvkm_control_new,
 212};
 213