1/* SPDX-License-Identifier: MIT */ 2#ifndef __NV50_BAR_H__ 3#define __NV50_BAR_H__ 4#define nv50_bar(p) container_of((p), struct nv50_bar, base) 5#include "priv.h" 6 7struct nv50_bar { 8 struct nvkm_bar base; 9 u32 pgd_addr; 10 struct nvkm_gpuobj *mem; 11 struct nvkm_gpuobj *pad; 12 struct nvkm_gpuobj *pgd; 13 struct nvkm_vmm *bar1_vmm; 14 struct nvkm_gpuobj *bar1; 15 struct nvkm_vmm *bar2_vmm; 16 struct nvkm_gpuobj *bar2; 17}; 18 19int nv50_bar_new_(const struct nvkm_bar_func *, struct nvkm_device *, enum nvkm_subdev_type, 20 int, u32 pgd_addr, struct nvkm_bar **); 21void *nv50_bar_dtor(struct nvkm_bar *); 22int nv50_bar_oneinit(struct nvkm_bar *); 23void nv50_bar_init(struct nvkm_bar *); 24void nv50_bar_bar1_init(struct nvkm_bar *); 25void nv50_bar_bar1_wait(struct nvkm_bar *); 26struct nvkm_vmm *nv50_bar_bar1_vmm(struct nvkm_bar *); 27void nv50_bar_bar2_init(struct nvkm_bar *); 28struct nvkm_vmm *nv50_bar_bar2_vmm(struct nvkm_bar *); 29#endif 30