linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/therm.c
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   1/*
   2 * Copyright 2012 Nouveau Community
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: Martin Peres
  23 */
  24#include <subdev/bios.h>
  25#include <subdev/bios/bit.h>
  26#include <subdev/bios/therm.h>
  27
  28static u32
  29therm_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *len, u8 *cnt)
  30{
  31        struct bit_entry bit_P;
  32        u32 therm = 0;
  33
  34        if (!bit_entry(bios, 'P', &bit_P)) {
  35                if (bit_P.version == 1)
  36                        therm = nvbios_rd32(bios, bit_P.offset + 12);
  37                else if (bit_P.version == 2)
  38                        therm = nvbios_rd32(bios, bit_P.offset + 16);
  39                else
  40                        nvkm_error(&bios->subdev,
  41                                   "unknown offset for thermal in BIT P %d\n",
  42                                   bit_P.version);
  43        }
  44
  45        /* exit now if we haven't found the thermal table */
  46        if (!therm)
  47                return 0;
  48
  49        *ver = nvbios_rd08(bios, therm + 0);
  50        *hdr = nvbios_rd08(bios, therm + 1);
  51        *len = nvbios_rd08(bios, therm + 2);
  52        *cnt = nvbios_rd08(bios, therm + 3);
  53        return therm + nvbios_rd08(bios, therm + 1);
  54}
  55
  56static u32
  57nvbios_therm_entry(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len)
  58{
  59        u8 hdr, cnt;
  60        u32 therm = therm_table(bios, ver, &hdr, len, &cnt);
  61        if (therm && idx < cnt)
  62                return therm + idx * *len;
  63        return 0;
  64}
  65
  66int
  67nvbios_therm_sensor_parse(struct nvkm_bios *bios,
  68                          enum nvbios_therm_domain domain,
  69                          struct nvbios_therm_sensor *sensor)
  70{
  71        s8 thrs_section, sensor_section, offset;
  72        u8 ver, len, i;
  73        u32 entry;
  74
  75        /* we only support the core domain for now */
  76        if (domain != NVBIOS_THERM_DOMAIN_CORE)
  77                return -EINVAL;
  78
  79        /* Read the entries from the table */
  80        thrs_section = 0;
  81        sensor_section = -1;
  82        i = 0;
  83        while ((entry = nvbios_therm_entry(bios, i++, &ver, &len))) {
  84                s16 value = nvbios_rd16(bios, entry + 1);
  85
  86                switch (nvbios_rd08(bios, entry + 0)) {
  87                case 0x0:
  88                        thrs_section = value;
  89                        if (value > 0)
  90                                return 0; /* we do not try to support ambient */
  91                        break;
  92                case 0x01:
  93                        sensor_section++;
  94                        if (sensor_section == 0) {
  95                                offset = ((s8) nvbios_rd08(bios, entry + 2)) / 2;
  96                                sensor->offset_constant = offset;
  97                        }
  98                        break;
  99
 100                case 0x04:
 101                        if (thrs_section == 0) {
 102                                sensor->thrs_critical.temp = (value & 0xff0) >> 4;
 103                                sensor->thrs_critical.hysteresis = value & 0xf;
 104                        }
 105                        break;
 106
 107                case 0x07:
 108                        if (thrs_section == 0) {
 109                                sensor->thrs_down_clock.temp = (value & 0xff0) >> 4;
 110                                sensor->thrs_down_clock.hysteresis = value & 0xf;
 111                        }
 112                        break;
 113
 114                case 0x08:
 115                        if (thrs_section == 0) {
 116                                sensor->thrs_fan_boost.temp = (value & 0xff0) >> 4;
 117                                sensor->thrs_fan_boost.hysteresis = value & 0xf;
 118                        }
 119                        break;
 120
 121                case 0x10:
 122                        if (sensor_section == 0)
 123                                sensor->offset_num = value;
 124                        break;
 125
 126                case 0x11:
 127                        if (sensor_section == 0)
 128                                sensor->offset_den = value;
 129                        break;
 130
 131                case 0x12:
 132                        if (sensor_section == 0)
 133                                sensor->slope_mult = value;
 134                        break;
 135
 136                case 0x13:
 137                        if (sensor_section == 0)
 138                                sensor->slope_div = value;
 139                        break;
 140                case 0x32:
 141                        if (thrs_section == 0) {
 142                                sensor->thrs_shutdown.temp = (value & 0xff0) >> 4;
 143                                sensor->thrs_shutdown.hysteresis = value & 0xf;
 144                        }
 145                        break;
 146                }
 147        }
 148
 149        return 0;
 150}
 151
 152int
 153nvbios_therm_fan_parse(struct nvkm_bios *bios, struct nvbios_therm_fan *fan)
 154{
 155        struct nvbios_therm_trip_point *cur_trip = NULL;
 156        u8 ver, len, i;
 157        u32 entry;
 158
 159        uint8_t duty_lut[] = { 0, 0, 25, 0, 40, 0, 50, 0,
 160                                75, 0, 85, 0, 100, 0, 100, 0 };
 161
 162        i = 0;
 163        fan->nr_fan_trip = 0;
 164        fan->fan_mode = NVBIOS_THERM_FAN_OTHER;
 165        while ((entry = nvbios_therm_entry(bios, i++, &ver, &len))) {
 166                s16 value = nvbios_rd16(bios, entry + 1);
 167
 168                switch (nvbios_rd08(bios, entry + 0)) {
 169                case 0x22:
 170                        fan->min_duty = value & 0xff;
 171                        fan->max_duty = (value & 0xff00) >> 8;
 172                        break;
 173                case 0x24:
 174                        fan->nr_fan_trip++;
 175                        if (fan->fan_mode > NVBIOS_THERM_FAN_TRIP)
 176                                fan->fan_mode = NVBIOS_THERM_FAN_TRIP;
 177                        cur_trip = &fan->trip[fan->nr_fan_trip - 1];
 178                        cur_trip->hysteresis = value & 0xf;
 179                        cur_trip->temp = (value & 0xff0) >> 4;
 180                        cur_trip->fan_duty = duty_lut[(value & 0xf000) >> 12];
 181                        break;
 182                case 0x25:
 183                        cur_trip = &fan->trip[fan->nr_fan_trip - 1];
 184                        cur_trip->fan_duty = value;
 185                        break;
 186                case 0x26:
 187                        if (!fan->pwm_freq)
 188                                fan->pwm_freq = value;
 189                        break;
 190                case 0x3b:
 191                        fan->bump_period = value;
 192                        break;
 193                case 0x3c:
 194                        fan->slow_down_period = value;
 195                        break;
 196                case 0x46:
 197                        if (fan->fan_mode > NVBIOS_THERM_FAN_LINEAR)
 198                                fan->fan_mode = NVBIOS_THERM_FAN_LINEAR;
 199                        fan->linear_min_temp = nvbios_rd08(bios, entry + 1);
 200                        fan->linear_max_temp = nvbios_rd08(bios, entry + 2);
 201                        break;
 202                }
 203        }
 204
 205        /* starting from fermi, fan management is always linear */
 206        if (bios->subdev.device->card_type >= NV_C0 &&
 207                fan->fan_mode == NVBIOS_THERM_FAN_OTHER) {
 208                fan->fan_mode = NVBIOS_THERM_FAN_LINEAR;
 209        }
 210
 211        return 0;
 212}
 213