linux/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/tu102.c
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   1/*
   2 * Copyright 2018 Red Hat Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 */
  22#include "nv50.h"
  23
  24#include <subdev/bios.h>
  25#include <subdev/bios/pll.h>
  26#include <subdev/clk/pll.h>
  27
  28static int
  29tu102_devinit_pll_set(struct nvkm_devinit *init, u32 type, u32 freq)
  30{
  31        struct nvkm_subdev *subdev = &init->subdev;
  32        struct nvkm_device *device = subdev->device;
  33        struct nvbios_pll info;
  34        int head = type - PLL_VPLL0;
  35        int N, fN, M, P;
  36        int ret;
  37
  38        ret = nvbios_pll_parse(device->bios, type, &info);
  39        if (ret)
  40                return ret;
  41
  42        ret = gt215_pll_calc(subdev, &info, freq, &N, &fN, &M, &P);
  43        if (ret < 0)
  44                return ret;
  45
  46        switch (info.type) {
  47        case PLL_VPLL0:
  48        case PLL_VPLL1:
  49        case PLL_VPLL2:
  50        case PLL_VPLL3:
  51                nvkm_wr32(device, 0x00ef10 + (head * 0x40), fN << 16);
  52                nvkm_wr32(device, 0x00ef04 + (head * 0x40), (P << 16) |
  53                                                            (N <<  8) |
  54                                                            (M <<  0));
  55                /*XXX*/
  56                nvkm_wr32(device, 0x00ef0c + (head * 0x40), 0x00000900);
  57                nvkm_wr32(device, 0x00ef00 + (head * 0x40), 0x02000014);
  58                break;
  59        default:
  60                nvkm_warn(subdev, "%08x/%dKhz unimplemented\n", type, freq);
  61                ret = -EINVAL;
  62                break;
  63        }
  64
  65        return ret;
  66}
  67
  68int
  69tu102_devinit_post(struct nvkm_devinit *base, bool post)
  70{
  71        struct nv50_devinit *init = nv50_devinit(base);
  72        gm200_devinit_preos(init, post);
  73        return 0;
  74}
  75
  76static const struct nvkm_devinit_func
  77tu102_devinit = {
  78        .init = nv50_devinit_init,
  79        .post = tu102_devinit_post,
  80        .pll_set = tu102_devinit_pll_set,
  81        .disable = gm107_devinit_disable,
  82};
  83
  84int
  85tu102_devinit_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
  86                  struct nvkm_devinit **pinit)
  87{
  88        return nv50_devinit_new_(&tu102_devinit, device, type, inst, pinit);
  89}
  90