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6
7#include <linux/dma-mapping.h>
8#include <linux/platform_device.h>
9#include <linux/sort.h>
10#include <linux/sys_soc.h>
11
12#include <drm/drm_atomic.h>
13#include <drm/drm_atomic_helper.h>
14#include <drm/drm_bridge.h>
15#include <drm/drm_bridge_connector.h>
16#include <drm/drm_drv.h>
17#include <drm/drm_fb_helper.h>
18#include <drm/drm_file.h>
19#include <drm/drm_ioctl.h>
20#include <drm/drm_panel.h>
21#include <drm/drm_prime.h>
22#include <drm/drm_probe_helper.h>
23#include <drm/drm_vblank.h>
24
25#include "omap_dmm_tiler.h"
26#include "omap_drv.h"
27
28#define DRIVER_NAME MODULE_NAME
29#define DRIVER_DESC "OMAP DRM"
30#define DRIVER_DATE "20110917"
31#define DRIVER_MAJOR 1
32#define DRIVER_MINOR 0
33#define DRIVER_PATCHLEVEL 0
34
35
36
37
38
39
40
41
42
43
44
45
46
47static void omap_atomic_wait_for_completion(struct drm_device *dev,
48 struct drm_atomic_state *old_state)
49{
50 struct drm_crtc_state *new_crtc_state;
51 struct drm_crtc *crtc;
52 unsigned int i;
53 int ret;
54
55 for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) {
56 if (!new_crtc_state->active)
57 continue;
58
59 ret = omap_crtc_wait_pending(crtc);
60
61 if (!ret)
62 dev_warn(dev->dev,
63 "atomic complete timeout (pipe %u)!\n", i);
64 }
65}
66
67static void omap_atomic_commit_tail(struct drm_atomic_state *old_state)
68{
69 struct drm_device *dev = old_state->dev;
70 struct omap_drm_private *priv = dev->dev_private;
71 bool fence_cookie = dma_fence_begin_signalling();
72
73 dispc_runtime_get(priv->dispc);
74
75
76 drm_atomic_helper_commit_modeset_disables(dev, old_state);
77
78 if (priv->omaprev != 0x3430) {
79
80
81
82
83
84
85
86
87
88
89
90 drm_atomic_helper_commit_modeset_enables(dev, old_state);
91 omap_atomic_wait_for_completion(dev, old_state);
92
93 drm_atomic_helper_commit_planes(dev, old_state, 0);
94 } else {
95
96
97
98
99
100 drm_atomic_helper_commit_planes(dev, old_state, 0);
101
102 drm_atomic_helper_commit_modeset_enables(dev, old_state);
103 }
104
105 drm_atomic_helper_commit_hw_done(old_state);
106
107 dma_fence_end_signalling(fence_cookie);
108
109
110
111
112
113 omap_atomic_wait_for_completion(dev, old_state);
114
115 drm_atomic_helper_cleanup_planes(dev, old_state);
116
117 dispc_runtime_put(priv->dispc);
118}
119
120static const struct drm_mode_config_helper_funcs omap_mode_config_helper_funcs = {
121 .atomic_commit_tail = omap_atomic_commit_tail,
122};
123
124static const struct drm_mode_config_funcs omap_mode_config_funcs = {
125 .fb_create = omap_framebuffer_create,
126 .output_poll_changed = drm_fb_helper_output_poll_changed,
127 .atomic_check = drm_atomic_helper_check,
128 .atomic_commit = drm_atomic_helper_commit,
129};
130
131static void omap_disconnect_pipelines(struct drm_device *ddev)
132{
133 struct omap_drm_private *priv = ddev->dev_private;
134 unsigned int i;
135
136 for (i = 0; i < priv->num_pipes; i++) {
137 struct omap_drm_pipeline *pipe = &priv->pipes[i];
138
139 omapdss_device_disconnect(NULL, pipe->output);
140
141 omapdss_device_put(pipe->output);
142 pipe->output = NULL;
143 }
144
145 memset(&priv->channels, 0, sizeof(priv->channels));
146
147 priv->num_pipes = 0;
148}
149
150static int omap_connect_pipelines(struct drm_device *ddev)
151{
152 struct omap_drm_private *priv = ddev->dev_private;
153 struct omap_dss_device *output = NULL;
154 int r;
155
156 for_each_dss_output(output) {
157 r = omapdss_device_connect(priv->dss, NULL, output);
158 if (r == -EPROBE_DEFER) {
159 omapdss_device_put(output);
160 return r;
161 } else if (r) {
162 dev_warn(output->dev, "could not connect output %s\n",
163 output->name);
164 } else {
165 struct omap_drm_pipeline *pipe;
166
167 pipe = &priv->pipes[priv->num_pipes++];
168 pipe->output = omapdss_device_get(output);
169
170 if (priv->num_pipes == ARRAY_SIZE(priv->pipes)) {
171
172 omapdss_device_put(output);
173 break;
174 }
175 }
176 }
177
178 return 0;
179}
180
181static int omap_compare_pipelines(const void *a, const void *b)
182{
183 const struct omap_drm_pipeline *pipe1 = a;
184 const struct omap_drm_pipeline *pipe2 = b;
185
186 if (pipe1->alias_id > pipe2->alias_id)
187 return 1;
188 else if (pipe1->alias_id < pipe2->alias_id)
189 return -1;
190 return 0;
191}
192
193static int omap_modeset_init_properties(struct drm_device *dev)
194{
195 struct omap_drm_private *priv = dev->dev_private;
196 unsigned int num_planes = dispc_get_num_ovls(priv->dispc);
197
198 priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0,
199 num_planes - 1);
200 if (!priv->zorder_prop)
201 return -ENOMEM;
202
203 return 0;
204}
205
206static int omap_display_id(struct omap_dss_device *output)
207{
208 struct device_node *node = NULL;
209
210 if (output->bridge) {
211 struct drm_bridge *bridge = output->bridge;
212
213 while (drm_bridge_get_next_bridge(bridge))
214 bridge = drm_bridge_get_next_bridge(bridge);
215
216 node = bridge->of_node;
217 }
218
219 return node ? of_alias_get_id(node, "display") : -ENODEV;
220}
221
222static int omap_modeset_init(struct drm_device *dev)
223{
224 struct omap_drm_private *priv = dev->dev_private;
225 int num_ovls = dispc_get_num_ovls(priv->dispc);
226 int num_mgrs = dispc_get_num_mgrs(priv->dispc);
227 unsigned int i;
228 int ret;
229 u32 plane_crtc_mask;
230
231 if (!omapdss_stack_is_ready())
232 return -EPROBE_DEFER;
233
234 drm_mode_config_init(dev);
235
236 ret = omap_modeset_init_properties(dev);
237 if (ret < 0)
238 return ret;
239
240
241
242
243
244
245
246
247
248 ret = omap_connect_pipelines(dev);
249 if (ret < 0)
250 return ret;
251
252 if (priv->num_pipes > num_mgrs || priv->num_pipes > num_ovls) {
253 dev_err(dev->dev, "%s(): Too many connected displays\n",
254 __func__);
255 return -EINVAL;
256 }
257
258
259 plane_crtc_mask = (1 << priv->num_pipes) - 1;
260
261 for (i = 0; i < num_ovls; i++) {
262 enum drm_plane_type type = i < priv->num_pipes
263 ? DRM_PLANE_TYPE_PRIMARY
264 : DRM_PLANE_TYPE_OVERLAY;
265 struct drm_plane *plane;
266
267 if (WARN_ON(priv->num_planes >= ARRAY_SIZE(priv->planes)))
268 return -EINVAL;
269
270 plane = omap_plane_init(dev, i, type, plane_crtc_mask);
271 if (IS_ERR(plane))
272 return PTR_ERR(plane);
273
274 priv->planes[priv->num_planes++] = plane;
275 }
276
277
278
279
280
281 for (i = 0; i < priv->num_pipes; i++) {
282 struct omap_drm_pipeline *pipe = &priv->pipes[i];
283 int id;
284
285 pipe->encoder = omap_encoder_init(dev, pipe->output);
286 if (!pipe->encoder)
287 return -ENOMEM;
288
289 if (pipe->output->bridge) {
290 ret = drm_bridge_attach(pipe->encoder,
291 pipe->output->bridge, NULL,
292 DRM_BRIDGE_ATTACH_NO_CONNECTOR);
293 if (ret < 0)
294 return ret;
295 }
296
297 id = omap_display_id(pipe->output);
298 pipe->alias_id = id >= 0 ? id : i;
299 }
300
301
302 sort(priv->pipes, priv->num_pipes, sizeof(priv->pipes[0]),
303 omap_compare_pipelines, NULL);
304
305
306
307
308
309 for (i = 0; i < priv->num_pipes; ++i) {
310 struct omap_drm_pipeline *pipe = &priv->pipes[i];
311 enum omap_channel channel = pipe->output->dispc_channel;
312
313 if (WARN_ON(priv->channels[channel] != NULL))
314 return -EINVAL;
315
316 priv->channels[channel] = pipe;
317 }
318
319
320 for (i = 0; i < priv->num_pipes; i++) {
321 struct omap_drm_pipeline *pipe = &priv->pipes[i];
322 struct drm_encoder *encoder = pipe->encoder;
323 struct drm_crtc *crtc;
324
325 pipe->connector = drm_bridge_connector_init(dev, encoder);
326 if (IS_ERR(pipe->connector)) {
327 dev_err(priv->dev,
328 "unable to create bridge connector for %s\n",
329 pipe->output->name);
330 return PTR_ERR(pipe->connector);
331 }
332
333 drm_connector_attach_encoder(pipe->connector, encoder);
334
335 crtc = omap_crtc_init(dev, pipe, priv->planes[i]);
336 if (IS_ERR(crtc))
337 return PTR_ERR(crtc);
338
339 encoder->possible_crtcs = 1 << i;
340 pipe->crtc = crtc;
341 }
342
343 DBG("registered %u planes, %u crtcs/encoders/connectors\n",
344 priv->num_planes, priv->num_pipes);
345
346 dev->mode_config.min_width = 8;
347 dev->mode_config.min_height = 2;
348
349
350
351
352
353
354
355 dev->mode_config.max_width = 8192;
356 dev->mode_config.max_height = 8192;
357
358
359 dev->mode_config.normalize_zpos = true;
360
361 dev->mode_config.funcs = &omap_mode_config_funcs;
362 dev->mode_config.helper_private = &omap_mode_config_helper_funcs;
363
364 drm_mode_config_reset(dev);
365
366 omap_drm_irq_install(dev);
367
368 return 0;
369}
370
371static void omap_modeset_fini(struct drm_device *ddev)
372{
373 omap_drm_irq_uninstall(ddev);
374
375 drm_mode_config_cleanup(ddev);
376}
377
378
379
380
381static void omap_modeset_enable_external_hpd(struct drm_device *ddev)
382{
383 struct omap_drm_private *priv = ddev->dev_private;
384 unsigned int i;
385
386 for (i = 0; i < priv->num_pipes; i++) {
387 struct drm_connector *connector = priv->pipes[i].connector;
388
389 if (!connector)
390 continue;
391
392 if (priv->pipes[i].output->bridge)
393 drm_bridge_connector_enable_hpd(connector);
394 }
395}
396
397
398
399
400static void omap_modeset_disable_external_hpd(struct drm_device *ddev)
401{
402 struct omap_drm_private *priv = ddev->dev_private;
403 unsigned int i;
404
405 for (i = 0; i < priv->num_pipes; i++) {
406 struct drm_connector *connector = priv->pipes[i].connector;
407
408 if (!connector)
409 continue;
410
411 if (priv->pipes[i].output->bridge)
412 drm_bridge_connector_disable_hpd(connector);
413 }
414}
415
416
417
418
419
420
421static int ioctl_get_param(struct drm_device *dev, void *data,
422 struct drm_file *file_priv)
423{
424 struct omap_drm_private *priv = dev->dev_private;
425 struct drm_omap_param *args = data;
426
427 DBG("%p: param=%llu", dev, args->param);
428
429 switch (args->param) {
430 case OMAP_PARAM_CHIPSET_ID:
431 args->value = priv->omaprev;
432 break;
433 default:
434 DBG("unknown parameter %lld", args->param);
435 return -EINVAL;
436 }
437
438 return 0;
439}
440
441#define OMAP_BO_USER_MASK 0x00ffffff
442
443static int ioctl_gem_new(struct drm_device *dev, void *data,
444 struct drm_file *file_priv)
445{
446 struct drm_omap_gem_new *args = data;
447 u32 flags = args->flags & OMAP_BO_USER_MASK;
448
449 VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
450 args->size.bytes, flags);
451
452 return omap_gem_new_handle(dev, file_priv, args->size, flags,
453 &args->handle);
454}
455
456static int ioctl_gem_info(struct drm_device *dev, void *data,
457 struct drm_file *file_priv)
458{
459 struct drm_omap_gem_info *args = data;
460 struct drm_gem_object *obj;
461 int ret = 0;
462
463 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
464
465 obj = drm_gem_object_lookup(file_priv, args->handle);
466 if (!obj)
467 return -ENOENT;
468
469 args->size = omap_gem_mmap_size(obj);
470 args->offset = omap_gem_mmap_offset(obj);
471
472 drm_gem_object_put(obj);
473
474 return ret;
475}
476
477static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
478 DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param,
479 DRM_RENDER_ALLOW),
480 DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, drm_invalid_op,
481 DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY),
482 DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new,
483 DRM_RENDER_ALLOW),
484
485 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, drm_noop,
486 DRM_RENDER_ALLOW),
487
488 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, drm_noop,
489 DRM_RENDER_ALLOW),
490 DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info,
491 DRM_RENDER_ALLOW),
492};
493
494
495
496
497
498static int dev_open(struct drm_device *dev, struct drm_file *file)
499{
500 file->driver_priv = NULL;
501
502 DBG("open: dev=%p, file=%p", dev, file);
503
504 return 0;
505}
506
507static const struct file_operations omapdriver_fops = {
508 .owner = THIS_MODULE,
509 .open = drm_open,
510 .unlocked_ioctl = drm_ioctl,
511 .compat_ioctl = drm_compat_ioctl,
512 .release = drm_release,
513 .mmap = omap_gem_mmap,
514 .poll = drm_poll,
515 .read = drm_read,
516 .llseek = noop_llseek,
517};
518
519static const struct drm_driver omap_drm_driver = {
520 .driver_features = DRIVER_MODESET | DRIVER_GEM |
521 DRIVER_ATOMIC | DRIVER_RENDER,
522 .open = dev_open,
523 .lastclose = drm_fb_helper_lastclose,
524#ifdef CONFIG_DEBUG_FS
525 .debugfs_init = omap_debugfs_init,
526#endif
527 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
528 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
529 .gem_prime_import = omap_gem_prime_import,
530 .dumb_create = omap_gem_dumb_create,
531 .dumb_map_offset = omap_gem_dumb_map_offset,
532 .ioctls = ioctls,
533 .num_ioctls = DRM_OMAP_NUM_IOCTLS,
534 .fops = &omapdriver_fops,
535 .name = DRIVER_NAME,
536 .desc = DRIVER_DESC,
537 .date = DRIVER_DATE,
538 .major = DRIVER_MAJOR,
539 .minor = DRIVER_MINOR,
540 .patchlevel = DRIVER_PATCHLEVEL,
541};
542
543static const struct soc_device_attribute omapdrm_soc_devices[] = {
544 { .family = "OMAP3", .data = (void *)0x3430 },
545 { .family = "OMAP4", .data = (void *)0x4430 },
546 { .family = "OMAP5", .data = (void *)0x5430 },
547 { .family = "DRA7", .data = (void *)0x0752 },
548 { }
549};
550
551static int omapdrm_init(struct omap_drm_private *priv, struct device *dev)
552{
553 const struct soc_device_attribute *soc;
554 struct dss_pdata *pdata = dev->platform_data;
555 struct drm_device *ddev;
556 int ret;
557
558 DBG("%s", dev_name(dev));
559
560
561 ddev = drm_dev_alloc(&omap_drm_driver, dev);
562 if (IS_ERR(ddev))
563 return PTR_ERR(ddev);
564
565 priv->ddev = ddev;
566 ddev->dev_private = priv;
567
568 priv->dev = dev;
569 priv->dss = pdata->dss;
570 priv->dispc = dispc_get_dispc(priv->dss);
571
572 priv->dss->mgr_ops_priv = priv;
573
574 soc = soc_device_match(omapdrm_soc_devices);
575 priv->omaprev = soc ? (unsigned int)soc->data : 0;
576 priv->wq = alloc_ordered_workqueue("omapdrm", 0);
577
578 mutex_init(&priv->list_lock);
579 INIT_LIST_HEAD(&priv->obj_list);
580
581
582 priv->max_bandwidth = dispc_get_memory_bandwidth_limit(priv->dispc);
583
584 omap_gem_init(ddev);
585
586 ret = omap_modeset_init(ddev);
587 if (ret) {
588 dev_err(priv->dev, "omap_modeset_init failed: ret=%d\n", ret);
589 goto err_gem_deinit;
590 }
591
592
593 ret = drm_vblank_init(ddev, priv->num_pipes);
594 if (ret) {
595 dev_err(priv->dev, "could not init vblank\n");
596 goto err_cleanup_modeset;
597 }
598
599 omap_fbdev_init(ddev);
600
601 drm_kms_helper_poll_init(ddev);
602 omap_modeset_enable_external_hpd(ddev);
603
604
605
606
607
608 ret = drm_dev_register(ddev, 0);
609 if (ret)
610 goto err_cleanup_helpers;
611
612 return 0;
613
614err_cleanup_helpers:
615 omap_modeset_disable_external_hpd(ddev);
616 drm_kms_helper_poll_fini(ddev);
617
618 omap_fbdev_fini(ddev);
619err_cleanup_modeset:
620 omap_modeset_fini(ddev);
621err_gem_deinit:
622 omap_gem_deinit(ddev);
623 destroy_workqueue(priv->wq);
624 omap_disconnect_pipelines(ddev);
625 drm_dev_put(ddev);
626 return ret;
627}
628
629static void omapdrm_cleanup(struct omap_drm_private *priv)
630{
631 struct drm_device *ddev = priv->ddev;
632
633 DBG("");
634
635 drm_dev_unregister(ddev);
636
637 omap_modeset_disable_external_hpd(ddev);
638 drm_kms_helper_poll_fini(ddev);
639
640 omap_fbdev_fini(ddev);
641
642 drm_atomic_helper_shutdown(ddev);
643
644 omap_modeset_fini(ddev);
645 omap_gem_deinit(ddev);
646
647 destroy_workqueue(priv->wq);
648
649 omap_disconnect_pipelines(ddev);
650
651 drm_dev_put(ddev);
652}
653
654static int pdev_probe(struct platform_device *pdev)
655{
656 struct omap_drm_private *priv;
657 int ret;
658
659 ret = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
660 if (ret) {
661 dev_err(&pdev->dev, "Failed to set the DMA mask\n");
662 return ret;
663 }
664
665
666 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
667 if (!priv)
668 return -ENOMEM;
669
670 platform_set_drvdata(pdev, priv);
671
672 ret = omapdrm_init(priv, &pdev->dev);
673 if (ret < 0)
674 kfree(priv);
675
676 return ret;
677}
678
679static int pdev_remove(struct platform_device *pdev)
680{
681 struct omap_drm_private *priv = platform_get_drvdata(pdev);
682
683 omapdrm_cleanup(priv);
684 kfree(priv);
685
686 return 0;
687}
688
689#ifdef CONFIG_PM_SLEEP
690static int omap_drm_suspend(struct device *dev)
691{
692 struct omap_drm_private *priv = dev_get_drvdata(dev);
693 struct drm_device *drm_dev = priv->ddev;
694
695 return drm_mode_config_helper_suspend(drm_dev);
696}
697
698static int omap_drm_resume(struct device *dev)
699{
700 struct omap_drm_private *priv = dev_get_drvdata(dev);
701 struct drm_device *drm_dev = priv->ddev;
702
703 drm_mode_config_helper_resume(drm_dev);
704
705 return omap_gem_resume(drm_dev);
706}
707#endif
708
709static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
710
711static struct platform_driver pdev = {
712 .driver = {
713 .name = "omapdrm",
714 .pm = &omapdrm_pm_ops,
715 },
716 .probe = pdev_probe,
717 .remove = pdev_remove,
718};
719
720static struct platform_driver * const drivers[] = {
721 &omap_dmm_driver,
722 &pdev,
723};
724
725static int __init omap_drm_init(void)
726{
727 int r;
728
729 DBG("init");
730
731 r = omap_dss_init();
732 if (r)
733 return r;
734
735 r = platform_register_drivers(drivers, ARRAY_SIZE(drivers));
736 if (r) {
737 omap_dss_exit();
738 return r;
739 }
740
741 return 0;
742}
743
744static void __exit omap_drm_fini(void)
745{
746 DBG("fini");
747
748 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
749
750 omap_dss_exit();
751}
752
753module_init(omap_drm_init);
754module_exit(omap_drm_fini);
755
756MODULE_AUTHOR("Rob Clark <rob@ti.com>");
757MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@ti.com>");
758MODULE_DESCRIPTION("OMAP DRM Display Driver");
759MODULE_ALIAS("platform:" DRIVER_NAME);
760MODULE_LICENSE("GPL v2");
761