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27#include <linux/module.h>
28#include <linux/pci.h>
29#include <linux/pm_runtime.h>
30#include <linux/slab.h>
31#include <linux/vga_switcheroo.h>
32
33#include <drm/drm_crtc.h>
34#include <drm/drm_crtc_helper.h>
35#include <drm/drm_fb_helper.h>
36#include <drm/drm_fourcc.h>
37#include <drm/radeon_drm.h>
38
39#include "radeon.h"
40
41
42
43
44
45struct radeon_fbdev {
46 struct drm_fb_helper helper;
47 struct drm_framebuffer fb;
48 struct radeon_device *rdev;
49};
50
51static int
52radeonfb_open(struct fb_info *info, int user)
53{
54 struct radeon_fbdev *rfbdev = info->par;
55 struct radeon_device *rdev = rfbdev->rdev;
56 int ret = pm_runtime_get_sync(rdev->ddev->dev);
57
58 if (ret < 0 && ret != -EACCES) {
59 pm_runtime_mark_last_busy(rdev->ddev->dev);
60 pm_runtime_put_autosuspend(rdev->ddev->dev);
61 return ret;
62 }
63 return 0;
64}
65
66static int
67radeonfb_release(struct fb_info *info, int user)
68{
69 struct radeon_fbdev *rfbdev = info->par;
70 struct radeon_device *rdev = rfbdev->rdev;
71
72 pm_runtime_mark_last_busy(rdev->ddev->dev);
73 pm_runtime_put_autosuspend(rdev->ddev->dev);
74 return 0;
75}
76
77static const struct fb_ops radeonfb_ops = {
78 .owner = THIS_MODULE,
79 DRM_FB_HELPER_DEFAULT_OPS,
80 .fb_open = radeonfb_open,
81 .fb_release = radeonfb_release,
82 .fb_fillrect = drm_fb_helper_cfb_fillrect,
83 .fb_copyarea = drm_fb_helper_cfb_copyarea,
84 .fb_imageblit = drm_fb_helper_cfb_imageblit,
85};
86
87
88int radeon_align_pitch(struct radeon_device *rdev, int width, int cpp, bool tiled)
89{
90 int aligned = width;
91 int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
92 int pitch_mask = 0;
93
94 switch (cpp) {
95 case 1:
96 pitch_mask = align_large ? 255 : 127;
97 break;
98 case 2:
99 pitch_mask = align_large ? 127 : 31;
100 break;
101 case 3:
102 case 4:
103 pitch_mask = align_large ? 63 : 15;
104 break;
105 }
106
107 aligned += pitch_mask;
108 aligned &= ~pitch_mask;
109 return aligned * cpp;
110}
111
112static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj)
113{
114 struct radeon_bo *rbo = gem_to_radeon_bo(gobj);
115 int ret;
116
117 ret = radeon_bo_reserve(rbo, false);
118 if (likely(ret == 0)) {
119 radeon_bo_kunmap(rbo);
120 radeon_bo_unpin(rbo);
121 radeon_bo_unreserve(rbo);
122 }
123 drm_gem_object_put(gobj);
124}
125
126static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev,
127 struct drm_mode_fb_cmd2 *mode_cmd,
128 struct drm_gem_object **gobj_p)
129{
130 const struct drm_format_info *info;
131 struct radeon_device *rdev = rfbdev->rdev;
132 struct drm_gem_object *gobj = NULL;
133 struct radeon_bo *rbo = NULL;
134 bool fb_tiled = false;
135 u32 tiling_flags = 0;
136 int ret;
137 int aligned_size, size;
138 int height = mode_cmd->height;
139 u32 cpp;
140
141 info = drm_get_format_info(rdev->ddev, mode_cmd);
142 cpp = info->cpp[0];
143
144
145 mode_cmd->pitches[0] = radeon_align_pitch(rdev, mode_cmd->width, cpp,
146 fb_tiled);
147
148 if (rdev->family >= CHIP_R600)
149 height = ALIGN(mode_cmd->height, 8);
150 size = mode_cmd->pitches[0] * height;
151 aligned_size = ALIGN(size, PAGE_SIZE);
152 ret = radeon_gem_object_create(rdev, aligned_size, 0,
153 RADEON_GEM_DOMAIN_VRAM,
154 0, true, &gobj);
155 if (ret) {
156 pr_err("failed to allocate framebuffer (%d)\n", aligned_size);
157 return -ENOMEM;
158 }
159 rbo = gem_to_radeon_bo(gobj);
160
161 if (fb_tiled)
162 tiling_flags = RADEON_TILING_MACRO;
163
164#ifdef __BIG_ENDIAN
165 switch (cpp) {
166 case 4:
167 tiling_flags |= RADEON_TILING_SWAP_32BIT;
168 break;
169 case 2:
170 tiling_flags |= RADEON_TILING_SWAP_16BIT;
171 break;
172 default:
173 break;
174 }
175#endif
176
177 if (tiling_flags) {
178 ret = radeon_bo_set_tiling_flags(rbo,
179 tiling_flags | RADEON_TILING_SURFACE,
180 mode_cmd->pitches[0]);
181 if (ret)
182 dev_err(rdev->dev, "FB failed to set tiling flags\n");
183 }
184
185
186 ret = radeon_bo_reserve(rbo, false);
187 if (unlikely(ret != 0))
188 goto out_unref;
189
190 ret = radeon_bo_pin_restricted(rbo, RADEON_GEM_DOMAIN_VRAM,
191 ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27,
192 NULL);
193 if (ret) {
194 radeon_bo_unreserve(rbo);
195 goto out_unref;
196 }
197 if (fb_tiled)
198 radeon_bo_check_tiling(rbo, 0, 0);
199 ret = radeon_bo_kmap(rbo, NULL);
200 radeon_bo_unreserve(rbo);
201 if (ret)
202 goto out_unref;
203
204 *gobj_p = gobj;
205 return 0;
206out_unref:
207 radeonfb_destroy_pinned_object(gobj);
208 *gobj_p = NULL;
209 return ret;
210}
211
212static int radeonfb_create(struct drm_fb_helper *helper,
213 struct drm_fb_helper_surface_size *sizes)
214{
215 struct radeon_fbdev *rfbdev =
216 container_of(helper, struct radeon_fbdev, helper);
217 struct radeon_device *rdev = rfbdev->rdev;
218 struct fb_info *info;
219 struct drm_framebuffer *fb = NULL;
220 struct drm_mode_fb_cmd2 mode_cmd;
221 struct drm_gem_object *gobj = NULL;
222 struct radeon_bo *rbo = NULL;
223 int ret;
224 unsigned long tmp;
225
226 mode_cmd.width = sizes->surface_width;
227 mode_cmd.height = sizes->surface_height;
228
229
230 if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev))
231 sizes->surface_bpp = 32;
232
233 mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
234 sizes->surface_depth);
235
236 ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj);
237 if (ret) {
238 DRM_ERROR("failed to create fbcon object %d\n", ret);
239 return ret;
240 }
241
242 rbo = gem_to_radeon_bo(gobj);
243
244
245 info = drm_fb_helper_alloc_fbi(helper);
246 if (IS_ERR(info)) {
247 ret = PTR_ERR(info);
248 goto out;
249 }
250
251
252 info->skip_vt_switch = false;
253
254 ret = radeon_framebuffer_init(rdev->ddev, &rfbdev->fb, &mode_cmd, gobj);
255 if (ret) {
256 DRM_ERROR("failed to initialize framebuffer %d\n", ret);
257 goto out;
258 }
259
260 fb = &rfbdev->fb;
261
262
263 rfbdev->helper.fb = fb;
264
265 memset_io(rbo->kptr, 0x0, radeon_bo_size(rbo));
266
267 info->fbops = &radeonfb_ops;
268
269 tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start;
270 info->fix.smem_start = rdev->mc.aper_base + tmp;
271 info->fix.smem_len = radeon_bo_size(rbo);
272 info->screen_base = rbo->kptr;
273 info->screen_size = radeon_bo_size(rbo);
274
275 drm_fb_helper_fill_info(info, &rfbdev->helper, sizes);
276
277
278 info->apertures->ranges[0].base = rdev->ddev->mode_config.fb_base;
279 info->apertures->ranges[0].size = rdev->mc.aper_size;
280
281
282
283 if (info->screen_base == NULL) {
284 ret = -ENOSPC;
285 goto out;
286 }
287
288 DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start);
289 DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base);
290 DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo));
291 DRM_INFO("fb depth is %d\n", fb->format->depth);
292 DRM_INFO(" pitch is %d\n", fb->pitches[0]);
293
294 vga_switcheroo_client_fb_set(rdev->pdev, info);
295 return 0;
296
297out:
298 if (fb && ret) {
299 drm_gem_object_put(gobj);
300 drm_framebuffer_unregister_private(fb);
301 drm_framebuffer_cleanup(fb);
302 kfree(fb);
303 }
304 return ret;
305}
306
307static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfbdev)
308{
309 struct drm_framebuffer *fb = &rfbdev->fb;
310
311 drm_fb_helper_unregister_fbi(&rfbdev->helper);
312
313 if (fb->obj[0]) {
314 radeonfb_destroy_pinned_object(fb->obj[0]);
315 fb->obj[0] = NULL;
316 drm_framebuffer_unregister_private(fb);
317 drm_framebuffer_cleanup(fb);
318 }
319 drm_fb_helper_fini(&rfbdev->helper);
320
321 return 0;
322}
323
324static const struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
325 .fb_probe = radeonfb_create,
326};
327
328int radeon_fbdev_init(struct radeon_device *rdev)
329{
330 struct radeon_fbdev *rfbdev;
331 int bpp_sel = 32;
332 int ret;
333
334
335 if (list_empty(&rdev->ddev->mode_config.connector_list))
336 return 0;
337
338
339 if (rdev->mc.real_vram_size <= (8*1024*1024))
340 bpp_sel = 8;
341 else if (ASIC_IS_RN50(rdev) ||
342 rdev->mc.real_vram_size <= (32*1024*1024))
343 bpp_sel = 16;
344
345 rfbdev = kzalloc(sizeof(struct radeon_fbdev), GFP_KERNEL);
346 if (!rfbdev)
347 return -ENOMEM;
348
349 rfbdev->rdev = rdev;
350 rdev->mode_info.rfbdev = rfbdev;
351
352 drm_fb_helper_prepare(rdev->ddev, &rfbdev->helper,
353 &radeon_fb_helper_funcs);
354
355 ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper);
356 if (ret)
357 goto free;
358
359
360 drm_helper_disable_unused_functions(rdev->ddev);
361
362 ret = drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
363 if (ret)
364 goto fini;
365
366 return 0;
367
368fini:
369 drm_fb_helper_fini(&rfbdev->helper);
370free:
371 kfree(rfbdev);
372 return ret;
373}
374
375void radeon_fbdev_fini(struct radeon_device *rdev)
376{
377 if (!rdev->mode_info.rfbdev)
378 return;
379
380 radeon_fbdev_destroy(rdev->ddev, rdev->mode_info.rfbdev);
381 kfree(rdev->mode_info.rfbdev);
382 rdev->mode_info.rfbdev = NULL;
383}
384
385void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state)
386{
387 if (rdev->mode_info.rfbdev)
388 drm_fb_helper_set_suspend(&rdev->mode_info.rfbdev->helper, state);
389}
390
391bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj)
392{
393 if (!rdev->mode_info.rfbdev)
394 return false;
395
396 if (robj == gem_to_radeon_bo(rdev->mode_info.rfbdev->fb.obj[0]))
397 return true;
398 return false;
399}
400