LXR linux/drivers/gpu/drm/sti/sti

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 * Copyright (C) STMicroelectronics SA 2014
   4 * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
   5 */
   6
   7#ifndef _STI_HDMI_H_
   8#define _STI_HDMI_H_
   9
  10#include <linux/hdmi.h>
  11#include <linux/platform_device.h>
  12
  13#include <media/cec-notifier.h>
  14
  15#include <drm/drm_modes.h>
  16#include <drm/drm_property.h>
  17
  18#define HDMI_STA           0x0010
  19#define HDMI_STA_DLL_LCK   BIT(5)
  20#define HDMI_STA_HOT_PLUG  BIT(4)
  21
  22struct sti_hdmi;
  23
  24struct hdmi_phy_ops {
  25        bool (*start)(struct sti_hdmi *hdmi);
  26        void (*stop)(struct sti_hdmi *hdmi);
  27};
  28
  29struct hdmi_audio_params {
  30        bool enabled;
  31        unsigned int sample_width;
  32        unsigned int sample_rate;
  33        struct hdmi_audio_infoframe cea;
  34};
  35
  36#define DEFAULT_COLORSPACE_MODE HDMI_COLORSPACE_RGB
  37
  38/**
  39 * STI hdmi structure
  40 *
  41 * @dev: driver device
  42 * @drm_dev: pointer to drm device
  43 * @mode: current display mode selected
  44 * @regs: hdmi register
  45 * @syscfg: syscfg register for pll rejection configuration
  46 * @clk_pix: hdmi pixel clock
  47 * @clk_tmds: hdmi tmds clock
  48 * @clk_phy: hdmi phy clock
  49 * @clk_audio: hdmi audio clock
  50 * @irq: hdmi interrupt number
  51 * @irq_status: interrupt status register
  52 * @phy_ops: phy start/stop operations
  53 * @enabled: true if hdmi is enabled else false
  54 * @hpd: hot plug detect status
  55 * @wait_event: wait event
  56 * @event_received: wait event status
  57 * @reset: reset control of the hdmi phy
  58 * @ddc_adapt: i2c ddc adapter
  59 * @colorspace: current colorspace selected
  60 * @hdmi_monitor: true if HDMI monitor detected else DVI monitor assumed
  61 * @audio_pdev: ASoC hdmi-codec platform device
  62 * @audio: hdmi audio parameters.
  63 * @drm_connector: hdmi connector
  64 * @notifier: hotplug detect notifier
  65 */
  66struct sti_hdmi {
  67        struct device dev;
  68        struct drm_device *drm_dev;
  69        struct drm_display_mode mode;
  70        void __iomem *regs;
  71        void __iomem *syscfg;
  72        struct clk *clk_pix;
  73        struct clk *clk_tmds;
  74        struct clk *clk_phy;
  75        struct clk *clk_audio;
  76        int irq;
  77        u32 irq_status;
  78        struct hdmi_phy_ops *phy_ops;
  79        bool enabled;
  80        bool hpd;
  81        wait_queue_head_t wait_event;
  82        bool event_received;
  83        struct reset_control *reset;
  84        struct i2c_adapter *ddc_adapt;
  85        enum hdmi_colorspace colorspace;
  86        bool hdmi_monitor;
  87        struct platform_device *audio_pdev;
  88        struct hdmi_audio_params audio;
  89        struct drm_connector *drm_connector;
  90        struct cec_notifier *notifier;
  91};
  92
  93u32 hdmi_read(struct sti_hdmi *hdmi, int offset);
  94void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset);
  95
  96/**
  97 * hdmi phy config structure
  98 *
  99 * A pointer to an array of these structures is passed to a TMDS (HDMI) output
 100 * via the control interface to provide board and SoC specific
 101 * configurations of the HDMI PHY. Each entry in the array specifies a hardware
 102 * specific configuration for a given TMDS clock frequency range.
 103 *
 104 * @min_tmds_freq: Lower bound of TMDS clock frequency this entry applies to
 105 * @max_tmds_freq: Upper bound of TMDS clock frequency this entry applies to
 106 * @config: SoC specific register configuration
 107 */
 108struct hdmi_phy_config {
 109        u32 min_tmds_freq;
 110        u32 max_tmds_freq;
 111        u32 config[4];
 112};
 113
 114#endif
 115