1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright (C) 2017 Free Electrons 4 * Maxime Ripard <maxime.ripard@free-electrons.com> 5 */ 6 7#ifndef _SUN4I_FRONTEND_H_ 8#define _SUN4I_FRONTEND_H_ 9 10#include <linux/list.h> 11 12#define SUN4I_FRONTEND_EN_REG 0x000 13#define SUN4I_FRONTEND_EN_EN BIT(0) 14 15#define SUN4I_FRONTEND_FRM_CTRL_REG 0x004 16#define SUN4I_FRONTEND_FRM_CTRL_COEF_ACCESS_CTRL BIT(23) 17#define SUN4I_FRONTEND_FRM_CTRL_FRM_START BIT(16) 18#define SUN4I_FRONTEND_FRM_CTRL_COEF_RDY BIT(1) 19#define SUN4I_FRONTEND_FRM_CTRL_REG_RDY BIT(0) 20 21#define SUN4I_FRONTEND_BYPASS_REG 0x008 22#define SUN4I_FRONTEND_BYPASS_CSC_EN BIT(1) 23 24#define SUN4I_FRONTEND_BUF_ADDR0_REG 0x020 25#define SUN4I_FRONTEND_BUF_ADDR1_REG 0x024 26#define SUN4I_FRONTEND_BUF_ADDR2_REG 0x028 27 28#define SUN4I_FRONTEND_TB_OFF0_REG 0x030 29#define SUN4I_FRONTEND_TB_OFF1_REG 0x034 30#define SUN4I_FRONTEND_TB_OFF2_REG 0x038 31#define SUN4I_FRONTEND_TB_OFF_X1(x1) ((x1) << 16) 32#define SUN4I_FRONTEND_TB_OFF_Y0(y0) ((y0) << 8) 33#define SUN4I_FRONTEND_TB_OFF_X0(x0) (x0) 34 35#define SUN4I_FRONTEND_LINESTRD0_REG 0x040 36#define SUN4I_FRONTEND_LINESTRD1_REG 0x044 37#define SUN4I_FRONTEND_LINESTRD2_REG 0x048 38 39/* 40 * In tiled mode, the stride is defined as the distance between the start of the 41 * end line of the current tile and the start of the first line in the next 42 * vertical tile. 43 * 44 * Tiles are represented in row-major order, thus the end line of current tile 45 * starts at: 31 * 32 (31 lines of 32 cols), the next vertical tile starts at: 46 * 32-bit-aligned-width * 32 and the distance is: 47 * 32 * (32-bit-aligned-width - 31). 48 */ 49#define SUN4I_FRONTEND_LINESTRD_TILED(stride) (((stride) - 31) * 32) 50 51#define SUN4I_FRONTEND_INPUT_FMT_REG 0x04c 52#define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PLANAR (0 << 8) 53#define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PACKED (1 << 8) 54#define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_SEMIPLANAR (2 << 8) 55#define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_MB32_PLANAR (4 << 8) 56#define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_MB32_SEMIPLANAR (6 << 8) 57#define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV444 (0 << 4) 58#define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV422 (1 << 4) 59#define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV420 (2 << 4) 60#define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV411 (3 << 4) 61#define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_RGB (5 << 4) 62#define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_UYVY 0 63#define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_YUYV 1 64#define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_VYUY 2 65#define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_YVYU 3 66#define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_UV 0 67#define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_VU 1 68#define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_BGRX 0 69#define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_XRGB 1 70 71#define SUN4I_FRONTEND_OUTPUT_FMT_REG 0x05c 72#define SUN4I_FRONTEND_OUTPUT_FMT_DATA_FMT_BGRX8888 1 73#define SUN4I_FRONTEND_OUTPUT_FMT_DATA_FMT_XRGB8888 2 74 75#define SUN4I_FRONTEND_CSC_COEF_REG(c) (0x070 + (0x4 * (c))) 76 77#define SUN4I_FRONTEND_CH0_INSIZE_REG 0x100 78#define SUN4I_FRONTEND_INSIZE(h, w) ((((h) - 1) << 16) | (((w) - 1))) 79 80#define SUN4I_FRONTEND_CH0_OUTSIZE_REG 0x104 81#define SUN4I_FRONTEND_OUTSIZE(h, w) ((((h) - 1) << 16) | (((w) - 1))) 82 83#define SUN4I_FRONTEND_CH0_HORZFACT_REG 0x108 84#define SUN4I_FRONTEND_HORZFACT(i, f) (((i) << 16) | (f)) 85 86#define SUN4I_FRONTEND_CH0_VERTFACT_REG 0x10c 87#define SUN4I_FRONTEND_VERTFACT(i, f) (((i) << 16) | (f)) 88 89#define SUN4I_FRONTEND_CH0_HORZPHASE_REG 0x110 90#define SUN4I_FRONTEND_CH0_VERTPHASE0_REG 0x114 91#define SUN4I_FRONTEND_CH0_VERTPHASE1_REG 0x118 92 93#define SUN4I_FRONTEND_CH1_INSIZE_REG 0x200 94#define SUN4I_FRONTEND_CH1_OUTSIZE_REG 0x204 95#define SUN4I_FRONTEND_CH1_HORZFACT_REG 0x208 96#define SUN4I_FRONTEND_CH1_VERTFACT_REG 0x20c 97 98#define SUN4I_FRONTEND_CH1_HORZPHASE_REG 0x210 99#define SUN4I_FRONTEND_CH1_VERTPHASE0_REG 0x214 100#define SUN4I_FRONTEND_CH1_VERTPHASE1_REG 0x218 101 102#define SUN4I_FRONTEND_CH0_HORZCOEF0_REG(i) (0x400 + i * 4) 103#define SUN4I_FRONTEND_CH0_HORZCOEF1_REG(i) (0x480 + i * 4) 104#define SUN4I_FRONTEND_CH0_VERTCOEF_REG(i) (0x500 + i * 4) 105#define SUN4I_FRONTEND_CH1_HORZCOEF0_REG(i) (0x600 + i * 4) 106#define SUN4I_FRONTEND_CH1_HORZCOEF1_REG(i) (0x680 + i * 4) 107#define SUN4I_FRONTEND_CH1_VERTCOEF_REG(i) (0x700 + i * 4) 108 109struct clk; 110struct device_node; 111struct drm_plane; 112struct regmap; 113struct reset_control; 114 115struct sun4i_frontend_data { 116 bool has_coef_access_ctrl; 117 bool has_coef_rdy; 118 u32 ch_phase[2]; 119}; 120 121struct sun4i_frontend { 122 struct list_head list; 123 struct device *dev; 124 struct device_node *node; 125 126 struct clk *bus_clk; 127 struct clk *mod_clk; 128 struct clk *ram_clk; 129 struct regmap *regs; 130 struct reset_control *reset; 131 132 const struct sun4i_frontend_data *data; 133}; 134 135extern const struct of_device_id sun4i_frontend_of_table[]; 136extern const u32 sunxi_bt601_yuv2rgb_coef[12]; 137 138int sun4i_frontend_init(struct sun4i_frontend *frontend); 139void sun4i_frontend_exit(struct sun4i_frontend *frontend); 140int sun4i_frontend_enable(struct sun4i_frontend *frontend); 141 142void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend, 143 struct drm_plane *plane); 144void sun4i_frontend_update_coord(struct sun4i_frontend *frontend, 145 struct drm_plane *plane); 146int sun4i_frontend_update_formats(struct sun4i_frontend *frontend, 147 struct drm_plane *plane, uint32_t out_fmt); 148bool sun4i_frontend_format_is_supported(uint32_t fmt, uint64_t modifier); 149 150#endif /* _SUN4I_FRONTEND_H_ */ 151