1
2
3#include <linux/console.h>
4#include <linux/pci.h>
5
6#include <drm/drm_aperture.h>
7#include <drm/drm_atomic_helper.h>
8#include <drm/drm_drv.h>
9#include <drm/drm_fb_helper.h>
10#include <drm/drm_fourcc.h>
11#include <drm/drm_gem_framebuffer_helper.h>
12#include <drm/drm_gem_vram_helper.h>
13#include <drm/drm_managed.h>
14#include <drm/drm_probe_helper.h>
15#include <drm/drm_simple_kms_helper.h>
16
17#include <video/vga.h>
18
19
20
21#define VBE_DISPI_IOPORT_INDEX 0x01CE
22#define VBE_DISPI_IOPORT_DATA 0x01CF
23
24#define VBE_DISPI_INDEX_ID 0x0
25#define VBE_DISPI_INDEX_XRES 0x1
26#define VBE_DISPI_INDEX_YRES 0x2
27#define VBE_DISPI_INDEX_BPP 0x3
28#define VBE_DISPI_INDEX_ENABLE 0x4
29#define VBE_DISPI_INDEX_BANK 0x5
30#define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
31#define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
32#define VBE_DISPI_INDEX_X_OFFSET 0x8
33#define VBE_DISPI_INDEX_Y_OFFSET 0x9
34#define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa
35
36#define VBE_DISPI_ID0 0xB0C0
37#define VBE_DISPI_ID1 0xB0C1
38#define VBE_DISPI_ID2 0xB0C2
39#define VBE_DISPI_ID3 0xB0C3
40#define VBE_DISPI_ID4 0xB0C4
41#define VBE_DISPI_ID5 0xB0C5
42
43#define VBE_DISPI_DISABLED 0x00
44#define VBE_DISPI_ENABLED 0x01
45#define VBE_DISPI_GETCAPS 0x02
46#define VBE_DISPI_8BIT_DAC 0x20
47#define VBE_DISPI_LFB_ENABLED 0x40
48#define VBE_DISPI_NOCLEARMEM 0x80
49
50static int bochs_modeset = -1;
51static int defx = 1024;
52static int defy = 768;
53
54module_param_named(modeset, bochs_modeset, int, 0444);
55MODULE_PARM_DESC(modeset, "enable/disable kernel modesetting");
56
57module_param(defx, int, 0444);
58module_param(defy, int, 0444);
59MODULE_PARM_DESC(defx, "default x resolution");
60MODULE_PARM_DESC(defy, "default y resolution");
61
62
63
64enum bochs_types {
65 BOCHS_QEMU_STDVGA,
66 BOCHS_UNKNOWN,
67};
68
69struct bochs_device {
70
71 void __iomem *mmio;
72 int ioports;
73 void __iomem *fb_map;
74 unsigned long fb_base;
75 unsigned long fb_size;
76 unsigned long qext_size;
77
78
79 u16 xres;
80 u16 yres;
81 u16 yres_virtual;
82 u32 stride;
83 u32 bpp;
84 struct edid *edid;
85
86
87 struct drm_device *dev;
88 struct drm_simple_display_pipe pipe;
89 struct drm_connector connector;
90};
91
92
93
94static void bochs_vga_writeb(struct bochs_device *bochs, u16 ioport, u8 val)
95{
96 if (WARN_ON(ioport < 0x3c0 || ioport > 0x3df))
97 return;
98
99 if (bochs->mmio) {
100 int offset = ioport - 0x3c0 + 0x400;
101
102 writeb(val, bochs->mmio + offset);
103 } else {
104 outb(val, ioport);
105 }
106}
107
108static u8 bochs_vga_readb(struct bochs_device *bochs, u16 ioport)
109{
110 if (WARN_ON(ioport < 0x3c0 || ioport > 0x3df))
111 return 0xff;
112
113 if (bochs->mmio) {
114 int offset = ioport - 0x3c0 + 0x400;
115
116 return readb(bochs->mmio + offset);
117 } else {
118 return inb(ioport);
119 }
120}
121
122static u16 bochs_dispi_read(struct bochs_device *bochs, u16 reg)
123{
124 u16 ret = 0;
125
126 if (bochs->mmio) {
127 int offset = 0x500 + (reg << 1);
128
129 ret = readw(bochs->mmio + offset);
130 } else {
131 outw(reg, VBE_DISPI_IOPORT_INDEX);
132 ret = inw(VBE_DISPI_IOPORT_DATA);
133 }
134 return ret;
135}
136
137static void bochs_dispi_write(struct bochs_device *bochs, u16 reg, u16 val)
138{
139 if (bochs->mmio) {
140 int offset = 0x500 + (reg << 1);
141
142 writew(val, bochs->mmio + offset);
143 } else {
144 outw(reg, VBE_DISPI_IOPORT_INDEX);
145 outw(val, VBE_DISPI_IOPORT_DATA);
146 }
147}
148
149static void bochs_hw_set_big_endian(struct bochs_device *bochs)
150{
151 if (bochs->qext_size < 8)
152 return;
153
154 writel(0xbebebebe, bochs->mmio + 0x604);
155}
156
157static void bochs_hw_set_little_endian(struct bochs_device *bochs)
158{
159 if (bochs->qext_size < 8)
160 return;
161
162 writel(0x1e1e1e1e, bochs->mmio + 0x604);
163}
164
165#ifdef __BIG_ENDIAN
166#define bochs_hw_set_native_endian(_b) bochs_hw_set_big_endian(_b)
167#else
168#define bochs_hw_set_native_endian(_b) bochs_hw_set_little_endian(_b)
169#endif
170
171static int bochs_get_edid_block(void *data, u8 *buf,
172 unsigned int block, size_t len)
173{
174 struct bochs_device *bochs = data;
175 size_t i, start = block * EDID_LENGTH;
176
177 if (start + len > 0x400 )
178 return -1;
179
180 for (i = 0; i < len; i++)
181 buf[i] = readb(bochs->mmio + start + i);
182
183 return 0;
184}
185
186static int bochs_hw_load_edid(struct bochs_device *bochs)
187{
188 u8 header[8];
189
190 if (!bochs->mmio)
191 return -1;
192
193
194 bochs_get_edid_block(bochs, header, 0, ARRAY_SIZE(header));
195 if (drm_edid_header_is_valid(header) != 8)
196 return -1;
197
198 kfree(bochs->edid);
199 bochs->edid = drm_do_get_edid(&bochs->connector,
200 bochs_get_edid_block, bochs);
201 if (bochs->edid == NULL)
202 return -1;
203
204 return 0;
205}
206
207static int bochs_hw_init(struct drm_device *dev)
208{
209 struct bochs_device *bochs = dev->dev_private;
210 struct pci_dev *pdev = to_pci_dev(dev->dev);
211 unsigned long addr, size, mem, ioaddr, iosize;
212 u16 id;
213
214 if (pdev->resource[2].flags & IORESOURCE_MEM) {
215
216 if (pci_request_region(pdev, 2, "bochs-drm") != 0) {
217 DRM_ERROR("Cannot request mmio region\n");
218 return -EBUSY;
219 }
220 ioaddr = pci_resource_start(pdev, 2);
221 iosize = pci_resource_len(pdev, 2);
222 bochs->mmio = ioremap(ioaddr, iosize);
223 if (bochs->mmio == NULL) {
224 DRM_ERROR("Cannot map mmio region\n");
225 return -ENOMEM;
226 }
227 } else {
228 ioaddr = VBE_DISPI_IOPORT_INDEX;
229 iosize = 2;
230 if (!request_region(ioaddr, iosize, "bochs-drm")) {
231 DRM_ERROR("Cannot request ioports\n");
232 return -EBUSY;
233 }
234 bochs->ioports = 1;
235 }
236
237 id = bochs_dispi_read(bochs, VBE_DISPI_INDEX_ID);
238 mem = bochs_dispi_read(bochs, VBE_DISPI_INDEX_VIDEO_MEMORY_64K)
239 * 64 * 1024;
240 if ((id & 0xfff0) != VBE_DISPI_ID0) {
241 DRM_ERROR("ID mismatch\n");
242 return -ENODEV;
243 }
244
245 if ((pdev->resource[0].flags & IORESOURCE_MEM) == 0)
246 return -ENODEV;
247 addr = pci_resource_start(pdev, 0);
248 size = pci_resource_len(pdev, 0);
249 if (addr == 0)
250 return -ENODEV;
251 if (size != mem) {
252 DRM_ERROR("Size mismatch: pci=%ld, bochs=%ld\n",
253 size, mem);
254 size = min(size, mem);
255 }
256
257 if (pci_request_region(pdev, 0, "bochs-drm") != 0)
258 DRM_WARN("Cannot request framebuffer, boot fb still active?\n");
259
260 bochs->fb_map = ioremap(addr, size);
261 if (bochs->fb_map == NULL) {
262 DRM_ERROR("Cannot map framebuffer\n");
263 return -ENOMEM;
264 }
265 bochs->fb_base = addr;
266 bochs->fb_size = size;
267
268 DRM_INFO("Found bochs VGA, ID 0x%x.\n", id);
269 DRM_INFO("Framebuffer size %ld kB @ 0x%lx, %s @ 0x%lx.\n",
270 size / 1024, addr,
271 bochs->ioports ? "ioports" : "mmio",
272 ioaddr);
273
274 if (bochs->mmio && pdev->revision >= 2) {
275 bochs->qext_size = readl(bochs->mmio + 0x600);
276 if (bochs->qext_size < 4 || bochs->qext_size > iosize) {
277 bochs->qext_size = 0;
278 goto noext;
279 }
280 DRM_DEBUG("Found qemu ext regs, size %ld\n",
281 bochs->qext_size);
282 bochs_hw_set_native_endian(bochs);
283 }
284
285noext:
286 return 0;
287}
288
289static void bochs_hw_fini(struct drm_device *dev)
290{
291 struct bochs_device *bochs = dev->dev_private;
292
293
294
295 if (bochs->mmio)
296 iounmap(bochs->mmio);
297 if (bochs->ioports)
298 release_region(VBE_DISPI_IOPORT_INDEX, 2);
299 if (bochs->fb_map)
300 iounmap(bochs->fb_map);
301 pci_release_regions(to_pci_dev(dev->dev));
302 kfree(bochs->edid);
303}
304
305static void bochs_hw_blank(struct bochs_device *bochs, bool blank)
306{
307 DRM_DEBUG_DRIVER("hw_blank %d\n", blank);
308
309 (void)bochs_vga_readb(bochs, VGA_IS1_RC);
310
311 bochs_vga_writeb(bochs, VGA_ATT_W, blank ? 0 : 0x20);
312}
313
314static void bochs_hw_setmode(struct bochs_device *bochs, struct drm_display_mode *mode)
315{
316 int idx;
317
318 if (!drm_dev_enter(bochs->dev, &idx))
319 return;
320
321 bochs->xres = mode->hdisplay;
322 bochs->yres = mode->vdisplay;
323 bochs->bpp = 32;
324 bochs->stride = mode->hdisplay * (bochs->bpp / 8);
325 bochs->yres_virtual = bochs->fb_size / bochs->stride;
326
327 DRM_DEBUG_DRIVER("%dx%d @ %d bpp, vy %d\n",
328 bochs->xres, bochs->yres, bochs->bpp,
329 bochs->yres_virtual);
330
331 bochs_hw_blank(bochs, false);
332
333 bochs_dispi_write(bochs, VBE_DISPI_INDEX_ENABLE, 0);
334 bochs_dispi_write(bochs, VBE_DISPI_INDEX_BPP, bochs->bpp);
335 bochs_dispi_write(bochs, VBE_DISPI_INDEX_XRES, bochs->xres);
336 bochs_dispi_write(bochs, VBE_DISPI_INDEX_YRES, bochs->yres);
337 bochs_dispi_write(bochs, VBE_DISPI_INDEX_BANK, 0);
338 bochs_dispi_write(bochs, VBE_DISPI_INDEX_VIRT_WIDTH, bochs->xres);
339 bochs_dispi_write(bochs, VBE_DISPI_INDEX_VIRT_HEIGHT,
340 bochs->yres_virtual);
341 bochs_dispi_write(bochs, VBE_DISPI_INDEX_X_OFFSET, 0);
342 bochs_dispi_write(bochs, VBE_DISPI_INDEX_Y_OFFSET, 0);
343
344 bochs_dispi_write(bochs, VBE_DISPI_INDEX_ENABLE,
345 VBE_DISPI_ENABLED | VBE_DISPI_LFB_ENABLED);
346
347 drm_dev_exit(idx);
348}
349
350static void bochs_hw_setformat(struct bochs_device *bochs, const struct drm_format_info *format)
351{
352 int idx;
353
354 if (!drm_dev_enter(bochs->dev, &idx))
355 return;
356
357 DRM_DEBUG_DRIVER("format %c%c%c%c\n",
358 (format->format >> 0) & 0xff,
359 (format->format >> 8) & 0xff,
360 (format->format >> 16) & 0xff,
361 (format->format >> 24) & 0xff);
362
363 switch (format->format) {
364 case DRM_FORMAT_XRGB8888:
365 bochs_hw_set_little_endian(bochs);
366 break;
367 case DRM_FORMAT_BGRX8888:
368 bochs_hw_set_big_endian(bochs);
369 break;
370 default:
371
372 DRM_ERROR("%s: Huh? Got framebuffer format 0x%x",
373 __func__, format->format);
374 break;
375 }
376
377 drm_dev_exit(idx);
378}
379
380static void bochs_hw_setbase(struct bochs_device *bochs, int x, int y, int stride, u64 addr)
381{
382 unsigned long offset;
383 unsigned int vx, vy, vwidth, idx;
384
385 if (!drm_dev_enter(bochs->dev, &idx))
386 return;
387
388 bochs->stride = stride;
389 offset = (unsigned long)addr +
390 y * bochs->stride +
391 x * (bochs->bpp / 8);
392 vy = offset / bochs->stride;
393 vx = (offset % bochs->stride) * 8 / bochs->bpp;
394 vwidth = stride * 8 / bochs->bpp;
395
396 DRM_DEBUG_DRIVER("x %d, y %d, addr %llx -> offset %lx, vx %d, vy %d\n",
397 x, y, addr, offset, vx, vy);
398 bochs_dispi_write(bochs, VBE_DISPI_INDEX_VIRT_WIDTH, vwidth);
399 bochs_dispi_write(bochs, VBE_DISPI_INDEX_X_OFFSET, vx);
400 bochs_dispi_write(bochs, VBE_DISPI_INDEX_Y_OFFSET, vy);
401
402 drm_dev_exit(idx);
403}
404
405
406
407static const uint32_t bochs_formats[] = {
408 DRM_FORMAT_XRGB8888,
409 DRM_FORMAT_BGRX8888,
410};
411
412static void bochs_plane_update(struct bochs_device *bochs, struct drm_plane_state *state)
413{
414 struct drm_gem_vram_object *gbo;
415 s64 gpu_addr;
416
417 if (!state->fb || !bochs->stride)
418 return;
419
420 gbo = drm_gem_vram_of_gem(state->fb->obj[0]);
421 gpu_addr = drm_gem_vram_offset(gbo);
422 if (WARN_ON_ONCE(gpu_addr < 0))
423 return;
424
425 bochs_hw_setbase(bochs,
426 state->crtc_x,
427 state->crtc_y,
428 state->fb->pitches[0],
429 state->fb->offsets[0] + gpu_addr);
430 bochs_hw_setformat(bochs, state->fb->format);
431}
432
433static void bochs_pipe_enable(struct drm_simple_display_pipe *pipe,
434 struct drm_crtc_state *crtc_state,
435 struct drm_plane_state *plane_state)
436{
437 struct bochs_device *bochs = pipe->crtc.dev->dev_private;
438
439 bochs_hw_setmode(bochs, &crtc_state->mode);
440 bochs_plane_update(bochs, plane_state);
441}
442
443static void bochs_pipe_disable(struct drm_simple_display_pipe *pipe)
444{
445 struct bochs_device *bochs = pipe->crtc.dev->dev_private;
446
447 bochs_hw_blank(bochs, true);
448}
449
450static void bochs_pipe_update(struct drm_simple_display_pipe *pipe,
451 struct drm_plane_state *old_state)
452{
453 struct bochs_device *bochs = pipe->crtc.dev->dev_private;
454
455 bochs_plane_update(bochs, pipe->plane.state);
456}
457
458static const struct drm_simple_display_pipe_funcs bochs_pipe_funcs = {
459 .enable = bochs_pipe_enable,
460 .disable = bochs_pipe_disable,
461 .update = bochs_pipe_update,
462 .prepare_fb = drm_gem_vram_simple_display_pipe_prepare_fb,
463 .cleanup_fb = drm_gem_vram_simple_display_pipe_cleanup_fb,
464};
465
466static int bochs_connector_get_modes(struct drm_connector *connector)
467{
468 struct bochs_device *bochs =
469 container_of(connector, struct bochs_device, connector);
470 int count = 0;
471
472 if (bochs->edid)
473 count = drm_add_edid_modes(connector, bochs->edid);
474
475 if (!count) {
476 count = drm_add_modes_noedid(connector, 8192, 8192);
477 drm_set_preferred_mode(connector, defx, defy);
478 }
479 return count;
480}
481
482static const struct drm_connector_helper_funcs bochs_connector_connector_helper_funcs = {
483 .get_modes = bochs_connector_get_modes,
484};
485
486static const struct drm_connector_funcs bochs_connector_connector_funcs = {
487 .fill_modes = drm_helper_probe_single_connector_modes,
488 .destroy = drm_connector_cleanup,
489 .reset = drm_atomic_helper_connector_reset,
490 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
491 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
492};
493
494static void bochs_connector_init(struct drm_device *dev)
495{
496 struct bochs_device *bochs = dev->dev_private;
497 struct drm_connector *connector = &bochs->connector;
498
499 drm_connector_init(dev, connector, &bochs_connector_connector_funcs,
500 DRM_MODE_CONNECTOR_VIRTUAL);
501 drm_connector_helper_add(connector, &bochs_connector_connector_helper_funcs);
502
503 bochs_hw_load_edid(bochs);
504 if (bochs->edid) {
505 DRM_INFO("Found EDID data blob.\n");
506 drm_connector_attach_edid_property(connector);
507 drm_connector_update_edid_property(connector, bochs->edid);
508 }
509}
510
511static struct drm_framebuffer *
512bochs_gem_fb_create(struct drm_device *dev, struct drm_file *file,
513 const struct drm_mode_fb_cmd2 *mode_cmd)
514{
515 if (mode_cmd->pixel_format != DRM_FORMAT_XRGB8888 &&
516 mode_cmd->pixel_format != DRM_FORMAT_BGRX8888)
517 return ERR_PTR(-EINVAL);
518
519 return drm_gem_fb_create(dev, file, mode_cmd);
520}
521
522static const struct drm_mode_config_funcs bochs_mode_funcs = {
523 .fb_create = bochs_gem_fb_create,
524 .mode_valid = drm_vram_helper_mode_valid,
525 .atomic_check = drm_atomic_helper_check,
526 .atomic_commit = drm_atomic_helper_commit,
527};
528
529static int bochs_kms_init(struct bochs_device *bochs)
530{
531 int ret;
532
533 ret = drmm_mode_config_init(bochs->dev);
534 if (ret)
535 return ret;
536
537 bochs->dev->mode_config.max_width = 8192;
538 bochs->dev->mode_config.max_height = 8192;
539
540 bochs->dev->mode_config.fb_base = bochs->fb_base;
541 bochs->dev->mode_config.preferred_depth = 24;
542 bochs->dev->mode_config.prefer_shadow = 0;
543 bochs->dev->mode_config.prefer_shadow_fbdev = 1;
544 bochs->dev->mode_config.quirk_addfb_prefer_host_byte_order = true;
545
546 bochs->dev->mode_config.funcs = &bochs_mode_funcs;
547
548 bochs_connector_init(bochs->dev);
549 drm_simple_display_pipe_init(bochs->dev,
550 &bochs->pipe,
551 &bochs_pipe_funcs,
552 bochs_formats,
553 ARRAY_SIZE(bochs_formats),
554 NULL,
555 &bochs->connector);
556
557 drm_mode_config_reset(bochs->dev);
558
559 return 0;
560}
561
562
563
564
565static int bochs_load(struct drm_device *dev)
566{
567 struct bochs_device *bochs;
568 int ret;
569
570 bochs = drmm_kzalloc(dev, sizeof(*bochs), GFP_KERNEL);
571 if (bochs == NULL)
572 return -ENOMEM;
573 dev->dev_private = bochs;
574 bochs->dev = dev;
575
576 ret = bochs_hw_init(dev);
577 if (ret)
578 return ret;
579
580 ret = drmm_vram_helper_init(dev, bochs->fb_base, bochs->fb_size);
581 if (ret)
582 return ret;
583
584 ret = bochs_kms_init(bochs);
585 if (ret)
586 return ret;
587
588 return 0;
589}
590
591DEFINE_DRM_GEM_FOPS(bochs_fops);
592
593static const struct drm_driver bochs_driver = {
594 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
595 .fops = &bochs_fops,
596 .name = "bochs-drm",
597 .desc = "bochs dispi vga interface (qemu stdvga)",
598 .date = "20130925",
599 .major = 1,
600 .minor = 0,
601 DRM_GEM_VRAM_DRIVER,
602};
603
604
605
606
607#ifdef CONFIG_PM_SLEEP
608static int bochs_pm_suspend(struct device *dev)
609{
610 struct drm_device *drm_dev = dev_get_drvdata(dev);
611
612 return drm_mode_config_helper_suspend(drm_dev);
613}
614
615static int bochs_pm_resume(struct device *dev)
616{
617 struct drm_device *drm_dev = dev_get_drvdata(dev);
618
619 return drm_mode_config_helper_resume(drm_dev);
620}
621#endif
622
623static const struct dev_pm_ops bochs_pm_ops = {
624 SET_SYSTEM_SLEEP_PM_OPS(bochs_pm_suspend,
625 bochs_pm_resume)
626};
627
628
629
630
631static int bochs_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
632{
633 struct drm_device *dev;
634 unsigned long fbsize;
635 int ret;
636
637 fbsize = pci_resource_len(pdev, 0);
638 if (fbsize < 4 * 1024 * 1024) {
639 DRM_ERROR("less than 4 MB video memory, ignoring device\n");
640 return -ENOMEM;
641 }
642
643 ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev, &bochs_driver);
644 if (ret)
645 return ret;
646
647 dev = drm_dev_alloc(&bochs_driver, &pdev->dev);
648 if (IS_ERR(dev))
649 return PTR_ERR(dev);
650
651 ret = pcim_enable_device(pdev);
652 if (ret)
653 goto err_free_dev;
654
655 pci_set_drvdata(pdev, dev);
656
657 ret = bochs_load(dev);
658 if (ret)
659 goto err_free_dev;
660
661 ret = drm_dev_register(dev, 0);
662 if (ret)
663 goto err_free_dev;
664
665 drm_fbdev_generic_setup(dev, 32);
666 return ret;
667
668err_free_dev:
669 drm_dev_put(dev);
670 return ret;
671}
672
673static void bochs_pci_remove(struct pci_dev *pdev)
674{
675 struct drm_device *dev = pci_get_drvdata(pdev);
676
677 drm_dev_unplug(dev);
678 drm_atomic_helper_shutdown(dev);
679 bochs_hw_fini(dev);
680 drm_dev_put(dev);
681}
682
683static const struct pci_device_id bochs_pci_tbl[] = {
684 {
685 .vendor = 0x1234,
686 .device = 0x1111,
687 .subvendor = PCI_SUBVENDOR_ID_REDHAT_QUMRANET,
688 .subdevice = PCI_SUBDEVICE_ID_QEMU,
689 .driver_data = BOCHS_QEMU_STDVGA,
690 },
691 {
692 .vendor = 0x1234,
693 .device = 0x1111,
694 .subvendor = PCI_ANY_ID,
695 .subdevice = PCI_ANY_ID,
696 .driver_data = BOCHS_UNKNOWN,
697 },
698 { }
699};
700
701static struct pci_driver bochs_pci_driver = {
702 .name = "bochs-drm",
703 .id_table = bochs_pci_tbl,
704 .probe = bochs_pci_probe,
705 .remove = bochs_pci_remove,
706 .driver.pm = &bochs_pm_ops,
707};
708
709
710
711
712static int __init bochs_init(void)
713{
714 if (vgacon_text_force() && bochs_modeset == -1)
715 return -EINVAL;
716
717 if (bochs_modeset == 0)
718 return -EINVAL;
719
720 return pci_register_driver(&bochs_pci_driver);
721}
722
723static void __exit bochs_exit(void)
724{
725 pci_unregister_driver(&bochs_pci_driver);
726}
727
728module_init(bochs_init);
729module_exit(bochs_exit);
730
731MODULE_DEVICE_TABLE(pci, bochs_pci_tbl);
732MODULE_AUTHOR("Gerd Hoffmann <kraxel@redhat.com>");
733MODULE_LICENSE("GPL");
734
