linux/drivers/hsi/controllers/omap_ssi.h
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   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/* OMAP SSI internal interface.
   3 *
   4 * Copyright (C) 2010 Nokia Corporation. All rights reserved.
   5 * Copyright (C) 2013 Sebastian Reichel
   6 *
   7 * Contact: Carlos Chinea <carlos.chinea@nokia.com>
   8 */
   9
  10#ifndef __LINUX_HSI_OMAP_SSI_H__
  11#define __LINUX_HSI_OMAP_SSI_H__
  12
  13#include <linux/device.h>
  14#include <linux/module.h>
  15#include <linux/platform_device.h>
  16#include <linux/hsi/hsi.h>
  17#include <linux/gpio/consumer.h>
  18#include <linux/interrupt.h>
  19#include <linux/io.h>
  20
  21#define SSI_MAX_CHANNELS        8
  22#define SSI_MAX_GDD_LCH         8
  23#define SSI_BYTES_TO_FRAMES(x) ((((x) - 1) >> 2) + 1)
  24
  25#define SSI_WAKE_EN 0
  26
  27/**
  28 * struct omap_ssm_ctx - OMAP synchronous serial module (TX/RX) context
  29 * @mode: Bit transmission mode
  30 * @channels: Number of channels
  31 * @framesize: Frame size in bits
  32 * @timeout: RX frame timeout
  33 * @divisor: TX divider
  34 * @arb_mode: Arbitration mode for TX frame (Round robin, priority)
  35 */
  36struct omap_ssm_ctx {
  37        u32     mode;
  38        u32     channels;
  39        u32     frame_size;
  40        union   {
  41                        u32     timeout; /* Rx Only */
  42                        struct  {
  43                                        u32     arb_mode;
  44                                        u32     divisor;
  45                        }; /* Tx only */
  46        };
  47};
  48
  49/**
  50 * struct omap_ssi_port - OMAP SSI port data
  51 * @dev: device associated to the port (HSI port)
  52 * @pdev: platform device associated to the port
  53 * @sst_dma: SSI transmitter physical base address
  54 * @ssr_dma: SSI receiver physical base address
  55 * @sst_base: SSI transmitter base address
  56 * @ssr_base: SSI receiver base address
  57 * @wk_lock: spin lock to serialize access to the wake lines
  58 * @lock: Spin lock to serialize access to the SSI port
  59 * @channels: Current number of channels configured (1,2,4 or 8)
  60 * @txqueue: TX message queues
  61 * @rxqueue: RX message queues
  62 * @brkqueue: Queue of incoming HWBREAK requests (FRAME mode)
  63 * @errqueue: Queue for failed messages
  64 * @errqueue_work: Delayed Work for failed messages
  65 * @irq: IRQ number
  66 * @wake_irq: IRQ number for incoming wake line (-1 if none)
  67 * @wake_gpio: GPIO number for incoming wake line (-1 if none)
  68 * @flags: flags to keep track of states
  69 * @wk_refcount: Reference count for output wake line
  70 * @work: worker for starting TX
  71 * @sys_mpu_enable: Context for the interrupt enable register for irq 0
  72 * @sst: Context for the synchronous serial transmitter
  73 * @ssr: Context for the synchronous serial receiver
  74 */
  75struct omap_ssi_port {
  76        struct device           *dev;
  77        struct device           *pdev;
  78        dma_addr_t              sst_dma;
  79        dma_addr_t              ssr_dma;
  80        void __iomem            *sst_base;
  81        void __iomem            *ssr_base;
  82        spinlock_t              wk_lock;
  83        spinlock_t              lock;
  84        unsigned int            channels;
  85        struct list_head        txqueue[SSI_MAX_CHANNELS];
  86        struct list_head        rxqueue[SSI_MAX_CHANNELS];
  87        struct list_head        brkqueue;
  88        struct list_head        errqueue;
  89        struct delayed_work     errqueue_work;
  90        unsigned int            irq;
  91        int                     wake_irq;
  92        struct gpio_desc        *wake_gpio;
  93        bool                    wktest:1; /* FIXME: HACK to be removed */
  94        unsigned long           flags;
  95        unsigned int            wk_refcount;
  96        struct work_struct      work;
  97        /* OMAP SSI port context */
  98        u32                     sys_mpu_enable; /* We use only one irq */
  99        struct omap_ssm_ctx     sst;
 100        struct omap_ssm_ctx     ssr;
 101        u32                     loss_count;
 102        u32                     port_id;
 103#ifdef CONFIG_DEBUG_FS
 104        struct dentry *dir;
 105#endif
 106};
 107
 108/**
 109 * struct gdd_trn - GDD transaction data
 110 * @msg: Pointer to the HSI message being served
 111 * @sg: Pointer to the current sg entry being served
 112 */
 113struct gdd_trn {
 114        struct hsi_msg          *msg;
 115        struct scatterlist      *sg;
 116};
 117
 118/**
 119 * struct omap_ssi_controller - OMAP SSI controller data
 120 * @dev: device associated to the controller (HSI controller)
 121 * @sys: SSI I/O base address
 122 * @gdd: GDD I/O base address
 123 * @fck: SSI functional clock
 124 * @gdd_irq: IRQ line for GDD
 125 * @gdd_tasklet: bottom half for DMA transfers
 126 * @gdd_trn: Array of GDD transaction data for ongoing GDD transfers
 127 * @lock: lock to serialize access to GDD
 128 * @fck_nb: DVFS notfifier block
 129 * @fck_rate: clock rate
 130 * @loss_count: To follow if we need to restore context or not
 131 * @max_speed: Maximum TX speed (Kb/s) set by the clients.
 132 * @gdd_gcr: SSI GDD saved context
 133 * @get_loss: Pointer to omap_pm_get_dev_context_loss_count, if any
 134 * @port: Array of pointers of the ports of the controller
 135 * @dir: Debugfs SSI root directory
 136 */
 137struct omap_ssi_controller {
 138        struct device           *dev;
 139        void __iomem            *sys;
 140        void __iomem            *gdd;
 141        struct clk              *fck;
 142        unsigned int            gdd_irq;
 143        struct tasklet_struct   gdd_tasklet;
 144        struct gdd_trn          gdd_trn[SSI_MAX_GDD_LCH];
 145        spinlock_t              lock;
 146        struct notifier_block   fck_nb;
 147        unsigned long           fck_rate;
 148        u32                     loss_count;
 149        u32                     max_speed;
 150        /* OMAP SSI Controller context */
 151        u32                     gdd_gcr;
 152        int                     (*get_loss)(struct device *dev);
 153        struct omap_ssi_port    **port;
 154#ifdef CONFIG_DEBUG_FS
 155        struct dentry *dir;
 156#endif
 157};
 158
 159void omap_ssi_port_update_fclk(struct hsi_controller *ssi,
 160                               struct omap_ssi_port *omap_port);
 161
 162extern struct platform_driver ssi_port_pdriver;
 163
 164#endif /* __LINUX_HSI_OMAP_SSI_H__ */
 165