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22#include <linux/err.h>
23#include <linux/hwmon.h>
24#include <linux/i2c.h>
25#include <linux/init.h>
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/regmap.h>
29#include <linux/slab.h>
30#include <linux/util_macros.h>
31
32
33#define TMP51X_SHUNT_CONFIG 0x00
34#define TMP51X_TEMP_CONFIG 0x01
35#define TMP51X_STATUS 0x02
36#define TMP51X_SMBUS_ALERT 0x03
37#define TMP51X_SHUNT_CURRENT_RESULT 0x04
38#define TMP51X_BUS_VOLTAGE_RESULT 0x05
39#define TMP51X_POWER_RESULT 0x06
40#define TMP51X_BUS_CURRENT_RESULT 0x07
41#define TMP51X_LOCAL_TEMP_RESULT 0x08
42#define TMP51X_REMOTE_TEMP_RESULT_1 0x09
43#define TMP51X_REMOTE_TEMP_RESULT_2 0x0A
44#define TMP51X_SHUNT_CURRENT_H_LIMIT 0x0C
45#define TMP51X_SHUNT_CURRENT_L_LIMIT 0x0D
46#define TMP51X_BUS_VOLTAGE_H_LIMIT 0x0E
47#define TMP51X_BUS_VOLTAGE_L_LIMIT 0x0F
48#define TMP51X_POWER_LIMIT 0x10
49#define TMP51X_LOCAL_TEMP_LIMIT 0x11
50#define TMP51X_REMOTE_TEMP_LIMIT_1 0x12
51#define TMP51X_REMOTE_TEMP_LIMIT_2 0x13
52#define TMP51X_SHUNT_CALIBRATION 0x15
53#define TMP51X_N_FACTOR_AND_HYST_1 0x16
54#define TMP51X_N_FACTOR_2 0x17
55#define TMP51X_MAN_ID_REG 0xFE
56#define TMP51X_DEVICE_ID_REG 0xFF
57
58
59#define TMP513_REMOTE_TEMP_RESULT_3 0x0B
60#define TMP513_REMOTE_TEMP_LIMIT_3 0x14
61#define TMP513_N_FACTOR_3 0x18
62
63
64#define TMP51X_MANUFACTURER_ID 0x55FF
65
66#define TMP512_DEVICE_ID 0x22FF
67#define TMP513_DEVICE_ID 0x23FF
68
69
70#define TMP51X_SHUNT_CONFIG_DEFAULT 0x399F
71#define TMP51X_SHUNT_VALUE_DEFAULT 1000
72#define TMP51X_VBUS_RANGE_DEFAULT TMP51X_VBUS_RANGE_32V
73#define TMP51X_PGA_DEFAULT 8
74#define TMP51X_MAX_REGISTER_ADDR 0xFF
75
76#define TMP512_TEMP_CONFIG_DEFAULT 0xBF80
77#define TMP513_TEMP_CONFIG_DEFAULT 0xFF80
78
79
80#define CURRENT_SENSE_VOLTAGE_320_MASK 0x1800
81#define CURRENT_SENSE_VOLTAGE_160_MASK 0x1000
82#define CURRENT_SENSE_VOLTAGE_80_MASK 0x0800
83#define CURRENT_SENSE_VOLTAGE_40_MASK 0
84
85#define TMP51X_BUS_VOLTAGE_MASK 0x2000
86#define TMP51X_NFACTOR_MASK 0xFF00
87#define TMP51X_HYST_MASK 0x00FF
88
89#define TMP51X_BUS_VOLTAGE_SHIFT 3
90#define TMP51X_TEMP_SHIFT 3
91
92
93#define TMP51X_SHUNT_CURRENT_H_LIMIT_POS 15
94#define TMP51X_SHUNT_CURRENT_L_LIMIT_POS 14
95#define TMP51X_BUS_VOLTAGE_H_LIMIT_POS 13
96#define TMP51X_BUS_VOLTAGE_L_LIMIT_POS 12
97#define TMP51X_POWER_LIMIT_POS 11
98#define TMP51X_LOCAL_TEMP_LIMIT_POS 10
99#define TMP51X_REMOTE_TEMP_LIMIT_1_POS 9
100#define TMP51X_REMOTE_TEMP_LIMIT_2_POS 8
101#define TMP513_REMOTE_TEMP_LIMIT_3_POS 7
102
103#define TMP51X_VBUS_RANGE_32V 32000000
104#define TMP51X_VBUS_RANGE_16V 16000000
105
106
107#define MAX_BUS_VOLTAGE_32_LIMIT 32764
108#define MAX_BUS_VOLTAGE_16_LIMIT 16382
109
110
111#define MAX_TEMP_LIMIT 125000
112#define MIN_TEMP_LIMIT -40000
113
114#define MAX_TEMP_HYST 127500
115
116static const u8 TMP51X_TEMP_INPUT[4] = {
117 TMP51X_LOCAL_TEMP_RESULT,
118 TMP51X_REMOTE_TEMP_RESULT_1,
119 TMP51X_REMOTE_TEMP_RESULT_2,
120 TMP513_REMOTE_TEMP_RESULT_3
121};
122
123static const u8 TMP51X_TEMP_CRIT[4] = {
124 TMP51X_LOCAL_TEMP_LIMIT,
125 TMP51X_REMOTE_TEMP_LIMIT_1,
126 TMP51X_REMOTE_TEMP_LIMIT_2,
127 TMP513_REMOTE_TEMP_LIMIT_3
128};
129
130static const u8 TMP51X_TEMP_CRIT_ALARM[4] = {
131 TMP51X_LOCAL_TEMP_LIMIT_POS,
132 TMP51X_REMOTE_TEMP_LIMIT_1_POS,
133 TMP51X_REMOTE_TEMP_LIMIT_2_POS,
134 TMP513_REMOTE_TEMP_LIMIT_3_POS
135};
136
137static const u8 TMP51X_TEMP_CRIT_HYST[4] = {
138 TMP51X_N_FACTOR_AND_HYST_1,
139 TMP51X_N_FACTOR_AND_HYST_1,
140 TMP51X_N_FACTOR_AND_HYST_1,
141 TMP51X_N_FACTOR_AND_HYST_1
142};
143
144static const u8 TMP51X_CURR_INPUT[2] = {
145 TMP51X_SHUNT_CURRENT_RESULT,
146 TMP51X_BUS_CURRENT_RESULT
147};
148
149static struct regmap_config tmp51x_regmap_config = {
150 .reg_bits = 8,
151 .val_bits = 16,
152 .max_register = TMP51X_MAX_REGISTER_ADDR,
153};
154
155enum tmp51x_ids {
156 tmp512, tmp513
157};
158
159struct tmp51x_data {
160 u16 shunt_config;
161 u16 pga_gain;
162 u32 vbus_range_uvolt;
163
164 u16 temp_config;
165 u32 nfactor[3];
166
167 u32 shunt_uohms;
168
169 u32 curr_lsb_ua;
170 u32 pwr_lsb_uw;
171
172 enum tmp51x_ids id;
173 struct regmap *regmap;
174};
175
176
177static inline u8 tmp51x_get_pga_shift(struct tmp51x_data *data)
178{
179 return 5 - ffs(data->pga_gain);
180}
181
182static int tmp51x_get_value(struct tmp51x_data *data, u8 reg, u8 pos,
183 unsigned int regval, long *val)
184{
185 switch (reg) {
186 case TMP51X_STATUS:
187 *val = (regval >> pos) & 1;
188 break;
189 case TMP51X_SHUNT_CURRENT_RESULT:
190 case TMP51X_SHUNT_CURRENT_H_LIMIT:
191 case TMP51X_SHUNT_CURRENT_L_LIMIT:
192
193
194
195
196
197
198 *val = sign_extend32(regval, 17 - tmp51x_get_pga_shift(data));
199 *val = DIV_ROUND_CLOSEST(*val * 10000, data->shunt_uohms);
200 break;
201 case TMP51X_BUS_VOLTAGE_RESULT:
202 case TMP51X_BUS_VOLTAGE_H_LIMIT:
203 case TMP51X_BUS_VOLTAGE_L_LIMIT:
204
205 *val = (regval >> TMP51X_BUS_VOLTAGE_SHIFT) * 4;
206 break;
207 case TMP51X_POWER_RESULT:
208 case TMP51X_POWER_LIMIT:
209
210 *val = regval * data->pwr_lsb_uw;
211 break;
212 case TMP51X_BUS_CURRENT_RESULT:
213
214 *val = sign_extend32(regval, 16) * data->curr_lsb_ua;
215 *val = DIV_ROUND_CLOSEST(*val, 1000);
216 break;
217 case TMP51X_LOCAL_TEMP_RESULT:
218 case TMP51X_REMOTE_TEMP_RESULT_1:
219 case TMP51X_REMOTE_TEMP_RESULT_2:
220 case TMP513_REMOTE_TEMP_RESULT_3:
221 case TMP51X_LOCAL_TEMP_LIMIT:
222 case TMP51X_REMOTE_TEMP_LIMIT_1:
223 case TMP51X_REMOTE_TEMP_LIMIT_2:
224 case TMP513_REMOTE_TEMP_LIMIT_3:
225
226 *val = sign_extend32(regval, 16) >> TMP51X_TEMP_SHIFT;
227 *val = DIV_ROUND_CLOSEST(*val * 625, 10);
228 break;
229 case TMP51X_N_FACTOR_AND_HYST_1:
230
231 *val = (regval & TMP51X_HYST_MASK) * 500;
232 break;
233 default:
234
235 WARN_ON_ONCE(1);
236 *val = 0;
237 return -EOPNOTSUPP;
238 }
239
240 return 0;
241}
242
243static int tmp51x_set_value(struct tmp51x_data *data, u8 reg, long val)
244{
245 int regval, max_val;
246 u32 mask = 0;
247
248 switch (reg) {
249 case TMP51X_SHUNT_CURRENT_H_LIMIT:
250 case TMP51X_SHUNT_CURRENT_L_LIMIT:
251
252
253
254
255 val = DIV_ROUND_CLOSEST(val * data->shunt_uohms, 10000);
256 max_val = U16_MAX >> tmp51x_get_pga_shift(data);
257 regval = clamp_val(val, -max_val, max_val);
258 break;
259 case TMP51X_BUS_VOLTAGE_H_LIMIT:
260 case TMP51X_BUS_VOLTAGE_L_LIMIT:
261
262 max_val = (data->vbus_range_uvolt == TMP51X_VBUS_RANGE_32V) ?
263 MAX_BUS_VOLTAGE_32_LIMIT : MAX_BUS_VOLTAGE_16_LIMIT;
264
265 val = clamp_val(DIV_ROUND_CLOSEST(val, 4), 0, max_val);
266 regval = val << TMP51X_BUS_VOLTAGE_SHIFT;
267 break;
268 case TMP51X_POWER_LIMIT:
269 regval = clamp_val(DIV_ROUND_CLOSEST(val, data->pwr_lsb_uw), 0,
270 U16_MAX);
271 break;
272 case TMP51X_LOCAL_TEMP_LIMIT:
273 case TMP51X_REMOTE_TEMP_LIMIT_1:
274 case TMP51X_REMOTE_TEMP_LIMIT_2:
275 case TMP513_REMOTE_TEMP_LIMIT_3:
276
277 val = clamp_val(val, MIN_TEMP_LIMIT, MAX_TEMP_LIMIT);
278 regval = DIV_ROUND_CLOSEST(val * 10, 625) << TMP51X_TEMP_SHIFT;
279 break;
280 case TMP51X_N_FACTOR_AND_HYST_1:
281
282 val = clamp_val(val, 0, MAX_TEMP_HYST);
283 regval = DIV_ROUND_CLOSEST(val, 500);
284 mask = TMP51X_HYST_MASK;
285 break;
286 default:
287
288 WARN_ON_ONCE(1);
289 return -EOPNOTSUPP;
290 }
291
292 if (mask == 0)
293 return regmap_write(data->regmap, reg, regval);
294 else
295 return regmap_update_bits(data->regmap, reg, mask, regval);
296}
297
298static u8 tmp51x_get_reg(enum hwmon_sensor_types type, u32 attr, int channel)
299{
300 switch (type) {
301 case hwmon_temp:
302 switch (attr) {
303 case hwmon_temp_input:
304 return TMP51X_TEMP_INPUT[channel];
305 case hwmon_temp_crit_alarm:
306 return TMP51X_STATUS;
307 case hwmon_temp_crit:
308 return TMP51X_TEMP_CRIT[channel];
309 case hwmon_temp_crit_hyst:
310 return TMP51X_TEMP_CRIT_HYST[channel];
311 }
312 break;
313 case hwmon_in:
314 switch (attr) {
315 case hwmon_in_input:
316 return TMP51X_BUS_VOLTAGE_RESULT;
317 case hwmon_in_lcrit_alarm:
318 case hwmon_in_crit_alarm:
319 return TMP51X_STATUS;
320 case hwmon_in_lcrit:
321 return TMP51X_BUS_VOLTAGE_L_LIMIT;
322 case hwmon_in_crit:
323 return TMP51X_BUS_VOLTAGE_H_LIMIT;
324 }
325 break;
326 case hwmon_curr:
327 switch (attr) {
328 case hwmon_curr_input:
329 return TMP51X_CURR_INPUT[channel];
330 case hwmon_curr_lcrit_alarm:
331 case hwmon_curr_crit_alarm:
332 return TMP51X_STATUS;
333 case hwmon_curr_lcrit:
334 return TMP51X_SHUNT_CURRENT_L_LIMIT;
335 case hwmon_curr_crit:
336 return TMP51X_SHUNT_CURRENT_H_LIMIT;
337 }
338 break;
339 case hwmon_power:
340 switch (attr) {
341 case hwmon_power_input:
342 return TMP51X_POWER_RESULT;
343 case hwmon_power_crit_alarm:
344 return TMP51X_STATUS;
345 case hwmon_power_crit:
346 return TMP51X_POWER_LIMIT;
347 }
348 break;
349 default:
350 break;
351 }
352
353 return 0;
354}
355
356static u8 tmp51x_get_status_pos(enum hwmon_sensor_types type, u32 attr,
357 int channel)
358{
359 switch (type) {
360 case hwmon_temp:
361 switch (attr) {
362 case hwmon_temp_crit_alarm:
363 return TMP51X_TEMP_CRIT_ALARM[channel];
364 }
365 break;
366 case hwmon_in:
367 switch (attr) {
368 case hwmon_in_lcrit_alarm:
369 return TMP51X_BUS_VOLTAGE_L_LIMIT_POS;
370 case hwmon_in_crit_alarm:
371 return TMP51X_BUS_VOLTAGE_H_LIMIT_POS;
372 }
373 break;
374 case hwmon_curr:
375 switch (attr) {
376 case hwmon_curr_lcrit_alarm:
377 return TMP51X_SHUNT_CURRENT_L_LIMIT_POS;
378 case hwmon_curr_crit_alarm:
379 return TMP51X_SHUNT_CURRENT_H_LIMIT_POS;
380 }
381 break;
382 case hwmon_power:
383 switch (attr) {
384 case hwmon_power_crit_alarm:
385 return TMP51X_POWER_LIMIT_POS;
386 }
387 break;
388 default:
389 break;
390 }
391
392 return 0;
393}
394
395static int tmp51x_read(struct device *dev, enum hwmon_sensor_types type,
396 u32 attr, int channel, long *val)
397{
398 struct tmp51x_data *data = dev_get_drvdata(dev);
399 int ret;
400 u32 regval;
401 u8 pos = 0, reg = 0;
402
403 reg = tmp51x_get_reg(type, attr, channel);
404 if (reg == 0)
405 return -EOPNOTSUPP;
406
407 if (reg == TMP51X_STATUS)
408 pos = tmp51x_get_status_pos(type, attr, channel);
409
410 ret = regmap_read(data->regmap, reg, ®val);
411 if (ret < 0)
412 return ret;
413
414 return tmp51x_get_value(data, reg, pos, regval, val);
415}
416
417static int tmp51x_write(struct device *dev, enum hwmon_sensor_types type,
418 u32 attr, int channel, long val)
419{
420 u8 reg = 0;
421
422 reg = tmp51x_get_reg(type, attr, channel);
423 if (reg == 0)
424 return -EOPNOTSUPP;
425
426 return tmp51x_set_value(dev_get_drvdata(dev), reg, val);
427}
428
429static umode_t tmp51x_is_visible(const void *_data,
430 enum hwmon_sensor_types type, u32 attr,
431 int channel)
432{
433 const struct tmp51x_data *data = _data;
434
435 switch (type) {
436 case hwmon_temp:
437 if (data->id == tmp512 && channel == 4)
438 return 0;
439 switch (attr) {
440 case hwmon_temp_input:
441 case hwmon_temp_crit_alarm:
442 return 0444;
443 case hwmon_temp_crit:
444 return 0644;
445 case hwmon_temp_crit_hyst:
446 if (channel == 0)
447 return 0644;
448 return 0444;
449 }
450 break;
451 case hwmon_in:
452 switch (attr) {
453 case hwmon_in_input:
454 case hwmon_in_lcrit_alarm:
455 case hwmon_in_crit_alarm:
456 return 0444;
457 case hwmon_in_lcrit:
458 case hwmon_in_crit:
459 return 0644;
460 }
461 break;
462 case hwmon_curr:
463 if (!data->shunt_uohms)
464 return 0;
465
466 switch (attr) {
467 case hwmon_curr_input:
468 case hwmon_curr_lcrit_alarm:
469 case hwmon_curr_crit_alarm:
470 return 0444;
471 case hwmon_curr_lcrit:
472 case hwmon_curr_crit:
473 return 0644;
474 }
475 break;
476 case hwmon_power:
477 if (!data->shunt_uohms)
478 return 0;
479
480 switch (attr) {
481 case hwmon_power_input:
482 case hwmon_power_crit_alarm:
483 return 0444;
484 case hwmon_power_crit:
485 return 0644;
486 }
487 break;
488 default:
489 break;
490 }
491 return 0;
492}
493
494static const struct hwmon_channel_info *tmp51x_info[] = {
495 HWMON_CHANNEL_INFO(temp,
496 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_CRIT_ALARM |
497 HWMON_T_CRIT_HYST,
498 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_CRIT_ALARM |
499 HWMON_T_CRIT_HYST,
500 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_CRIT_ALARM |
501 HWMON_T_CRIT_HYST,
502 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_CRIT_ALARM |
503 HWMON_T_CRIT_HYST),
504 HWMON_CHANNEL_INFO(in,
505 HWMON_I_INPUT | HWMON_I_LCRIT | HWMON_I_LCRIT_ALARM |
506 HWMON_I_CRIT | HWMON_I_CRIT_ALARM),
507 HWMON_CHANNEL_INFO(curr,
508 HWMON_C_INPUT | HWMON_C_LCRIT | HWMON_C_LCRIT_ALARM |
509 HWMON_C_CRIT | HWMON_C_CRIT_ALARM,
510 HWMON_C_INPUT),
511 HWMON_CHANNEL_INFO(power,
512 HWMON_P_INPUT | HWMON_P_CRIT | HWMON_P_CRIT_ALARM),
513 NULL
514};
515
516static const struct hwmon_ops tmp51x_hwmon_ops = {
517 .is_visible = tmp51x_is_visible,
518 .read = tmp51x_read,
519 .write = tmp51x_write,
520};
521
522static const struct hwmon_chip_info tmp51x_chip_info = {
523 .ops = &tmp51x_hwmon_ops,
524 .info = tmp51x_info,
525};
526
527
528
529
530static int tmp51x_calibrate(struct tmp51x_data *data)
531{
532 int vshunt_max = data->pga_gain * 40;
533 u64 max_curr_ma;
534 u32 div;
535
536
537
538
539
540
541
542 if (data->shunt_uohms == 0)
543 return regmap_write(data->regmap, TMP51X_SHUNT_CALIBRATION, 0);
544
545 max_curr_ma = DIV_ROUND_CLOSEST_ULL(vshunt_max * 1000 * 1000,
546 data->shunt_uohms);
547
548
549
550
551
552 data->curr_lsb_ua = DIV_ROUND_CLOSEST_ULL(max_curr_ma * 1000, 32767);
553 data->pwr_lsb_uw = 20 * data->curr_lsb_ua;
554
555 div = DIV_ROUND_CLOSEST_ULL(data->curr_lsb_ua * data->shunt_uohms,
556 1000 * 1000);
557
558 return regmap_write(data->regmap, TMP51X_SHUNT_CALIBRATION,
559 DIV_ROUND_CLOSEST(40960, div));
560}
561
562
563
564
565static int tmp51x_init(struct tmp51x_data *data)
566{
567 unsigned int regval;
568 int ret = regmap_write(data->regmap, TMP51X_SHUNT_CONFIG,
569 data->shunt_config);
570 if (ret < 0)
571 return ret;
572
573 ret = regmap_write(data->regmap, TMP51X_TEMP_CONFIG, data->temp_config);
574 if (ret < 0)
575 return ret;
576
577
578 ret = regmap_update_bits(data->regmap, TMP51X_N_FACTOR_AND_HYST_1,
579 TMP51X_NFACTOR_MASK, data->nfactor[0] << 8);
580 if (ret < 0)
581 return ret;
582
583 ret = regmap_write(data->regmap, TMP51X_N_FACTOR_2,
584 data->nfactor[1] << 8);
585 if (ret < 0)
586 return ret;
587
588 if (data->id == tmp513) {
589 ret = regmap_write(data->regmap, TMP513_N_FACTOR_3,
590 data->nfactor[2] << 8);
591 if (ret < 0)
592 return ret;
593 }
594
595 ret = tmp51x_calibrate(data);
596 if (ret < 0)
597 return ret;
598
599
600 return regmap_read(data->regmap, TMP51X_STATUS, ®val);
601}
602
603static const struct i2c_device_id tmp51x_id[] = {
604 { "tmp512", tmp512 },
605 { "tmp513", tmp513 },
606 { }
607};
608MODULE_DEVICE_TABLE(i2c, tmp51x_id);
609
610static const struct of_device_id tmp51x_of_match[] = {
611 {
612 .compatible = "ti,tmp512",
613 .data = (void *)tmp512
614 },
615 {
616 .compatible = "ti,tmp513",
617 .data = (void *)tmp513
618 },
619 { },
620};
621MODULE_DEVICE_TABLE(of, tmp51x_of_match);
622
623static int tmp51x_vbus_range_to_reg(struct device *dev,
624 struct tmp51x_data *data)
625{
626 if (data->vbus_range_uvolt == TMP51X_VBUS_RANGE_32V) {
627 data->shunt_config |= TMP51X_BUS_VOLTAGE_MASK;
628 } else if (data->vbus_range_uvolt == TMP51X_VBUS_RANGE_16V) {
629 data->shunt_config &= ~TMP51X_BUS_VOLTAGE_MASK;
630 } else {
631 dev_err(dev, "ti,bus-range-microvolt is invalid: %u\n",
632 data->vbus_range_uvolt);
633 return -EINVAL;
634 }
635 return 0;
636}
637
638static int tmp51x_pga_gain_to_reg(struct device *dev, struct tmp51x_data *data)
639{
640 if (data->pga_gain == 8) {
641 data->shunt_config |= CURRENT_SENSE_VOLTAGE_320_MASK;
642 } else if (data->pga_gain == 4) {
643 data->shunt_config |= CURRENT_SENSE_VOLTAGE_160_MASK;
644 } else if (data->pga_gain == 2) {
645 data->shunt_config |= CURRENT_SENSE_VOLTAGE_80_MASK;
646 } else if (data->pga_gain == 1) {
647 data->shunt_config |= CURRENT_SENSE_VOLTAGE_40_MASK;
648 } else {
649 dev_err(dev, "ti,pga-gain is invalid: %u\n", data->pga_gain);
650 return -EINVAL;
651 }
652 return 0;
653}
654
655static int tmp51x_read_properties(struct device *dev, struct tmp51x_data *data)
656{
657 int ret;
658 u32 nfactor[3];
659 u32 val;
660
661 ret = device_property_read_u32(dev, "shunt-resistor-micro-ohms", &val);
662 data->shunt_uohms = (ret >= 0) ? val : TMP51X_SHUNT_VALUE_DEFAULT;
663
664 ret = device_property_read_u32(dev, "ti,bus-range-microvolt", &val);
665 data->vbus_range_uvolt = (ret >= 0) ? val : TMP51X_VBUS_RANGE_DEFAULT;
666 ret = tmp51x_vbus_range_to_reg(dev, data);
667 if (ret < 0)
668 return ret;
669
670 ret = device_property_read_u32(dev, "ti,pga-gain", &val);
671 data->pga_gain = (ret >= 0) ? val : TMP51X_PGA_DEFAULT;
672 ret = tmp51x_pga_gain_to_reg(dev, data);
673 if (ret < 0)
674 return ret;
675
676 ret = device_property_read_u32_array(dev, "ti,nfactor", nfactor,
677 (data->id == tmp513) ? 3 : 2);
678 if (ret >= 0)
679 memcpy(data->nfactor, nfactor, (data->id == tmp513) ? 3 : 2);
680
681
682 if (data->shunt_uohms > data->pga_gain * 40 * 1000 * 1000) {
683 dev_err(dev, "shunt-resistor: %u too big for pga_gain: %u\n",
684 data->shunt_uohms, data->pga_gain);
685 return -EINVAL;
686 }
687
688 return 0;
689}
690
691static void tmp51x_use_default(struct tmp51x_data *data)
692{
693 data->vbus_range_uvolt = TMP51X_VBUS_RANGE_DEFAULT;
694 data->pga_gain = TMP51X_PGA_DEFAULT;
695 data->shunt_uohms = TMP51X_SHUNT_VALUE_DEFAULT;
696}
697
698static int tmp51x_configure(struct device *dev, struct tmp51x_data *data)
699{
700 data->shunt_config = TMP51X_SHUNT_CONFIG_DEFAULT;
701 data->temp_config = (data->id == tmp513) ?
702 TMP513_TEMP_CONFIG_DEFAULT : TMP512_TEMP_CONFIG_DEFAULT;
703
704 if (dev->of_node)
705 return tmp51x_read_properties(dev, data);
706
707 tmp51x_use_default(data);
708
709 return 0;
710}
711
712static int tmp51x_probe(struct i2c_client *client)
713{
714 struct device *dev = &client->dev;
715 struct tmp51x_data *data;
716 struct device *hwmon_dev;
717 int ret;
718
719 data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
720 if (!data)
721 return -ENOMEM;
722
723 if (client->dev.of_node)
724 data->id = (enum tmp51x_ids)device_get_match_data(&client->dev);
725 else
726 data->id = i2c_match_id(tmp51x_id, client)->driver_data;
727
728 ret = tmp51x_configure(dev, data);
729 if (ret < 0) {
730 dev_err(dev, "error configuring the device: %d\n", ret);
731 return ret;
732 }
733
734 data->regmap = devm_regmap_init_i2c(client, &tmp51x_regmap_config);
735 if (IS_ERR(data->regmap)) {
736 dev_err(dev, "failed to allocate register map\n");
737 return PTR_ERR(data->regmap);
738 }
739
740 ret = tmp51x_init(data);
741 if (ret < 0) {
742 dev_err(dev, "error configuring the device: %d\n", ret);
743 return -ENODEV;
744 }
745
746 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
747 data,
748 &tmp51x_chip_info,
749 NULL);
750 if (IS_ERR(hwmon_dev))
751 return PTR_ERR(hwmon_dev);
752
753 dev_dbg(dev, "power monitor %s\n", client->name);
754
755 return 0;
756}
757
758static struct i2c_driver tmp51x_driver = {
759 .driver = {
760 .name = "tmp51x",
761 .of_match_table = of_match_ptr(tmp51x_of_match),
762 },
763 .probe_new = tmp51x_probe,
764 .id_table = tmp51x_id,
765};
766
767module_i2c_driver(tmp51x_driver);
768
769MODULE_AUTHOR("Eric Tremblay <etremblay@distechcontrols.com>");
770MODULE_DESCRIPTION("tmp51x driver");
771MODULE_LICENSE("GPL");
772
