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11#include <linux/acpi.h>
12#include <linux/clk-provider.h>
13#include <linux/clk.h>
14#include <linux/delay.h>
15#include <linux/dmi.h>
16#include <linux/err.h>
17#include <linux/errno.h>
18#include <linux/i2c.h>
19#include <linux/interrupt.h>
20#include <linux/io.h>
21#include <linux/kernel.h>
22#include <linux/mfd/syscon.h>
23#include <linux/module.h>
24#include <linux/of.h>
25#include <linux/platform_device.h>
26#include <linux/pm.h>
27#include <linux/pm_runtime.h>
28#include <linux/property.h>
29#include <linux/regmap.h>
30#include <linux/reset.h>
31#include <linux/sched.h>
32#include <linux/slab.h>
33#include <linux/suspend.h>
34#include <linux/units.h>
35
36#include "i2c-designware-core.h"
37
38static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
39{
40 return clk_get_rate(dev->clk) / KILO;
41}
42
43#ifdef CONFIG_ACPI
44static const struct acpi_device_id dw_i2c_acpi_match[] = {
45 { "INT33C2", 0 },
46 { "INT33C3", 0 },
47 { "INT3432", 0 },
48 { "INT3433", 0 },
49 { "80860F41", ACCESS_NO_IRQ_SUSPEND },
50 { "808622C1", ACCESS_NO_IRQ_SUSPEND },
51 { "AMD0010", ACCESS_INTR_MASK },
52 { "AMDI0010", ACCESS_INTR_MASK },
53 { "AMDI0510", 0 },
54 { "APMC0D0F", 0 },
55 { "HISI02A1", 0 },
56 { "HISI02A2", 0 },
57 { "HISI02A3", 0 },
58 { "HYGO0010", ACCESS_INTR_MASK },
59 { }
60};
61MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
62#endif
63
64#ifdef CONFIG_OF
65#define BT1_I2C_CTL 0x100
66#define BT1_I2C_CTL_ADDR_MASK GENMASK(7, 0)
67#define BT1_I2C_CTL_WR BIT(8)
68#define BT1_I2C_CTL_GO BIT(31)
69#define BT1_I2C_DI 0x104
70#define BT1_I2C_DO 0x108
71
72static int bt1_i2c_read(void *context, unsigned int reg, unsigned int *val)
73{
74 struct dw_i2c_dev *dev = context;
75 int ret;
76
77
78
79
80
81 ret = regmap_write(dev->sysmap, BT1_I2C_CTL,
82 BT1_I2C_CTL_GO | (reg & BT1_I2C_CTL_ADDR_MASK));
83 if (ret)
84 return ret;
85
86 return regmap_read(dev->sysmap, BT1_I2C_DO, val);
87}
88
89static int bt1_i2c_write(void *context, unsigned int reg, unsigned int val)
90{
91 struct dw_i2c_dev *dev = context;
92 int ret;
93
94 ret = regmap_write(dev->sysmap, BT1_I2C_DI, val);
95 if (ret)
96 return ret;
97
98 return regmap_write(dev->sysmap, BT1_I2C_CTL,
99 BT1_I2C_CTL_GO | BT1_I2C_CTL_WR | (reg & BT1_I2C_CTL_ADDR_MASK));
100}
101
102static struct regmap_config bt1_i2c_cfg = {
103 .reg_bits = 32,
104 .val_bits = 32,
105 .reg_stride = 4,
106 .fast_io = true,
107 .reg_read = bt1_i2c_read,
108 .reg_write = bt1_i2c_write,
109 .max_register = DW_IC_COMP_TYPE,
110};
111
112static int bt1_i2c_request_regs(struct dw_i2c_dev *dev)
113{
114 dev->sysmap = syscon_node_to_regmap(dev->dev->of_node->parent);
115 if (IS_ERR(dev->sysmap))
116 return PTR_ERR(dev->sysmap);
117
118 dev->map = devm_regmap_init(dev->dev, NULL, dev, &bt1_i2c_cfg);
119 return PTR_ERR_OR_ZERO(dev->map);
120}
121
122#define MSCC_ICPU_CFG_TWI_DELAY 0x0
123#define MSCC_ICPU_CFG_TWI_DELAY_ENABLE BIT(0)
124#define MSCC_ICPU_CFG_TWI_SPIKE_FILTER 0x4
125
126static int mscc_twi_set_sda_hold_time(struct dw_i2c_dev *dev)
127{
128 writel((dev->sda_hold_time << 1) | MSCC_ICPU_CFG_TWI_DELAY_ENABLE,
129 dev->ext + MSCC_ICPU_CFG_TWI_DELAY);
130
131 return 0;
132}
133
134static int dw_i2c_of_configure(struct platform_device *pdev)
135{
136 struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
137
138 switch (dev->flags & MODEL_MASK) {
139 case MODEL_MSCC_OCELOT:
140 dev->ext = devm_platform_ioremap_resource(pdev, 1);
141 if (!IS_ERR(dev->ext))
142 dev->set_sda_hold_time = mscc_twi_set_sda_hold_time;
143 break;
144 default:
145 break;
146 }
147
148 return 0;
149}
150
151static const struct of_device_id dw_i2c_of_match[] = {
152 { .compatible = "snps,designware-i2c", },
153 { .compatible = "mscc,ocelot-i2c", .data = (void *)MODEL_MSCC_OCELOT },
154 { .compatible = "baikal,bt1-sys-i2c", .data = (void *)MODEL_BAIKAL_BT1 },
155 {},
156};
157MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
158#else
159static int bt1_i2c_request_regs(struct dw_i2c_dev *dev)
160{
161 return -ENODEV;
162}
163
164static inline int dw_i2c_of_configure(struct platform_device *pdev)
165{
166 return -ENODEV;
167}
168#endif
169
170static void dw_i2c_plat_pm_cleanup(struct dw_i2c_dev *dev)
171{
172 pm_runtime_disable(dev->dev);
173
174 if (dev->shared_with_punit)
175 pm_runtime_put_noidle(dev->dev);
176}
177
178static int dw_i2c_plat_request_regs(struct dw_i2c_dev *dev)
179{
180 struct platform_device *pdev = to_platform_device(dev->dev);
181 int ret;
182
183 switch (dev->flags & MODEL_MASK) {
184 case MODEL_BAIKAL_BT1:
185 ret = bt1_i2c_request_regs(dev);
186 break;
187 default:
188 dev->base = devm_platform_ioremap_resource(pdev, 0);
189 ret = PTR_ERR_OR_ZERO(dev->base);
190 break;
191 }
192
193 return ret;
194}
195
196static const struct dmi_system_id dw_i2c_hwmon_class_dmi[] = {
197 {
198 .ident = "Qtechnology QT5222",
199 .matches = {
200 DMI_MATCH(DMI_SYS_VENDOR, "Qtechnology"),
201 DMI_MATCH(DMI_PRODUCT_NAME, "QT5222"),
202 },
203 },
204 { }
205};
206
207static int dw_i2c_plat_probe(struct platform_device *pdev)
208{
209 struct i2c_adapter *adap;
210 struct dw_i2c_dev *dev;
211 struct i2c_timings *t;
212 int irq, ret;
213
214 irq = platform_get_irq(pdev, 0);
215 if (irq < 0)
216 return irq;
217
218 dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
219 if (!dev)
220 return -ENOMEM;
221
222 dev->flags = (uintptr_t)device_get_match_data(&pdev->dev);
223 dev->dev = &pdev->dev;
224 dev->irq = irq;
225 platform_set_drvdata(pdev, dev);
226
227 ret = dw_i2c_plat_request_regs(dev);
228 if (ret)
229 return ret;
230
231 dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
232 if (IS_ERR(dev->rst))
233 return PTR_ERR(dev->rst);
234
235 reset_control_deassert(dev->rst);
236
237 t = &dev->timings;
238 i2c_parse_fw_timings(&pdev->dev, t, false);
239
240 i2c_dw_adjust_bus_speed(dev);
241
242 if (pdev->dev.of_node)
243 dw_i2c_of_configure(pdev);
244
245 if (has_acpi_companion(&pdev->dev))
246 i2c_dw_acpi_configure(&pdev->dev);
247
248 ret = i2c_dw_validate_speed(dev);
249 if (ret)
250 goto exit_reset;
251
252 ret = i2c_dw_probe_lock_support(dev);
253 if (ret)
254 goto exit_reset;
255
256 i2c_dw_configure(dev);
257
258
259 dev->pclk = devm_clk_get_optional(&pdev->dev, "pclk");
260 if (IS_ERR(dev->pclk)) {
261 ret = PTR_ERR(dev->pclk);
262 goto exit_reset;
263 }
264
265 dev->clk = devm_clk_get(&pdev->dev, NULL);
266 if (!i2c_dw_prepare_clk(dev, true)) {
267 u64 clk_khz;
268
269 dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
270 clk_khz = dev->get_clk_rate_khz(dev);
271
272 if (!dev->sda_hold_time && t->sda_hold_ns)
273 dev->sda_hold_time =
274 DIV_S64_ROUND_CLOSEST(clk_khz * t->sda_hold_ns, MICRO);
275 }
276
277 adap = &dev->adapter;
278 adap->owner = THIS_MODULE;
279 adap->class = dmi_check_system(dw_i2c_hwmon_class_dmi) ?
280 I2C_CLASS_HWMON : I2C_CLASS_DEPRECATED;
281 ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
282 adap->dev.of_node = pdev->dev.of_node;
283 adap->nr = -1;
284
285 if (dev->flags & ACCESS_NO_IRQ_SUSPEND) {
286 dev_pm_set_driver_flags(&pdev->dev,
287 DPM_FLAG_SMART_PREPARE |
288 DPM_FLAG_MAY_SKIP_RESUME);
289 } else {
290 dev_pm_set_driver_flags(&pdev->dev,
291 DPM_FLAG_SMART_PREPARE |
292 DPM_FLAG_SMART_SUSPEND |
293 DPM_FLAG_MAY_SKIP_RESUME);
294 }
295
296
297 WARN_ON(pm_runtime_enabled(&pdev->dev));
298
299 pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
300 pm_runtime_use_autosuspend(&pdev->dev);
301 pm_runtime_set_active(&pdev->dev);
302
303 if (dev->shared_with_punit)
304 pm_runtime_get_noresume(&pdev->dev);
305
306 pm_runtime_enable(&pdev->dev);
307
308 ret = i2c_dw_probe(dev);
309 if (ret)
310 goto exit_probe;
311
312 return ret;
313
314exit_probe:
315 dw_i2c_plat_pm_cleanup(dev);
316exit_reset:
317 reset_control_assert(dev->rst);
318 return ret;
319}
320
321static int dw_i2c_plat_remove(struct platform_device *pdev)
322{
323 struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
324
325 pm_runtime_get_sync(&pdev->dev);
326
327 i2c_del_adapter(&dev->adapter);
328
329 dev->disable(dev);
330
331 pm_runtime_dont_use_autosuspend(&pdev->dev);
332 pm_runtime_put_sync(&pdev->dev);
333 dw_i2c_plat_pm_cleanup(dev);
334
335 reset_control_assert(dev->rst);
336
337 return 0;
338}
339
340#ifdef CONFIG_PM_SLEEP
341static int dw_i2c_plat_prepare(struct device *dev)
342{
343
344
345
346
347
348
349 return !has_acpi_companion(dev);
350}
351
352static void dw_i2c_plat_complete(struct device *dev)
353{
354
355
356
357
358
359
360 if (pm_runtime_suspended(dev) && pm_resume_via_firmware())
361 pm_request_resume(dev);
362}
363#else
364#define dw_i2c_plat_prepare NULL
365#define dw_i2c_plat_complete NULL
366#endif
367
368#ifdef CONFIG_PM
369static int dw_i2c_plat_suspend(struct device *dev)
370{
371 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
372
373 i_dev->suspended = true;
374
375 if (i_dev->shared_with_punit)
376 return 0;
377
378 i_dev->disable(i_dev);
379 i2c_dw_prepare_clk(i_dev, false);
380
381 return 0;
382}
383
384static int dw_i2c_plat_resume(struct device *dev)
385{
386 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
387
388 if (!i_dev->shared_with_punit)
389 i2c_dw_prepare_clk(i_dev, true);
390
391 i_dev->init(i_dev);
392 i_dev->suspended = false;
393
394 return 0;
395}
396
397static const struct dev_pm_ops dw_i2c_dev_pm_ops = {
398 .prepare = dw_i2c_plat_prepare,
399 .complete = dw_i2c_plat_complete,
400 SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume)
401 SET_RUNTIME_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume, NULL)
402};
403
404#define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops)
405#else
406#define DW_I2C_DEV_PMOPS NULL
407#endif
408
409
410MODULE_ALIAS("platform:i2c_designware");
411
412static struct platform_driver dw_i2c_driver = {
413 .probe = dw_i2c_plat_probe,
414 .remove = dw_i2c_plat_remove,
415 .driver = {
416 .name = "i2c_designware",
417 .of_match_table = of_match_ptr(dw_i2c_of_match),
418 .acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
419 .pm = DW_I2C_DEV_PMOPS,
420 },
421};
422
423static int __init dw_i2c_init_driver(void)
424{
425 return platform_driver_register(&dw_i2c_driver);
426}
427subsys_initcall(dw_i2c_init_driver);
428
429static void __exit dw_i2c_exit_driver(void)
430{
431 platform_driver_unregister(&dw_i2c_driver);
432}
433module_exit(dw_i2c_exit_driver);
434
435MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
436MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
437MODULE_LICENSE("GPL");
438
