linux/drivers/iio/accel/sca3000.c
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   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * sca3000_core.c -- support VTI sca3000 series accelerometers via SPI
   4 *
   5 * Copyright (c) 2009 Jonathan Cameron <jic23@kernel.org>
   6 *
   7 * See industrialio/accels/sca3000.h for comments.
   8 */
   9
  10#include <linux/interrupt.h>
  11#include <linux/fs.h>
  12#include <linux/device.h>
  13#include <linux/slab.h>
  14#include <linux/kernel.h>
  15#include <linux/spi/spi.h>
  16#include <linux/sysfs.h>
  17#include <linux/module.h>
  18#include <linux/uaccess.h>
  19#include <linux/iio/iio.h>
  20#include <linux/iio/sysfs.h>
  21#include <linux/iio/events.h>
  22#include <linux/iio/buffer.h>
  23#include <linux/iio/kfifo_buf.h>
  24
  25#define SCA3000_WRITE_REG(a) (((a) << 2) | 0x02)
  26#define SCA3000_READ_REG(a) ((a) << 2)
  27
  28#define SCA3000_REG_REVID_ADDR                          0x00
  29#define   SCA3000_REG_REVID_MAJOR_MASK                  GENMASK(8, 4)
  30#define   SCA3000_REG_REVID_MINOR_MASK                  GENMASK(3, 0)
  31
  32#define SCA3000_REG_STATUS_ADDR                         0x02
  33#define   SCA3000_LOCKED                                BIT(5)
  34#define   SCA3000_EEPROM_CS_ERROR                       BIT(1)
  35#define   SCA3000_SPI_FRAME_ERROR                       BIT(0)
  36
  37/* All reads done using register decrement so no need to directly access LSBs */
  38#define SCA3000_REG_X_MSB_ADDR                          0x05
  39#define SCA3000_REG_Y_MSB_ADDR                          0x07
  40#define SCA3000_REG_Z_MSB_ADDR                          0x09
  41
  42#define SCA3000_REG_RING_OUT_ADDR                       0x0f
  43
  44/* Temp read untested - the e05 doesn't have the sensor */
  45#define SCA3000_REG_TEMP_MSB_ADDR                       0x13
  46
  47#define SCA3000_REG_MODE_ADDR                           0x14
  48#define SCA3000_MODE_PROT_MASK                          0x28
  49#define   SCA3000_REG_MODE_RING_BUF_ENABLE              BIT(7)
  50#define   SCA3000_REG_MODE_RING_BUF_8BIT                BIT(6)
  51
  52/*
  53 * Free fall detection triggers an interrupt if the acceleration
  54 * is below a threshold for equivalent of 25cm drop
  55 */
  56#define   SCA3000_REG_MODE_FREE_FALL_DETECT             BIT(4)
  57#define   SCA3000_REG_MODE_MEAS_MODE_NORMAL             0x00
  58#define   SCA3000_REG_MODE_MEAS_MODE_OP_1               0x01
  59#define   SCA3000_REG_MODE_MEAS_MODE_OP_2               0x02
  60
  61/*
  62 * In motion detection mode the accelerations are band pass filtered
  63 * (approx 1 - 25Hz) and then a programmable threshold used to trigger
  64 * and interrupt.
  65 */
  66#define   SCA3000_REG_MODE_MEAS_MODE_MOT_DET            0x03
  67#define   SCA3000_REG_MODE_MODE_MASK                    0x03
  68
  69#define SCA3000_REG_BUF_COUNT_ADDR                      0x15
  70
  71#define SCA3000_REG_INT_STATUS_ADDR                     0x16
  72#define   SCA3000_REG_INT_STATUS_THREE_QUARTERS         BIT(7)
  73#define   SCA3000_REG_INT_STATUS_HALF                   BIT(6)
  74
  75#define SCA3000_INT_STATUS_FREE_FALL                    BIT(3)
  76#define SCA3000_INT_STATUS_Y_TRIGGER                    BIT(2)
  77#define SCA3000_INT_STATUS_X_TRIGGER                    BIT(1)
  78#define SCA3000_INT_STATUS_Z_TRIGGER                    BIT(0)
  79
  80/* Used to allow access to multiplexed registers */
  81#define SCA3000_REG_CTRL_SEL_ADDR                       0x18
  82/* Only available for SCA3000-D03 and SCA3000-D01 */
  83#define   SCA3000_REG_CTRL_SEL_I2C_DISABLE              0x01
  84#define   SCA3000_REG_CTRL_SEL_MD_CTRL                  0x02
  85#define   SCA3000_REG_CTRL_SEL_MD_Y_TH                  0x03
  86#define   SCA3000_REG_CTRL_SEL_MD_X_TH                  0x04
  87#define   SCA3000_REG_CTRL_SEL_MD_Z_TH                  0x05
  88/*
  89 * BE VERY CAREFUL WITH THIS, IF 3 BITS ARE NOT SET the device
  90 * will not function
  91 */
  92#define   SCA3000_REG_CTRL_SEL_OUT_CTRL                 0x0B
  93
  94#define     SCA3000_REG_OUT_CTRL_PROT_MASK              0xE0
  95#define     SCA3000_REG_OUT_CTRL_BUF_X_EN               0x10
  96#define     SCA3000_REG_OUT_CTRL_BUF_Y_EN               0x08
  97#define     SCA3000_REG_OUT_CTRL_BUF_Z_EN               0x04
  98#define     SCA3000_REG_OUT_CTRL_BUF_DIV_MASK           0x03
  99#define     SCA3000_REG_OUT_CTRL_BUF_DIV_4              0x02
 100#define     SCA3000_REG_OUT_CTRL_BUF_DIV_2              0x01
 101
 102
 103/*
 104 * Control which motion detector interrupts are on.
 105 * For now only OR combinations are supported.
 106 */
 107#define SCA3000_MD_CTRL_PROT_MASK                       0xC0
 108#define SCA3000_MD_CTRL_OR_Y                            BIT(0)
 109#define SCA3000_MD_CTRL_OR_X                            BIT(1)
 110#define SCA3000_MD_CTRL_OR_Z                            BIT(2)
 111/* Currently unsupported */
 112#define SCA3000_MD_CTRL_AND_Y                           BIT(3)
 113#define SCA3000_MD_CTRL_AND_X                           BIT(4)
 114#define SCA3000_MD_CTRL_AND_Z                           BIT(5)
 115
 116/*
 117 * Some control registers of complex access methods requiring this register to
 118 * be used to remove a lock.
 119 */
 120#define SCA3000_REG_UNLOCK_ADDR                         0x1e
 121
 122#define SCA3000_REG_INT_MASK_ADDR                       0x21
 123#define   SCA3000_REG_INT_MASK_PROT_MASK                0x1C
 124
 125#define   SCA3000_REG_INT_MASK_RING_THREE_QUARTER       BIT(7)
 126#define   SCA3000_REG_INT_MASK_RING_HALF                BIT(6)
 127
 128#define SCA3000_REG_INT_MASK_ALL_INTS                   0x02
 129#define SCA3000_REG_INT_MASK_ACTIVE_HIGH                0x01
 130#define SCA3000_REG_INT_MASK_ACTIVE_LOW                 0x00
 131/* Values of multiplexed registers (write to ctrl_data after select) */
 132#define SCA3000_REG_CTRL_DATA_ADDR                      0x22
 133
 134/*
 135 * Measurement modes available on some sca3000 series chips. Code assumes others
 136 * may become available in the future.
 137 *
 138 * Bypass - Bypass the low-pass filter in the signal channel so as to increase
 139 *          signal bandwidth.
 140 *
 141 * Narrow - Narrow low-pass filtering of the signal channel and half output
 142 *          data rate by decimation.
 143 *
 144 * Wide - Widen low-pass filtering of signal channel to increase bandwidth
 145 */
 146#define SCA3000_OP_MODE_BYPASS                          0x01
 147#define SCA3000_OP_MODE_NARROW                          0x02
 148#define SCA3000_OP_MODE_WIDE                            0x04
 149#define SCA3000_MAX_TX 6
 150#define SCA3000_MAX_RX 2
 151
 152/**
 153 * struct sca3000_state - device instance state information
 154 * @us:                 the associated spi device
 155 * @info:                       chip variant information
 156 * @last_timestamp:             the timestamp of the last event
 157 * @mo_det_use_count:           reference counter for the motion detection unit
 158 * @lock:                       lock used to protect elements of sca3000_state
 159 *                              and the underlying device state.
 160 * @tx:                 dma-able transmit buffer
 161 * @rx:                 dma-able receive buffer
 162 **/
 163struct sca3000_state {
 164        struct spi_device               *us;
 165        const struct sca3000_chip_info  *info;
 166        s64                             last_timestamp;
 167        int                             mo_det_use_count;
 168        struct mutex                    lock;
 169        /* Can these share a cacheline ? */
 170        u8                              rx[384] ____cacheline_aligned;
 171        u8                              tx[6] ____cacheline_aligned;
 172};
 173
 174/**
 175 * struct sca3000_chip_info - model dependent parameters
 176 * @scale:                      scale * 10^-6
 177 * @temp_output:                some devices have temperature sensors.
 178 * @measurement_mode_freq:      normal mode sampling frequency
 179 * @measurement_mode_3db_freq:  3db cutoff frequency of the low pass filter for
 180 * the normal measurement mode.
 181 * @option_mode_1:              first optional mode. Not all models have one
 182 * @option_mode_1_freq:         option mode 1 sampling frequency
 183 * @option_mode_1_3db_freq:     3db cutoff frequency of the low pass filter for
 184 * the first option mode.
 185 * @option_mode_2:              second optional mode. Not all chips have one
 186 * @option_mode_2_freq:         option mode 2 sampling frequency
 187 * @option_mode_2_3db_freq:     3db cutoff frequency of the low pass filter for
 188 * the second option mode.
 189 * @mot_det_mult_xz:            Bit wise multipliers to calculate the threshold
 190 * for motion detection in the x and z axis.
 191 * @mot_det_mult_y:             Bit wise multipliers to calculate the threshold
 192 * for motion detection in the y axis.
 193 *
 194 * This structure is used to hold information about the functionality of a given
 195 * sca3000 variant.
 196 **/
 197struct sca3000_chip_info {
 198        unsigned int            scale;
 199        bool                    temp_output;
 200        int                     measurement_mode_freq;
 201        int                     measurement_mode_3db_freq;
 202        int                     option_mode_1;
 203        int                     option_mode_1_freq;
 204        int                     option_mode_1_3db_freq;
 205        int                     option_mode_2;
 206        int                     option_mode_2_freq;
 207        int                     option_mode_2_3db_freq;
 208        int                     mot_det_mult_xz[6];
 209        int                     mot_det_mult_y[7];
 210};
 211
 212enum sca3000_variant {
 213        d01,
 214        e02,
 215        e04,
 216        e05,
 217};
 218
 219/*
 220 * Note where option modes are not defined, the chip simply does not
 221 * support any.
 222 * Other chips in the sca3000 series use i2c and are not included here.
 223 *
 224 * Some of these devices are only listed in the family data sheet and
 225 * do not actually appear to be available.
 226 */
 227static const struct sca3000_chip_info sca3000_spi_chip_info_tbl[] = {
 228        [d01] = {
 229                .scale = 7357,
 230                .temp_output = true,
 231                .measurement_mode_freq = 250,
 232                .measurement_mode_3db_freq = 45,
 233                .option_mode_1 = SCA3000_OP_MODE_BYPASS,
 234                .option_mode_1_freq = 250,
 235                .option_mode_1_3db_freq = 70,
 236                .mot_det_mult_xz = {50, 100, 200, 350, 650, 1300},
 237                .mot_det_mult_y = {50, 100, 150, 250, 450, 850, 1750},
 238        },
 239        [e02] = {
 240                .scale = 9810,
 241                .measurement_mode_freq = 125,
 242                .measurement_mode_3db_freq = 40,
 243                .option_mode_1 = SCA3000_OP_MODE_NARROW,
 244                .option_mode_1_freq = 63,
 245                .option_mode_1_3db_freq = 11,
 246                .mot_det_mult_xz = {100, 150, 300, 550, 1050, 2050},
 247                .mot_det_mult_y = {50, 100, 200, 350, 700, 1350, 2700},
 248        },
 249        [e04] = {
 250                .scale = 19620,
 251                .measurement_mode_freq = 100,
 252                .measurement_mode_3db_freq = 38,
 253                .option_mode_1 = SCA3000_OP_MODE_NARROW,
 254                .option_mode_1_freq = 50,
 255                .option_mode_1_3db_freq = 9,
 256                .option_mode_2 = SCA3000_OP_MODE_WIDE,
 257                .option_mode_2_freq = 400,
 258                .option_mode_2_3db_freq = 70,
 259                .mot_det_mult_xz = {200, 300, 600, 1100, 2100, 4100},
 260                .mot_det_mult_y = {100, 200, 400, 7000, 1400, 2700, 54000},
 261        },
 262        [e05] = {
 263                .scale = 61313,
 264                .measurement_mode_freq = 200,
 265                .measurement_mode_3db_freq = 60,
 266                .option_mode_1 = SCA3000_OP_MODE_NARROW,
 267                .option_mode_1_freq = 50,
 268                .option_mode_1_3db_freq = 9,
 269                .option_mode_2 = SCA3000_OP_MODE_WIDE,
 270                .option_mode_2_freq = 400,
 271                .option_mode_2_3db_freq = 75,
 272                .mot_det_mult_xz = {600, 900, 1700, 3200, 6100, 11900},
 273                .mot_det_mult_y = {300, 600, 1200, 2000, 4100, 7800, 15600},
 274        },
 275};
 276
 277static int sca3000_write_reg(struct sca3000_state *st, u8 address, u8 val)
 278{
 279        st->tx[0] = SCA3000_WRITE_REG(address);
 280        st->tx[1] = val;
 281        return spi_write(st->us, st->tx, 2);
 282}
 283
 284static int sca3000_read_data_short(struct sca3000_state *st,
 285                                   u8 reg_address_high,
 286                                   int len)
 287{
 288        struct spi_transfer xfer[2] = {
 289                {
 290                        .len = 1,
 291                        .tx_buf = st->tx,
 292                }, {
 293                        .len = len,
 294                        .rx_buf = st->rx,
 295                }
 296        };
 297        st->tx[0] = SCA3000_READ_REG(reg_address_high);
 298
 299        return spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer));
 300}
 301
 302/**
 303 * sca3000_reg_lock_on() - test if the ctrl register lock is on
 304 * @st: Driver specific device instance data.
 305 *
 306 * Lock must be held.
 307 **/
 308static int sca3000_reg_lock_on(struct sca3000_state *st)
 309{
 310        int ret;
 311
 312        ret = sca3000_read_data_short(st, SCA3000_REG_STATUS_ADDR, 1);
 313        if (ret < 0)
 314                return ret;
 315
 316        return !(st->rx[0] & SCA3000_LOCKED);
 317}
 318
 319/**
 320 * __sca3000_unlock_reg_lock() - unlock the control registers
 321 * @st: Driver specific device instance data.
 322 *
 323 * Note the device does not appear to support doing this in a single transfer.
 324 * This should only ever be used as part of ctrl reg read.
 325 * Lock must be held before calling this
 326 */
 327static int __sca3000_unlock_reg_lock(struct sca3000_state *st)
 328{
 329        struct spi_transfer xfer[3] = {
 330                {
 331                        .len = 2,
 332                        .cs_change = 1,
 333                        .tx_buf = st->tx,
 334                }, {
 335                        .len = 2,
 336                        .cs_change = 1,
 337                        .tx_buf = st->tx + 2,
 338                }, {
 339                        .len = 2,
 340                        .tx_buf = st->tx + 4,
 341                },
 342        };
 343        st->tx[0] = SCA3000_WRITE_REG(SCA3000_REG_UNLOCK_ADDR);
 344        st->tx[1] = 0x00;
 345        st->tx[2] = SCA3000_WRITE_REG(SCA3000_REG_UNLOCK_ADDR);
 346        st->tx[3] = 0x50;
 347        st->tx[4] = SCA3000_WRITE_REG(SCA3000_REG_UNLOCK_ADDR);
 348        st->tx[5] = 0xA0;
 349
 350        return spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer));
 351}
 352
 353/**
 354 * sca3000_write_ctrl_reg() - write to a lock protect ctrl register
 355 * @st: Driver specific device instance data.
 356 * @sel: selects which registers we wish to write to
 357 * @val: the value to be written
 358 *
 359 * Certain control registers are protected against overwriting by the lock
 360 * register and use a shared write address. This function allows writing of
 361 * these registers.
 362 * Lock must be held.
 363 */
 364static int sca3000_write_ctrl_reg(struct sca3000_state *st,
 365                                  u8 sel,
 366                                  uint8_t val)
 367{
 368        int ret;
 369
 370        ret = sca3000_reg_lock_on(st);
 371        if (ret < 0)
 372                goto error_ret;
 373        if (ret) {
 374                ret = __sca3000_unlock_reg_lock(st);
 375                if (ret)
 376                        goto error_ret;
 377        }
 378
 379        /* Set the control select register */
 380        ret = sca3000_write_reg(st, SCA3000_REG_CTRL_SEL_ADDR, sel);
 381        if (ret)
 382                goto error_ret;
 383
 384        /* Write the actual value into the register */
 385        ret = sca3000_write_reg(st, SCA3000_REG_CTRL_DATA_ADDR, val);
 386
 387error_ret:
 388        return ret;
 389}
 390
 391/**
 392 * sca3000_read_ctrl_reg() - read from lock protected control register.
 393 * @st: Driver specific device instance data.
 394 * @ctrl_reg: Which ctrl register do we want to read.
 395 *
 396 * Lock must be held.
 397 */
 398static int sca3000_read_ctrl_reg(struct sca3000_state *st,
 399                                 u8 ctrl_reg)
 400{
 401        int ret;
 402
 403        ret = sca3000_reg_lock_on(st);
 404        if (ret < 0)
 405                goto error_ret;
 406        if (ret) {
 407                ret = __sca3000_unlock_reg_lock(st);
 408                if (ret)
 409                        goto error_ret;
 410        }
 411        /* Set the control select register */
 412        ret = sca3000_write_reg(st, SCA3000_REG_CTRL_SEL_ADDR, ctrl_reg);
 413        if (ret)
 414                goto error_ret;
 415        ret = sca3000_read_data_short(st, SCA3000_REG_CTRL_DATA_ADDR, 1);
 416        if (ret)
 417                goto error_ret;
 418        return st->rx[0];
 419error_ret:
 420        return ret;
 421}
 422
 423/**
 424 * sca3000_print_rev() - sysfs interface to read the chip revision number
 425 * @indio_dev: Device instance specific generic IIO data.
 426 * Driver specific device instance data can be obtained via
 427 * via iio_priv(indio_dev)
 428 */
 429static int sca3000_print_rev(struct iio_dev *indio_dev)
 430{
 431        int ret;
 432        struct sca3000_state *st = iio_priv(indio_dev);
 433
 434        mutex_lock(&st->lock);
 435        ret = sca3000_read_data_short(st, SCA3000_REG_REVID_ADDR, 1);
 436        if (ret < 0)
 437                goto error_ret;
 438        dev_info(&indio_dev->dev,
 439                 "sca3000 revision major=%lu, minor=%lu\n",
 440                 st->rx[0] & SCA3000_REG_REVID_MAJOR_MASK,
 441                 st->rx[0] & SCA3000_REG_REVID_MINOR_MASK);
 442error_ret:
 443        mutex_unlock(&st->lock);
 444
 445        return ret;
 446}
 447
 448static ssize_t
 449sca3000_show_available_3db_freqs(struct device *dev,
 450                                 struct device_attribute *attr,
 451                                 char *buf)
 452{
 453        struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 454        struct sca3000_state *st = iio_priv(indio_dev);
 455        int len;
 456
 457        len = sprintf(buf, "%d", st->info->measurement_mode_3db_freq);
 458        if (st->info->option_mode_1)
 459                len += sprintf(buf + len, " %d",
 460                               st->info->option_mode_1_3db_freq);
 461        if (st->info->option_mode_2)
 462                len += sprintf(buf + len, " %d",
 463                               st->info->option_mode_2_3db_freq);
 464        len += sprintf(buf + len, "\n");
 465
 466        return len;
 467}
 468
 469static IIO_DEVICE_ATTR(in_accel_filter_low_pass_3db_frequency_available,
 470                       S_IRUGO, sca3000_show_available_3db_freqs,
 471                       NULL, 0);
 472
 473static const struct iio_event_spec sca3000_event = {
 474        .type = IIO_EV_TYPE_MAG,
 475        .dir = IIO_EV_DIR_RISING,
 476        .mask_separate = BIT(IIO_EV_INFO_VALUE) | BIT(IIO_EV_INFO_ENABLE),
 477};
 478
 479/*
 480 * Note the hack in the number of bits to pretend we have 2 more than
 481 * we do in the fifo.
 482 */
 483#define SCA3000_CHAN(index, mod)                                \
 484        {                                                       \
 485                .type = IIO_ACCEL,                              \
 486                .modified = 1,                                  \
 487                .channel2 = mod,                                \
 488                .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),   \
 489                .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |\
 490                        BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY),\
 491                .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),\
 492                .address = index,                               \
 493                .scan_index = index,                            \
 494                .scan_type = {                                  \
 495                        .sign = 's',                            \
 496                        .realbits = 13,                         \
 497                        .storagebits = 16,                      \
 498                        .shift = 3,                             \
 499                        .endianness = IIO_BE,                   \
 500                },                                              \
 501                .event_spec = &sca3000_event,                   \
 502                .num_event_specs = 1,                           \
 503        }
 504
 505static const struct iio_event_spec sca3000_freefall_event_spec = {
 506        .type = IIO_EV_TYPE_MAG,
 507        .dir = IIO_EV_DIR_FALLING,
 508        .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
 509                BIT(IIO_EV_INFO_PERIOD),
 510};
 511
 512static const struct iio_chan_spec sca3000_channels[] = {
 513        SCA3000_CHAN(0, IIO_MOD_X),
 514        SCA3000_CHAN(1, IIO_MOD_Y),
 515        SCA3000_CHAN(2, IIO_MOD_Z),
 516        {
 517                .type = IIO_ACCEL,
 518                .modified = 1,
 519                .channel2 = IIO_MOD_X_AND_Y_AND_Z,
 520                .scan_index = -1, /* Fake channel */
 521                .event_spec = &sca3000_freefall_event_spec,
 522                .num_event_specs = 1,
 523        },
 524};
 525
 526static const struct iio_chan_spec sca3000_channels_with_temp[] = {
 527        SCA3000_CHAN(0, IIO_MOD_X),
 528        SCA3000_CHAN(1, IIO_MOD_Y),
 529        SCA3000_CHAN(2, IIO_MOD_Z),
 530        {
 531                .type = IIO_TEMP,
 532                .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
 533                .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |
 534                        BIT(IIO_CHAN_INFO_OFFSET),
 535                /* No buffer support */
 536                .scan_index = -1,
 537        },
 538        {
 539                .type = IIO_ACCEL,
 540                .modified = 1,
 541                .channel2 = IIO_MOD_X_AND_Y_AND_Z,
 542                .scan_index = -1, /* Fake channel */
 543                .event_spec = &sca3000_freefall_event_spec,
 544                .num_event_specs = 1,
 545        },
 546};
 547
 548static u8 sca3000_addresses[3][3] = {
 549        [0] = {SCA3000_REG_X_MSB_ADDR, SCA3000_REG_CTRL_SEL_MD_X_TH,
 550               SCA3000_MD_CTRL_OR_X},
 551        [1] = {SCA3000_REG_Y_MSB_ADDR, SCA3000_REG_CTRL_SEL_MD_Y_TH,
 552               SCA3000_MD_CTRL_OR_Y},
 553        [2] = {SCA3000_REG_Z_MSB_ADDR, SCA3000_REG_CTRL_SEL_MD_Z_TH,
 554               SCA3000_MD_CTRL_OR_Z},
 555};
 556
 557/**
 558 * __sca3000_get_base_freq() - obtain mode specific base frequency
 559 * @st: Private driver specific device instance specific state.
 560 * @info: chip type specific information.
 561 * @base_freq: Base frequency for the current measurement mode.
 562 *
 563 * lock must be held
 564 */
 565static inline int __sca3000_get_base_freq(struct sca3000_state *st,
 566                                          const struct sca3000_chip_info *info,
 567                                          int *base_freq)
 568{
 569        int ret;
 570
 571        ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
 572        if (ret)
 573                goto error_ret;
 574        switch (SCA3000_REG_MODE_MODE_MASK & st->rx[0]) {
 575        case SCA3000_REG_MODE_MEAS_MODE_NORMAL:
 576                *base_freq = info->measurement_mode_freq;
 577                break;
 578        case SCA3000_REG_MODE_MEAS_MODE_OP_1:
 579                *base_freq = info->option_mode_1_freq;
 580                break;
 581        case SCA3000_REG_MODE_MEAS_MODE_OP_2:
 582                *base_freq = info->option_mode_2_freq;
 583                break;
 584        default:
 585                ret = -EINVAL;
 586        }
 587error_ret:
 588        return ret;
 589}
 590
 591/**
 592 * sca3000_read_raw_samp_freq() - read_raw handler for IIO_CHAN_INFO_SAMP_FREQ
 593 * @st: Private driver specific device instance specific state.
 594 * @val: The frequency read back.
 595 *
 596 * lock must be held
 597 **/
 598static int sca3000_read_raw_samp_freq(struct sca3000_state *st, int *val)
 599{
 600        int ret;
 601
 602        ret = __sca3000_get_base_freq(st, st->info, val);
 603        if (ret)
 604                return ret;
 605
 606        ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL);
 607        if (ret < 0)
 608                return ret;
 609
 610        if (*val > 0) {
 611                ret &= SCA3000_REG_OUT_CTRL_BUF_DIV_MASK;
 612                switch (ret) {
 613                case SCA3000_REG_OUT_CTRL_BUF_DIV_2:
 614                        *val /= 2;
 615                        break;
 616                case SCA3000_REG_OUT_CTRL_BUF_DIV_4:
 617                        *val /= 4;
 618                        break;
 619                }
 620        }
 621
 622        return 0;
 623}
 624
 625/**
 626 * sca3000_write_raw_samp_freq() - write_raw handler for IIO_CHAN_INFO_SAMP_FREQ
 627 * @st: Private driver specific device instance specific state.
 628 * @val: The frequency desired.
 629 *
 630 * lock must be held
 631 */
 632static int sca3000_write_raw_samp_freq(struct sca3000_state *st, int val)
 633{
 634        int ret, base_freq, ctrlval;
 635
 636        ret = __sca3000_get_base_freq(st, st->info, &base_freq);
 637        if (ret)
 638                return ret;
 639
 640        ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL);
 641        if (ret < 0)
 642                return ret;
 643
 644        ctrlval = ret & ~SCA3000_REG_OUT_CTRL_BUF_DIV_MASK;
 645
 646        if (val == base_freq / 2)
 647                ctrlval |= SCA3000_REG_OUT_CTRL_BUF_DIV_2;
 648        if (val == base_freq / 4)
 649                ctrlval |= SCA3000_REG_OUT_CTRL_BUF_DIV_4;
 650        else if (val != base_freq)
 651                return -EINVAL;
 652
 653        return sca3000_write_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL,
 654                                     ctrlval);
 655}
 656
 657static int sca3000_read_3db_freq(struct sca3000_state *st, int *val)
 658{
 659        int ret;
 660
 661        ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
 662        if (ret)
 663                return ret;
 664
 665        /* mask bottom 2 bits - only ones that are relevant */
 666        st->rx[0] &= SCA3000_REG_MODE_MODE_MASK;
 667        switch (st->rx[0]) {
 668        case SCA3000_REG_MODE_MEAS_MODE_NORMAL:
 669                *val = st->info->measurement_mode_3db_freq;
 670                return IIO_VAL_INT;
 671        case SCA3000_REG_MODE_MEAS_MODE_MOT_DET:
 672                return -EBUSY;
 673        case SCA3000_REG_MODE_MEAS_MODE_OP_1:
 674                *val = st->info->option_mode_1_3db_freq;
 675                return IIO_VAL_INT;
 676        case SCA3000_REG_MODE_MEAS_MODE_OP_2:
 677                *val = st->info->option_mode_2_3db_freq;
 678                return IIO_VAL_INT;
 679        default:
 680                return -EINVAL;
 681        }
 682}
 683
 684static int sca3000_write_3db_freq(struct sca3000_state *st, int val)
 685{
 686        int ret;
 687        int mode;
 688
 689        if (val == st->info->measurement_mode_3db_freq)
 690                mode = SCA3000_REG_MODE_MEAS_MODE_NORMAL;
 691        else if (st->info->option_mode_1 &&
 692                 (val == st->info->option_mode_1_3db_freq))
 693                mode = SCA3000_REG_MODE_MEAS_MODE_OP_1;
 694        else if (st->info->option_mode_2 &&
 695                 (val == st->info->option_mode_2_3db_freq))
 696                mode = SCA3000_REG_MODE_MEAS_MODE_OP_2;
 697        else
 698                return -EINVAL;
 699        ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
 700        if (ret)
 701                return ret;
 702
 703        st->rx[0] &= ~SCA3000_REG_MODE_MODE_MASK;
 704        st->rx[0] |= (mode & SCA3000_REG_MODE_MODE_MASK);
 705
 706        return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR, st->rx[0]);
 707}
 708
 709static int sca3000_read_raw(struct iio_dev *indio_dev,
 710                            struct iio_chan_spec const *chan,
 711                            int *val,
 712                            int *val2,
 713                            long mask)
 714{
 715        struct sca3000_state *st = iio_priv(indio_dev);
 716        int ret;
 717        u8 address;
 718
 719        switch (mask) {
 720        case IIO_CHAN_INFO_RAW:
 721                mutex_lock(&st->lock);
 722                if (chan->type == IIO_ACCEL) {
 723                        if (st->mo_det_use_count) {
 724                                mutex_unlock(&st->lock);
 725                                return -EBUSY;
 726                        }
 727                        address = sca3000_addresses[chan->address][0];
 728                        ret = sca3000_read_data_short(st, address, 2);
 729                        if (ret < 0) {
 730                                mutex_unlock(&st->lock);
 731                                return ret;
 732                        }
 733                        *val = (be16_to_cpup((__be16 *)st->rx) >> 3) & 0x1FFF;
 734                        *val = ((*val) << (sizeof(*val) * 8 - 13)) >>
 735                                (sizeof(*val) * 8 - 13);
 736                } else {
 737                        /* get the temperature when available */
 738                        ret = sca3000_read_data_short(st,
 739                                                      SCA3000_REG_TEMP_MSB_ADDR,
 740                                                      2);
 741                        if (ret < 0) {
 742                                mutex_unlock(&st->lock);
 743                                return ret;
 744                        }
 745                        *val = ((st->rx[0] & 0x3F) << 3) |
 746                               ((st->rx[1] & 0xE0) >> 5);
 747                }
 748                mutex_unlock(&st->lock);
 749                return IIO_VAL_INT;
 750        case IIO_CHAN_INFO_SCALE:
 751                *val = 0;
 752                if (chan->type == IIO_ACCEL)
 753                        *val2 = st->info->scale;
 754                else /* temperature */
 755                        *val2 = 555556;
 756                return IIO_VAL_INT_PLUS_MICRO;
 757        case IIO_CHAN_INFO_OFFSET:
 758                *val = -214;
 759                *val2 = 600000;
 760                return IIO_VAL_INT_PLUS_MICRO;
 761        case IIO_CHAN_INFO_SAMP_FREQ:
 762                mutex_lock(&st->lock);
 763                ret = sca3000_read_raw_samp_freq(st, val);
 764                mutex_unlock(&st->lock);
 765                return ret ? ret : IIO_VAL_INT;
 766        case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
 767                mutex_lock(&st->lock);
 768                ret = sca3000_read_3db_freq(st, val);
 769                mutex_unlock(&st->lock);
 770                return ret;
 771        default:
 772                return -EINVAL;
 773        }
 774}
 775
 776static int sca3000_write_raw(struct iio_dev *indio_dev,
 777                             struct iio_chan_spec const *chan,
 778                             int val, int val2, long mask)
 779{
 780        struct sca3000_state *st = iio_priv(indio_dev);
 781        int ret;
 782
 783        switch (mask) {
 784        case IIO_CHAN_INFO_SAMP_FREQ:
 785                if (val2)
 786                        return -EINVAL;
 787                mutex_lock(&st->lock);
 788                ret = sca3000_write_raw_samp_freq(st, val);
 789                mutex_unlock(&st->lock);
 790                return ret;
 791        case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
 792                if (val2)
 793                        return -EINVAL;
 794                mutex_lock(&st->lock);
 795                ret = sca3000_write_3db_freq(st, val);
 796                mutex_unlock(&st->lock);
 797                return ret;
 798        default:
 799                return -EINVAL;
 800        }
 801
 802        return ret;
 803}
 804
 805/**
 806 * sca3000_read_av_freq() - sysfs function to get available frequencies
 807 * @dev: Device structure for this device.
 808 * @attr: Description of the attribute.
 809 * @buf: Incoming string
 810 *
 811 * The later modes are only relevant to the ring buffer - and depend on current
 812 * mode. Note that data sheet gives rather wide tolerances for these so integer
 813 * division will give good enough answer and not all chips have them specified
 814 * at all.
 815 **/
 816static ssize_t sca3000_read_av_freq(struct device *dev,
 817                                    struct device_attribute *attr,
 818                                    char *buf)
 819{
 820        struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 821        struct sca3000_state *st = iio_priv(indio_dev);
 822        int len = 0, ret, val;
 823
 824        mutex_lock(&st->lock);
 825        ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
 826        val = st->rx[0];
 827        mutex_unlock(&st->lock);
 828        if (ret)
 829                goto error_ret;
 830
 831        switch (val & SCA3000_REG_MODE_MODE_MASK) {
 832        case SCA3000_REG_MODE_MEAS_MODE_NORMAL:
 833                len += sprintf(buf + len, "%d %d %d\n",
 834                               st->info->measurement_mode_freq,
 835                               st->info->measurement_mode_freq / 2,
 836                               st->info->measurement_mode_freq / 4);
 837                break;
 838        case SCA3000_REG_MODE_MEAS_MODE_OP_1:
 839                len += sprintf(buf + len, "%d %d %d\n",
 840                               st->info->option_mode_1_freq,
 841                               st->info->option_mode_1_freq / 2,
 842                               st->info->option_mode_1_freq / 4);
 843                break;
 844        case SCA3000_REG_MODE_MEAS_MODE_OP_2:
 845                len += sprintf(buf + len, "%d %d %d\n",
 846                               st->info->option_mode_2_freq,
 847                               st->info->option_mode_2_freq / 2,
 848                               st->info->option_mode_2_freq / 4);
 849                break;
 850        }
 851        return len;
 852error_ret:
 853        return ret;
 854}
 855
 856/*
 857 * Should only really be registered if ring buffer support is compiled in.
 858 * Does no harm however and doing it right would add a fair bit of complexity
 859 */
 860static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(sca3000_read_av_freq);
 861
 862/*
 863 * sca3000_read_event_value() - query of a threshold or period
 864 */
 865static int sca3000_read_event_value(struct iio_dev *indio_dev,
 866                                    const struct iio_chan_spec *chan,
 867                                    enum iio_event_type type,
 868                                    enum iio_event_direction dir,
 869                                    enum iio_event_info info,
 870                                    int *val, int *val2)
 871{
 872        struct sca3000_state *st = iio_priv(indio_dev);
 873        long ret;
 874        int i;
 875
 876        switch (info) {
 877        case IIO_EV_INFO_VALUE:
 878                mutex_lock(&st->lock);
 879                ret = sca3000_read_ctrl_reg(st,
 880                                            sca3000_addresses[chan->address][1]);
 881                mutex_unlock(&st->lock);
 882                if (ret < 0)
 883                        return ret;
 884                *val = 0;
 885                if (chan->channel2 == IIO_MOD_Y)
 886                        for_each_set_bit(i, &ret,
 887                                         ARRAY_SIZE(st->info->mot_det_mult_y))
 888                                *val += st->info->mot_det_mult_y[i];
 889                else
 890                        for_each_set_bit(i, &ret,
 891                                         ARRAY_SIZE(st->info->mot_det_mult_xz))
 892                                *val += st->info->mot_det_mult_xz[i];
 893
 894                return IIO_VAL_INT;
 895        case IIO_EV_INFO_PERIOD:
 896                *val = 0;
 897                *val2 = 226000;
 898                return IIO_VAL_INT_PLUS_MICRO;
 899        default:
 900                return -EINVAL;
 901        }
 902}
 903
 904/**
 905 * sca3000_write_event_value() - control of threshold and period
 906 * @indio_dev: Device instance specific IIO information.
 907 * @chan: Description of the channel for which the event is being
 908 * configured.
 909 * @type: The type of event being configured, here magnitude rising
 910 * as everything else is read only.
 911 * @dir: Direction of the event (here rising)
 912 * @info: What information about the event are we configuring.
 913 * Here the threshold only.
 914 * @val: Integer part of the value being written..
 915 * @val2: Non integer part of the value being written. Here always 0.
 916 */
 917static int sca3000_write_event_value(struct iio_dev *indio_dev,
 918                                     const struct iio_chan_spec *chan,
 919                                     enum iio_event_type type,
 920                                     enum iio_event_direction dir,
 921                                     enum iio_event_info info,
 922                                     int val, int val2)
 923{
 924        struct sca3000_state *st = iio_priv(indio_dev);
 925        int ret;
 926        int i;
 927        u8 nonlinear = 0;
 928
 929        if (chan->channel2 == IIO_MOD_Y) {
 930                i = ARRAY_SIZE(st->info->mot_det_mult_y);
 931                while (i > 0)
 932                        if (val >= st->info->mot_det_mult_y[--i]) {
 933                                nonlinear |= (1 << i);
 934                                val -= st->info->mot_det_mult_y[i];
 935                        }
 936        } else {
 937                i = ARRAY_SIZE(st->info->mot_det_mult_xz);
 938                while (i > 0)
 939                        if (val >= st->info->mot_det_mult_xz[--i]) {
 940                                nonlinear |= (1 << i);
 941                                val -= st->info->mot_det_mult_xz[i];
 942                        }
 943        }
 944
 945        mutex_lock(&st->lock);
 946        ret = sca3000_write_ctrl_reg(st,
 947                                     sca3000_addresses[chan->address][1],
 948                                     nonlinear);
 949        mutex_unlock(&st->lock);
 950
 951        return ret;
 952}
 953
 954static struct attribute *sca3000_attributes[] = {
 955        &iio_dev_attr_in_accel_filter_low_pass_3db_frequency_available.dev_attr.attr,
 956        &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
 957        NULL,
 958};
 959
 960static const struct attribute_group sca3000_attribute_group = {
 961        .attrs = sca3000_attributes,
 962};
 963
 964static int sca3000_read_data(struct sca3000_state *st,
 965                             u8 reg_address_high,
 966                             u8 *rx,
 967                             int len)
 968{
 969        int ret;
 970        struct spi_transfer xfer[2] = {
 971                {
 972                        .len = 1,
 973                        .tx_buf = st->tx,
 974                }, {
 975                        .len = len,
 976                        .rx_buf = rx,
 977                }
 978        };
 979
 980        st->tx[0] = SCA3000_READ_REG(reg_address_high);
 981        ret = spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer));
 982        if (ret) {
 983                dev_err(&st->us->dev, "problem reading register\n");
 984                return ret;
 985        }
 986
 987        return 0;
 988}
 989
 990/**
 991 * sca3000_ring_int_process() - ring specific interrupt handling.
 992 * @val: Value of the interrupt status register.
 993 * @indio_dev: Device instance specific IIO device structure.
 994 */
 995static void sca3000_ring_int_process(u8 val, struct iio_dev *indio_dev)
 996{
 997        struct sca3000_state *st = iio_priv(indio_dev);
 998        int ret, i, num_available;
 999
1000        mutex_lock(&st->lock);
1001
1002        if (val & SCA3000_REG_INT_STATUS_HALF) {
1003                ret = sca3000_read_data_short(st, SCA3000_REG_BUF_COUNT_ADDR,
1004                                              1);
1005                if (ret)
1006                        goto error_ret;
1007                num_available = st->rx[0];
1008                /*
1009                 * num_available is the total number of samples available
1010                 * i.e. number of time points * number of channels.
1011                 */
1012                ret = sca3000_read_data(st, SCA3000_REG_RING_OUT_ADDR, st->rx,
1013                                        num_available * 2);
1014                if (ret)
1015                        goto error_ret;
1016                for (i = 0; i < num_available / 3; i++) {
1017                        /*
1018                         * Dirty hack to cover for 11 bit in fifo, 13 bit
1019                         * direct reading.
1020                         *
1021                         * In theory the bottom two bits are undefined.
1022                         * In reality they appear to always be 0.
1023                         */
1024                        iio_push_to_buffers(indio_dev, st->rx + i * 3 * 2);
1025                }
1026        }
1027error_ret:
1028        mutex_unlock(&st->lock);
1029}
1030
1031/**
1032 * sca3000_event_handler() - handling ring and non ring events
1033 * @irq: The irq being handled.
1034 * @private: struct iio_device pointer for the device.
1035 *
1036 * Ring related interrupt handler. Depending on event, push to
1037 * the ring buffer event chrdev or the event one.
1038 *
1039 * This function is complicated by the fact that the devices can signify ring
1040 * and non ring events via the same interrupt line and they can only
1041 * be distinguished via a read of the relevant status register.
1042 */
1043static irqreturn_t sca3000_event_handler(int irq, void *private)
1044{
1045        struct iio_dev *indio_dev = private;
1046        struct sca3000_state *st = iio_priv(indio_dev);
1047        int ret, val;
1048        s64 last_timestamp = iio_get_time_ns(indio_dev);
1049
1050        /*
1051         * Could lead if badly timed to an extra read of status reg,
1052         * but ensures no interrupt is missed.
1053         */
1054        mutex_lock(&st->lock);
1055        ret = sca3000_read_data_short(st, SCA3000_REG_INT_STATUS_ADDR, 1);
1056        val = st->rx[0];
1057        mutex_unlock(&st->lock);
1058        if (ret)
1059                goto done;
1060
1061        sca3000_ring_int_process(val, indio_dev);
1062
1063        if (val & SCA3000_INT_STATUS_FREE_FALL)
1064                iio_push_event(indio_dev,
1065                               IIO_MOD_EVENT_CODE(IIO_ACCEL,
1066                                                  0,
1067                                                  IIO_MOD_X_AND_Y_AND_Z,
1068                                                  IIO_EV_TYPE_MAG,
1069                                                  IIO_EV_DIR_FALLING),
1070                               last_timestamp);
1071
1072        if (val & SCA3000_INT_STATUS_Y_TRIGGER)
1073                iio_push_event(indio_dev,
1074                               IIO_MOD_EVENT_CODE(IIO_ACCEL,
1075                                                  0,
1076                                                  IIO_MOD_Y,
1077                                                  IIO_EV_TYPE_MAG,
1078                                                  IIO_EV_DIR_RISING),
1079                               last_timestamp);
1080
1081        if (val & SCA3000_INT_STATUS_X_TRIGGER)
1082                iio_push_event(indio_dev,
1083                               IIO_MOD_EVENT_CODE(IIO_ACCEL,
1084                                                  0,
1085                                                  IIO_MOD_X,
1086                                                  IIO_EV_TYPE_MAG,
1087                                                  IIO_EV_DIR_RISING),
1088                               last_timestamp);
1089
1090        if (val & SCA3000_INT_STATUS_Z_TRIGGER)
1091                iio_push_event(indio_dev,
1092                               IIO_MOD_EVENT_CODE(IIO_ACCEL,
1093                                                  0,
1094                                                  IIO_MOD_Z,
1095                                                  IIO_EV_TYPE_MAG,
1096                                                  IIO_EV_DIR_RISING),
1097                               last_timestamp);
1098
1099done:
1100        return IRQ_HANDLED;
1101}
1102
1103/*
1104 * sca3000_read_event_config() what events are enabled
1105 */
1106static int sca3000_read_event_config(struct iio_dev *indio_dev,
1107                                     const struct iio_chan_spec *chan,
1108                                     enum iio_event_type type,
1109                                     enum iio_event_direction dir)
1110{
1111        struct sca3000_state *st = iio_priv(indio_dev);
1112        int ret;
1113        /* read current value of mode register */
1114        mutex_lock(&st->lock);
1115
1116        ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
1117        if (ret)
1118                goto error_ret;
1119
1120        switch (chan->channel2) {
1121        case IIO_MOD_X_AND_Y_AND_Z:
1122                ret = !!(st->rx[0] & SCA3000_REG_MODE_FREE_FALL_DETECT);
1123                break;
1124        case IIO_MOD_X:
1125        case IIO_MOD_Y:
1126        case IIO_MOD_Z:
1127                /*
1128                 * Motion detection mode cannot run at the same time as
1129                 * acceleration data being read.
1130                 */
1131                if ((st->rx[0] & SCA3000_REG_MODE_MODE_MASK)
1132                    != SCA3000_REG_MODE_MEAS_MODE_MOT_DET) {
1133                        ret = 0;
1134                } else {
1135                        ret = sca3000_read_ctrl_reg(st,
1136                                                SCA3000_REG_CTRL_SEL_MD_CTRL);
1137                        if (ret < 0)
1138                                goto error_ret;
1139                        /* only supporting logical or's for now */
1140                        ret = !!(ret & sca3000_addresses[chan->address][2]);
1141                }
1142                break;
1143        default:
1144                ret = -EINVAL;
1145        }
1146
1147error_ret:
1148        mutex_unlock(&st->lock);
1149
1150        return ret;
1151}
1152
1153static int sca3000_freefall_set_state(struct iio_dev *indio_dev, int state)
1154{
1155        struct sca3000_state *st = iio_priv(indio_dev);
1156        int ret;
1157
1158        /* read current value of mode register */
1159        ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
1160        if (ret)
1161                return ret;
1162
1163        /* if off and should be on */
1164        if (state && !(st->rx[0] & SCA3000_REG_MODE_FREE_FALL_DETECT))
1165                return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR,
1166                                         st->rx[0] | SCA3000_REG_MODE_FREE_FALL_DETECT);
1167        /* if on and should be off */
1168        else if (!state && (st->rx[0] & SCA3000_REG_MODE_FREE_FALL_DETECT))
1169                return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR,
1170                                         st->rx[0] & ~SCA3000_REG_MODE_FREE_FALL_DETECT);
1171        else
1172                return 0;
1173}
1174
1175static int sca3000_motion_detect_set_state(struct iio_dev *indio_dev, int axis,
1176                                           int state)
1177{
1178        struct sca3000_state *st = iio_priv(indio_dev);
1179        int ret, ctrlval;
1180
1181        /*
1182         * First read the motion detector config to find out if
1183         * this axis is on
1184         */
1185        ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL);
1186        if (ret < 0)
1187                return ret;
1188        ctrlval = ret;
1189        /* if off and should be on */
1190        if (state && !(ctrlval & sca3000_addresses[axis][2])) {
1191                ret = sca3000_write_ctrl_reg(st,
1192                                             SCA3000_REG_CTRL_SEL_MD_CTRL,
1193                                             ctrlval |
1194                                             sca3000_addresses[axis][2]);
1195                if (ret)
1196                        return ret;
1197                st->mo_det_use_count++;
1198        } else if (!state && (ctrlval & sca3000_addresses[axis][2])) {
1199                ret = sca3000_write_ctrl_reg(st,
1200                                             SCA3000_REG_CTRL_SEL_MD_CTRL,
1201                                             ctrlval &
1202                                             ~(sca3000_addresses[axis][2]));
1203                if (ret)
1204                        return ret;
1205                st->mo_det_use_count--;
1206        }
1207
1208        /* read current value of mode register */
1209        ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
1210        if (ret)
1211                return ret;
1212        /* if off and should be on */
1213        if ((st->mo_det_use_count) &&
1214            ((st->rx[0] & SCA3000_REG_MODE_MODE_MASK)
1215             != SCA3000_REG_MODE_MEAS_MODE_MOT_DET))
1216                return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR,
1217                        (st->rx[0] & ~SCA3000_REG_MODE_MODE_MASK)
1218                        | SCA3000_REG_MODE_MEAS_MODE_MOT_DET);
1219        /* if on and should be off */
1220        else if (!(st->mo_det_use_count) &&
1221                 ((st->rx[0] & SCA3000_REG_MODE_MODE_MASK)
1222                  == SCA3000_REG_MODE_MEAS_MODE_MOT_DET))
1223                return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR,
1224                        st->rx[0] & SCA3000_REG_MODE_MODE_MASK);
1225        else
1226                return 0;
1227}
1228
1229/**
1230 * sca3000_write_event_config() - simple on off control for motion detector
1231 * @indio_dev: IIO device instance specific structure. Data specific to this
1232 * particular driver may be accessed via iio_priv(indio_dev).
1233 * @chan: Description of the channel whose event we are configuring.
1234 * @type: The type of event.
1235 * @dir: The direction of the event.
1236 * @state: Desired state of event being configured.
1237 *
1238 * This is a per axis control, but enabling any will result in the
1239 * motion detector unit being enabled.
1240 * N.B. enabling motion detector stops normal data acquisition.
1241 * There is a complexity in knowing which mode to return to when
1242 * this mode is disabled.  Currently normal mode is assumed.
1243 **/
1244static int sca3000_write_event_config(struct iio_dev *indio_dev,
1245                                      const struct iio_chan_spec *chan,
1246                                      enum iio_event_type type,
1247                                      enum iio_event_direction dir,
1248                                      int state)
1249{
1250        struct sca3000_state *st = iio_priv(indio_dev);
1251        int ret;
1252
1253        mutex_lock(&st->lock);
1254        switch (chan->channel2) {
1255        case IIO_MOD_X_AND_Y_AND_Z:
1256                ret = sca3000_freefall_set_state(indio_dev, state);
1257                break;
1258
1259        case IIO_MOD_X:
1260        case IIO_MOD_Y:
1261        case IIO_MOD_Z:
1262                ret = sca3000_motion_detect_set_state(indio_dev,
1263                                                      chan->address,
1264                                                      state);
1265                break;
1266        default:
1267                ret = -EINVAL;
1268                break;
1269        }
1270        mutex_unlock(&st->lock);
1271
1272        return ret;
1273}
1274
1275static inline
1276int __sca3000_hw_ring_state_set(struct iio_dev *indio_dev, bool state)
1277{
1278        struct sca3000_state *st = iio_priv(indio_dev);
1279        int ret;
1280
1281        mutex_lock(&st->lock);
1282        ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
1283        if (ret)
1284                goto error_ret;
1285        if (state) {
1286                dev_info(&indio_dev->dev, "supposedly enabling ring buffer\n");
1287                ret = sca3000_write_reg(st,
1288                        SCA3000_REG_MODE_ADDR,
1289                        (st->rx[0] | SCA3000_REG_MODE_RING_BUF_ENABLE));
1290        } else
1291                ret = sca3000_write_reg(st,
1292                        SCA3000_REG_MODE_ADDR,
1293                        (st->rx[0] & ~SCA3000_REG_MODE_RING_BUF_ENABLE));
1294error_ret:
1295        mutex_unlock(&st->lock);
1296
1297        return ret;
1298}
1299
1300/**
1301 * sca3000_hw_ring_preenable() - hw ring buffer preenable function
1302 * @indio_dev: structure representing the IIO device. Device instance
1303 * specific state can be accessed via iio_priv(indio_dev).
1304 *
1305 * Very simple enable function as the chip will allows normal reads
1306 * during ring buffer operation so as long as it is indeed running
1307 * before we notify the core, the precise ordering does not matter.
1308 */
1309static int sca3000_hw_ring_preenable(struct iio_dev *indio_dev)
1310{
1311        int ret;
1312        struct sca3000_state *st = iio_priv(indio_dev);
1313
1314        mutex_lock(&st->lock);
1315
1316        /* Enable the 50% full interrupt */
1317        ret = sca3000_read_data_short(st, SCA3000_REG_INT_MASK_ADDR, 1);
1318        if (ret)
1319                goto error_unlock;
1320        ret = sca3000_write_reg(st,
1321                                SCA3000_REG_INT_MASK_ADDR,
1322                                st->rx[0] | SCA3000_REG_INT_MASK_RING_HALF);
1323        if (ret)
1324                goto error_unlock;
1325
1326        mutex_unlock(&st->lock);
1327
1328        return __sca3000_hw_ring_state_set(indio_dev, 1);
1329
1330error_unlock:
1331        mutex_unlock(&st->lock);
1332
1333        return ret;
1334}
1335
1336static int sca3000_hw_ring_postdisable(struct iio_dev *indio_dev)
1337{
1338        int ret;
1339        struct sca3000_state *st = iio_priv(indio_dev);
1340
1341        ret = __sca3000_hw_ring_state_set(indio_dev, 0);
1342        if (ret)
1343                return ret;
1344
1345        /* Disable the 50% full interrupt */
1346        mutex_lock(&st->lock);
1347
1348        ret = sca3000_read_data_short(st, SCA3000_REG_INT_MASK_ADDR, 1);
1349        if (ret)
1350                goto unlock;
1351        ret = sca3000_write_reg(st,
1352                                SCA3000_REG_INT_MASK_ADDR,
1353                                st->rx[0] & ~SCA3000_REG_INT_MASK_RING_HALF);
1354unlock:
1355        mutex_unlock(&st->lock);
1356        return ret;
1357}
1358
1359static const struct iio_buffer_setup_ops sca3000_ring_setup_ops = {
1360        .preenable = &sca3000_hw_ring_preenable,
1361        .postdisable = &sca3000_hw_ring_postdisable,
1362};
1363
1364/**
1365 * sca3000_clean_setup() - get the device into a predictable state
1366 * @st: Device instance specific private data structure
1367 *
1368 * Devices use flash memory to store many of the register values
1369 * and hence can come up in somewhat unpredictable states.
1370 * Hence reset everything on driver load.
1371 */
1372static int sca3000_clean_setup(struct sca3000_state *st)
1373{
1374        int ret;
1375
1376        mutex_lock(&st->lock);
1377        /* Ensure all interrupts have been acknowledged */
1378        ret = sca3000_read_data_short(st, SCA3000_REG_INT_STATUS_ADDR, 1);
1379        if (ret)
1380                goto error_ret;
1381
1382        /* Turn off all motion detection channels */
1383        ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL);
1384        if (ret < 0)
1385                goto error_ret;
1386        ret = sca3000_write_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL,
1387                                     ret & SCA3000_MD_CTRL_PROT_MASK);
1388        if (ret)
1389                goto error_ret;
1390
1391        /* Disable ring buffer */
1392        ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL);
1393        if (ret < 0)
1394                goto error_ret;
1395        ret = sca3000_write_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL,
1396                                     (ret & SCA3000_REG_OUT_CTRL_PROT_MASK)
1397                                     | SCA3000_REG_OUT_CTRL_BUF_X_EN
1398                                     | SCA3000_REG_OUT_CTRL_BUF_Y_EN
1399                                     | SCA3000_REG_OUT_CTRL_BUF_Z_EN
1400                                     | SCA3000_REG_OUT_CTRL_BUF_DIV_4);
1401        if (ret)
1402                goto error_ret;
1403        /* Enable interrupts, relevant to mode and set up as active low */
1404        ret = sca3000_read_data_short(st, SCA3000_REG_INT_MASK_ADDR, 1);
1405        if (ret)
1406                goto error_ret;
1407        ret = sca3000_write_reg(st,
1408                                SCA3000_REG_INT_MASK_ADDR,
1409                                (ret & SCA3000_REG_INT_MASK_PROT_MASK)
1410                                | SCA3000_REG_INT_MASK_ACTIVE_LOW);
1411        if (ret)
1412                goto error_ret;
1413        /*
1414         * Select normal measurement mode, free fall off, ring off
1415         * Ring in 12 bit mode - it is fine to overwrite reserved bits 3,5
1416         * as that occurs in one of the example on the datasheet
1417         */
1418        ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
1419        if (ret)
1420                goto error_ret;
1421        ret = sca3000_write_reg(st, SCA3000_REG_MODE_ADDR,
1422                                (st->rx[0] & SCA3000_MODE_PROT_MASK));
1423
1424error_ret:
1425        mutex_unlock(&st->lock);
1426        return ret;
1427}
1428
1429static const struct iio_info sca3000_info = {
1430        .attrs = &sca3000_attribute_group,
1431        .read_raw = &sca3000_read_raw,
1432        .write_raw = &sca3000_write_raw,
1433        .read_event_value = &sca3000_read_event_value,
1434        .write_event_value = &sca3000_write_event_value,
1435        .read_event_config = &sca3000_read_event_config,
1436        .write_event_config = &sca3000_write_event_config,
1437};
1438
1439static int sca3000_probe(struct spi_device *spi)
1440{
1441        int ret;
1442        struct sca3000_state *st;
1443        struct iio_dev *indio_dev;
1444
1445        indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
1446        if (!indio_dev)
1447                return -ENOMEM;
1448
1449        st = iio_priv(indio_dev);
1450        spi_set_drvdata(spi, indio_dev);
1451        st->us = spi;
1452        mutex_init(&st->lock);
1453        st->info = &sca3000_spi_chip_info_tbl[spi_get_device_id(spi)
1454                                              ->driver_data];
1455
1456        indio_dev->name = spi_get_device_id(spi)->name;
1457        indio_dev->info = &sca3000_info;
1458        if (st->info->temp_output) {
1459                indio_dev->channels = sca3000_channels_with_temp;
1460                indio_dev->num_channels =
1461                        ARRAY_SIZE(sca3000_channels_with_temp);
1462        } else {
1463                indio_dev->channels = sca3000_channels;
1464                indio_dev->num_channels = ARRAY_SIZE(sca3000_channels);
1465        }
1466        indio_dev->modes = INDIO_DIRECT_MODE;
1467
1468        ret = devm_iio_kfifo_buffer_setup(&spi->dev, indio_dev,
1469                                          INDIO_BUFFER_SOFTWARE,
1470                                          &sca3000_ring_setup_ops);
1471        if (ret)
1472                return ret;
1473
1474        if (spi->irq) {
1475                ret = request_threaded_irq(spi->irq,
1476                                           NULL,
1477                                           &sca3000_event_handler,
1478                                           IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
1479                                           "sca3000",
1480                                           indio_dev);
1481                if (ret)
1482                        return ret;
1483        }
1484        ret = sca3000_clean_setup(st);
1485        if (ret)
1486                goto error_free_irq;
1487
1488        ret = sca3000_print_rev(indio_dev);
1489        if (ret)
1490                goto error_free_irq;
1491
1492        return iio_device_register(indio_dev);
1493
1494error_free_irq:
1495        if (spi->irq)
1496                free_irq(spi->irq, indio_dev);
1497
1498        return ret;
1499}
1500
1501static int sca3000_stop_all_interrupts(struct sca3000_state *st)
1502{
1503        int ret;
1504
1505        mutex_lock(&st->lock);
1506        ret = sca3000_read_data_short(st, SCA3000_REG_INT_MASK_ADDR, 1);
1507        if (ret)
1508                goto error_ret;
1509        ret = sca3000_write_reg(st, SCA3000_REG_INT_MASK_ADDR,
1510                                (st->rx[0] &
1511                                 ~(SCA3000_REG_INT_MASK_RING_THREE_QUARTER |
1512                                   SCA3000_REG_INT_MASK_RING_HALF |
1513                                   SCA3000_REG_INT_MASK_ALL_INTS)));
1514error_ret:
1515        mutex_unlock(&st->lock);
1516        return ret;
1517}
1518
1519static int sca3000_remove(struct spi_device *spi)
1520{
1521        struct iio_dev *indio_dev = spi_get_drvdata(spi);
1522        struct sca3000_state *st = iio_priv(indio_dev);
1523
1524        iio_device_unregister(indio_dev);
1525
1526        /* Must ensure no interrupts can be generated after this! */
1527        sca3000_stop_all_interrupts(st);
1528        if (spi->irq)
1529                free_irq(spi->irq, indio_dev);
1530
1531        return 0;
1532}
1533
1534static const struct spi_device_id sca3000_id[] = {
1535        {"sca3000_d01", d01},
1536        {"sca3000_e02", e02},
1537        {"sca3000_e04", e04},
1538        {"sca3000_e05", e05},
1539        {}
1540};
1541MODULE_DEVICE_TABLE(spi, sca3000_id);
1542
1543static struct spi_driver sca3000_driver = {
1544        .driver = {
1545                .name = "sca3000",
1546        },
1547        .probe = sca3000_probe,
1548        .remove = sca3000_remove,
1549        .id_table = sca3000_id,
1550};
1551module_spi_driver(sca3000_driver);
1552
1553MODULE_AUTHOR("Jonathan Cameron <jic23@kernel.org>");
1554MODULE_DESCRIPTION("VTI SCA3000 Series Accelerometers SPI driver");
1555MODULE_LICENSE("GPL v2");
1556