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12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/i2c.h>
15#include <linux/regmap.h>
16#include <linux/delay.h>
17#include <linux/acpi.h>
18
19#include <linux/iio/iio.h>
20#include <linux/iio/buffer.h>
21#include <linux/iio/trigger.h>
22#include <linux/iio/trigger_consumer.h>
23#include <linux/iio/triggered_buffer.h>
24#include <linux/iio/sysfs.h>
25#include <linux/pm_runtime.h>
26
27#define RPR0521_REG_SYSTEM_CTRL 0x40
28#define RPR0521_REG_MODE_CTRL 0x41
29#define RPR0521_REG_ALS_CTRL 0x42
30#define RPR0521_REG_PXS_CTRL 0x43
31#define RPR0521_REG_PXS_DATA 0x44
32#define RPR0521_REG_ALS_DATA0 0x46
33#define RPR0521_REG_ALS_DATA1 0x48
34#define RPR0521_REG_INTERRUPT 0x4A
35#define RPR0521_REG_PS_OFFSET_LSB 0x53
36#define RPR0521_REG_ID 0x92
37
38#define RPR0521_MODE_ALS_MASK BIT(7)
39#define RPR0521_MODE_PXS_MASK BIT(6)
40#define RPR0521_MODE_MEAS_TIME_MASK GENMASK(3, 0)
41#define RPR0521_ALS_DATA0_GAIN_MASK GENMASK(5, 4)
42#define RPR0521_ALS_DATA0_GAIN_SHIFT 4
43#define RPR0521_ALS_DATA1_GAIN_MASK GENMASK(3, 2)
44#define RPR0521_ALS_DATA1_GAIN_SHIFT 2
45#define RPR0521_PXS_GAIN_MASK GENMASK(5, 4)
46#define RPR0521_PXS_GAIN_SHIFT 4
47#define RPR0521_PXS_PERSISTENCE_MASK GENMASK(3, 0)
48#define RPR0521_INTERRUPT_INT_TRIG_PS_MASK BIT(0)
49#define RPR0521_INTERRUPT_INT_TRIG_ALS_MASK BIT(1)
50#define RPR0521_INTERRUPT_INT_REASSERT_MASK BIT(3)
51#define RPR0521_INTERRUPT_ALS_INT_STATUS_MASK BIT(6)
52#define RPR0521_INTERRUPT_PS_INT_STATUS_MASK BIT(7)
53
54#define RPR0521_MODE_ALS_ENABLE BIT(7)
55#define RPR0521_MODE_ALS_DISABLE 0x00
56#define RPR0521_MODE_PXS_ENABLE BIT(6)
57#define RPR0521_MODE_PXS_DISABLE 0x00
58#define RPR0521_PXS_PERSISTENCE_DRDY 0x00
59
60#define RPR0521_INTERRUPT_INT_TRIG_PS_ENABLE BIT(0)
61#define RPR0521_INTERRUPT_INT_TRIG_PS_DISABLE 0x00
62#define RPR0521_INTERRUPT_INT_TRIG_ALS_ENABLE BIT(1)
63#define RPR0521_INTERRUPT_INT_TRIG_ALS_DISABLE 0x00
64#define RPR0521_INTERRUPT_INT_REASSERT_ENABLE BIT(3)
65#define RPR0521_INTERRUPT_INT_REASSERT_DISABLE 0x00
66
67#define RPR0521_MANUFACT_ID 0xE0
68#define RPR0521_DEFAULT_MEAS_TIME 0x06
69
70#define RPR0521_DRV_NAME "RPR0521"
71#define RPR0521_IRQ_NAME "rpr0521_event"
72#define RPR0521_REGMAP_NAME "rpr0521_regmap"
73
74#define RPR0521_SLEEP_DELAY_MS 2000
75
76#define RPR0521_ALS_SCALE_AVAIL "0.007812 0.015625 0.5 1"
77#define RPR0521_PXS_SCALE_AVAIL "0.125 0.5 1"
78
79struct rpr0521_gain {
80 int scale;
81 int uscale;
82};
83
84static const struct rpr0521_gain rpr0521_als_gain[4] = {
85 {1, 0},
86 {0, 500000},
87 {0, 15625},
88 {0, 7812},
89};
90
91static const struct rpr0521_gain rpr0521_pxs_gain[3] = {
92 {1, 0},
93 {0, 500000},
94 {0, 125000},
95};
96
97enum rpr0521_channel {
98 RPR0521_CHAN_PXS,
99 RPR0521_CHAN_ALS_DATA0,
100 RPR0521_CHAN_ALS_DATA1,
101};
102
103struct rpr0521_reg_desc {
104 u8 address;
105 u8 device_mask;
106};
107
108static const struct rpr0521_reg_desc rpr0521_data_reg[] = {
109 [RPR0521_CHAN_PXS] = {
110 .address = RPR0521_REG_PXS_DATA,
111 .device_mask = RPR0521_MODE_PXS_MASK,
112 },
113 [RPR0521_CHAN_ALS_DATA0] = {
114 .address = RPR0521_REG_ALS_DATA0,
115 .device_mask = RPR0521_MODE_ALS_MASK,
116 },
117 [RPR0521_CHAN_ALS_DATA1] = {
118 .address = RPR0521_REG_ALS_DATA1,
119 .device_mask = RPR0521_MODE_ALS_MASK,
120 },
121};
122
123static const struct rpr0521_gain_info {
124 u8 reg;
125 u8 mask;
126 u8 shift;
127 const struct rpr0521_gain *gain;
128 int size;
129} rpr0521_gain[] = {
130 [RPR0521_CHAN_PXS] = {
131 .reg = RPR0521_REG_PXS_CTRL,
132 .mask = RPR0521_PXS_GAIN_MASK,
133 .shift = RPR0521_PXS_GAIN_SHIFT,
134 .gain = rpr0521_pxs_gain,
135 .size = ARRAY_SIZE(rpr0521_pxs_gain),
136 },
137 [RPR0521_CHAN_ALS_DATA0] = {
138 .reg = RPR0521_REG_ALS_CTRL,
139 .mask = RPR0521_ALS_DATA0_GAIN_MASK,
140 .shift = RPR0521_ALS_DATA0_GAIN_SHIFT,
141 .gain = rpr0521_als_gain,
142 .size = ARRAY_SIZE(rpr0521_als_gain),
143 },
144 [RPR0521_CHAN_ALS_DATA1] = {
145 .reg = RPR0521_REG_ALS_CTRL,
146 .mask = RPR0521_ALS_DATA1_GAIN_MASK,
147 .shift = RPR0521_ALS_DATA1_GAIN_SHIFT,
148 .gain = rpr0521_als_gain,
149 .size = ARRAY_SIZE(rpr0521_als_gain),
150 },
151};
152
153struct rpr0521_samp_freq {
154 int als_hz;
155 int als_uhz;
156 int pxs_hz;
157 int pxs_uhz;
158};
159
160static const struct rpr0521_samp_freq rpr0521_samp_freq_i[13] = {
161
162 {0, 0, 0, 0},
163 {0, 0, 100, 0},
164 {0, 0, 25, 0},
165 {0, 0, 10, 0},
166 {0, 0, 2, 500000},
167 {10, 0, 20, 0},
168 {10, 0, 10, 0},
169 {10, 0, 2, 500000},
170 {2, 500000, 20, 0},
171 {2, 500000, 10, 0},
172 {2, 500000, 0, 0},
173 {2, 500000, 2, 500000},
174 {20, 0, 20, 0}
175};
176
177struct rpr0521_data {
178 struct i2c_client *client;
179
180
181 struct mutex lock;
182
183
184 bool als_dev_en;
185 bool pxs_dev_en;
186
187 struct iio_trigger *drdy_trigger0;
188 s64 irq_timestamp;
189
190
191 bool als_ps_need_en;
192 bool pxs_ps_need_en;
193 bool als_need_dis;
194 bool pxs_need_dis;
195
196 struct regmap *regmap;
197
198
199
200
201
202
203 struct {
204 __le16 channels[3];
205 u8 garbage;
206 s64 ts __aligned(8);
207 } scan;
208};
209
210static IIO_CONST_ATTR(in_intensity_scale_available, RPR0521_ALS_SCALE_AVAIL);
211static IIO_CONST_ATTR(in_proximity_scale_available, RPR0521_PXS_SCALE_AVAIL);
212
213
214
215
216
217static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("2.5 10");
218
219static struct attribute *rpr0521_attributes[] = {
220 &iio_const_attr_in_intensity_scale_available.dev_attr.attr,
221 &iio_const_attr_in_proximity_scale_available.dev_attr.attr,
222 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
223 NULL,
224};
225
226static const struct attribute_group rpr0521_attribute_group = {
227 .attrs = rpr0521_attributes,
228};
229
230
231enum rpr0521_scan_index_order {
232 RPR0521_CHAN_INDEX_PXS,
233 RPR0521_CHAN_INDEX_BOTH,
234 RPR0521_CHAN_INDEX_IR,
235};
236
237static const unsigned long rpr0521_available_scan_masks[] = {
238 BIT(RPR0521_CHAN_INDEX_PXS) | BIT(RPR0521_CHAN_INDEX_BOTH) |
239 BIT(RPR0521_CHAN_INDEX_IR),
240 0
241};
242
243static const struct iio_chan_spec rpr0521_channels[] = {
244 {
245 .type = IIO_PROXIMITY,
246 .address = RPR0521_CHAN_PXS,
247 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
248 BIT(IIO_CHAN_INFO_OFFSET) |
249 BIT(IIO_CHAN_INFO_SCALE),
250 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
251 .scan_index = RPR0521_CHAN_INDEX_PXS,
252 .scan_type = {
253 .sign = 'u',
254 .realbits = 16,
255 .storagebits = 16,
256 .endianness = IIO_LE,
257 },
258 },
259 {
260 .type = IIO_INTENSITY,
261 .modified = 1,
262 .address = RPR0521_CHAN_ALS_DATA0,
263 .channel2 = IIO_MOD_LIGHT_BOTH,
264 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
265 BIT(IIO_CHAN_INFO_SCALE),
266 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
267 .scan_index = RPR0521_CHAN_INDEX_BOTH,
268 .scan_type = {
269 .sign = 'u',
270 .realbits = 16,
271 .storagebits = 16,
272 .endianness = IIO_LE,
273 },
274 },
275 {
276 .type = IIO_INTENSITY,
277 .modified = 1,
278 .address = RPR0521_CHAN_ALS_DATA1,
279 .channel2 = IIO_MOD_LIGHT_IR,
280 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
281 BIT(IIO_CHAN_INFO_SCALE),
282 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
283 .scan_index = RPR0521_CHAN_INDEX_IR,
284 .scan_type = {
285 .sign = 'u',
286 .realbits = 16,
287 .storagebits = 16,
288 .endianness = IIO_LE,
289 },
290 },
291};
292
293static int rpr0521_als_enable(struct rpr0521_data *data, u8 status)
294{
295 int ret;
296
297 ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL,
298 RPR0521_MODE_ALS_MASK,
299 status);
300 if (ret < 0)
301 return ret;
302
303 if (status & RPR0521_MODE_ALS_MASK)
304 data->als_dev_en = true;
305 else
306 data->als_dev_en = false;
307
308 return 0;
309}
310
311static int rpr0521_pxs_enable(struct rpr0521_data *data, u8 status)
312{
313 int ret;
314
315 ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL,
316 RPR0521_MODE_PXS_MASK,
317 status);
318 if (ret < 0)
319 return ret;
320
321 if (status & RPR0521_MODE_PXS_MASK)
322 data->pxs_dev_en = true;
323 else
324 data->pxs_dev_en = false;
325
326 return 0;
327}
328
329
330
331
332
333
334
335
336
337
338
339static int rpr0521_set_power_state(struct rpr0521_data *data, bool on,
340 u8 device_mask)
341{
342#ifdef CONFIG_PM
343 int ret;
344
345 if (device_mask & RPR0521_MODE_ALS_MASK) {
346 data->als_ps_need_en = on;
347 data->als_need_dis = !on;
348 }
349
350 if (device_mask & RPR0521_MODE_PXS_MASK) {
351 data->pxs_ps_need_en = on;
352 data->pxs_need_dis = !on;
353 }
354
355
356
357
358
359
360
361
362 if (on) {
363 ret = pm_runtime_resume_and_get(&data->client->dev);
364 } else {
365 pm_runtime_mark_last_busy(&data->client->dev);
366 ret = pm_runtime_put_autosuspend(&data->client->dev);
367 }
368 if (ret < 0) {
369 dev_err(&data->client->dev,
370 "Failed: rpr0521_set_power_state for %d, ret %d\n",
371 on, ret);
372 return ret;
373 }
374
375 if (on) {
376
377 if (data->als_ps_need_en) {
378 ret = rpr0521_als_enable(data, RPR0521_MODE_ALS_ENABLE);
379 if (ret)
380 return ret;
381 data->als_ps_need_en = false;
382 }
383
384 if (data->pxs_ps_need_en) {
385 ret = rpr0521_pxs_enable(data, RPR0521_MODE_PXS_ENABLE);
386 if (ret)
387 return ret;
388 data->pxs_ps_need_en = false;
389 }
390 }
391#endif
392 return 0;
393}
394
395
396static inline bool rpr0521_is_triggered(struct rpr0521_data *data)
397{
398 int ret;
399 int reg;
400
401 ret = regmap_read(data->regmap, RPR0521_REG_INTERRUPT, ®);
402 if (ret < 0)
403 return false;
404 if (reg &
405 (RPR0521_INTERRUPT_ALS_INT_STATUS_MASK |
406 RPR0521_INTERRUPT_PS_INT_STATUS_MASK))
407 return true;
408 else
409 return false;
410}
411
412
413static irqreturn_t rpr0521_drdy_irq_handler(int irq, void *private)
414{
415 struct iio_dev *indio_dev = private;
416 struct rpr0521_data *data = iio_priv(indio_dev);
417
418 data->irq_timestamp = iio_get_time_ns(indio_dev);
419
420
421
422
423
424
425 return IRQ_WAKE_THREAD;
426}
427
428static irqreturn_t rpr0521_drdy_irq_thread(int irq, void *private)
429{
430 struct iio_dev *indio_dev = private;
431 struct rpr0521_data *data = iio_priv(indio_dev);
432
433 if (rpr0521_is_triggered(data)) {
434 iio_trigger_poll_chained(data->drdy_trigger0);
435 return IRQ_HANDLED;
436 }
437
438 return IRQ_NONE;
439}
440
441static irqreturn_t rpr0521_trigger_consumer_store_time(int irq, void *p)
442{
443 struct iio_poll_func *pf = p;
444 struct iio_dev *indio_dev = pf->indio_dev;
445
446
447 if (!iio_trigger_using_own(indio_dev))
448 pf->timestamp = iio_get_time_ns(indio_dev);
449
450 return IRQ_WAKE_THREAD;
451}
452
453static irqreturn_t rpr0521_trigger_consumer_handler(int irq, void *p)
454{
455 struct iio_poll_func *pf = p;
456 struct iio_dev *indio_dev = pf->indio_dev;
457 struct rpr0521_data *data = iio_priv(indio_dev);
458 int err;
459
460
461 if (iio_trigger_using_own(indio_dev) && data->irq_timestamp) {
462 pf->timestamp = data->irq_timestamp;
463 data->irq_timestamp = 0;
464 }
465
466 if (!pf->timestamp)
467 pf->timestamp = iio_get_time_ns(indio_dev);
468
469 err = regmap_bulk_read(data->regmap, RPR0521_REG_PXS_DATA,
470 data->scan.channels,
471 (3 * 2) + 1);
472 if (!err)
473 iio_push_to_buffers_with_timestamp(indio_dev,
474 &data->scan, pf->timestamp);
475 else
476 dev_err(&data->client->dev,
477 "Trigger consumer can't read from sensor.\n");
478 pf->timestamp = 0;
479
480 iio_trigger_notify_done(indio_dev->trig);
481
482 return IRQ_HANDLED;
483}
484
485static int rpr0521_write_int_enable(struct rpr0521_data *data)
486{
487 int err;
488
489
490 err = regmap_update_bits(data->regmap, RPR0521_REG_PXS_CTRL,
491 RPR0521_PXS_PERSISTENCE_MASK,
492 RPR0521_PXS_PERSISTENCE_DRDY);
493 if (err) {
494 dev_err(&data->client->dev, "PS control reg write fail.\n");
495 return -EBUSY;
496 }
497
498
499 err = regmap_write(data->regmap, RPR0521_REG_INTERRUPT,
500 RPR0521_INTERRUPT_INT_REASSERT_DISABLE |
501 RPR0521_INTERRUPT_INT_TRIG_ALS_DISABLE |
502 RPR0521_INTERRUPT_INT_TRIG_PS_ENABLE
503 );
504 if (err) {
505 dev_err(&data->client->dev, "Interrupt setup write fail.\n");
506 return -EBUSY;
507 }
508
509 return 0;
510}
511
512static int rpr0521_write_int_disable(struct rpr0521_data *data)
513{
514
515 return regmap_write(data->regmap, RPR0521_REG_INTERRUPT,
516 RPR0521_INTERRUPT_INT_TRIG_ALS_DISABLE |
517 RPR0521_INTERRUPT_INT_TRIG_PS_DISABLE
518 );
519}
520
521
522
523
524
525static int rpr0521_pxs_drdy_set_state(struct iio_trigger *trigger,
526 bool enable_drdy)
527{
528 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trigger);
529 struct rpr0521_data *data = iio_priv(indio_dev);
530 int err;
531
532 if (enable_drdy)
533 err = rpr0521_write_int_enable(data);
534 else
535 err = rpr0521_write_int_disable(data);
536 if (err)
537 dev_err(&data->client->dev, "rpr0521_pxs_drdy_set_state failed\n");
538
539 return err;
540}
541
542static const struct iio_trigger_ops rpr0521_trigger_ops = {
543 .set_trigger_state = rpr0521_pxs_drdy_set_state,
544 };
545
546
547static int rpr0521_buffer_preenable(struct iio_dev *indio_dev)
548{
549 int err;
550 struct rpr0521_data *data = iio_priv(indio_dev);
551
552 mutex_lock(&data->lock);
553 err = rpr0521_set_power_state(data, true,
554 (RPR0521_MODE_PXS_MASK | RPR0521_MODE_ALS_MASK));
555 mutex_unlock(&data->lock);
556 if (err)
557 dev_err(&data->client->dev, "_buffer_preenable fail\n");
558
559 return err;
560}
561
562static int rpr0521_buffer_postdisable(struct iio_dev *indio_dev)
563{
564 int err;
565 struct rpr0521_data *data = iio_priv(indio_dev);
566
567 mutex_lock(&data->lock);
568 err = rpr0521_set_power_state(data, false,
569 (RPR0521_MODE_PXS_MASK | RPR0521_MODE_ALS_MASK));
570 mutex_unlock(&data->lock);
571 if (err)
572 dev_err(&data->client->dev, "_buffer_postdisable fail\n");
573
574 return err;
575}
576
577static const struct iio_buffer_setup_ops rpr0521_buffer_setup_ops = {
578 .preenable = rpr0521_buffer_preenable,
579 .postdisable = rpr0521_buffer_postdisable,
580};
581
582static int rpr0521_get_gain(struct rpr0521_data *data, int chan,
583 int *val, int *val2)
584{
585 int ret, reg, idx;
586
587 ret = regmap_read(data->regmap, rpr0521_gain[chan].reg, ®);
588 if (ret < 0)
589 return ret;
590
591 idx = (rpr0521_gain[chan].mask & reg) >> rpr0521_gain[chan].shift;
592 *val = rpr0521_gain[chan].gain[idx].scale;
593 *val2 = rpr0521_gain[chan].gain[idx].uscale;
594
595 return 0;
596}
597
598static int rpr0521_set_gain(struct rpr0521_data *data, int chan,
599 int val, int val2)
600{
601 int i, idx = -EINVAL;
602
603
604 for (i = 0; i < rpr0521_gain[chan].size; i++)
605 if (val == rpr0521_gain[chan].gain[i].scale &&
606 val2 == rpr0521_gain[chan].gain[i].uscale) {
607 idx = i;
608 break;
609 }
610
611 if (idx < 0)
612 return idx;
613
614 return regmap_update_bits(data->regmap, rpr0521_gain[chan].reg,
615 rpr0521_gain[chan].mask,
616 idx << rpr0521_gain[chan].shift);
617}
618
619static int rpr0521_read_samp_freq(struct rpr0521_data *data,
620 enum iio_chan_type chan_type,
621 int *val, int *val2)
622{
623 int reg, ret;
624
625 ret = regmap_read(data->regmap, RPR0521_REG_MODE_CTRL, ®);
626 if (ret < 0)
627 return ret;
628
629 reg &= RPR0521_MODE_MEAS_TIME_MASK;
630 if (reg >= ARRAY_SIZE(rpr0521_samp_freq_i))
631 return -EINVAL;
632
633 switch (chan_type) {
634 case IIO_INTENSITY:
635 *val = rpr0521_samp_freq_i[reg].als_hz;
636 *val2 = rpr0521_samp_freq_i[reg].als_uhz;
637 return 0;
638
639 case IIO_PROXIMITY:
640 *val = rpr0521_samp_freq_i[reg].pxs_hz;
641 *val2 = rpr0521_samp_freq_i[reg].pxs_uhz;
642 return 0;
643
644 default:
645 return -EINVAL;
646 }
647}
648
649static int rpr0521_write_samp_freq_common(struct rpr0521_data *data,
650 enum iio_chan_type chan_type,
651 int val, int val2)
652{
653 int i;
654
655
656
657
658
659 switch (val) {
660 case 0:
661 i = 0;
662 break;
663
664 case 2:
665 if (val2 != 500000)
666 return -EINVAL;
667
668 i = 11;
669 break;
670
671 case 10:
672 i = 6;
673 break;
674
675 default:
676 return -EINVAL;
677 }
678
679 return regmap_update_bits(data->regmap,
680 RPR0521_REG_MODE_CTRL,
681 RPR0521_MODE_MEAS_TIME_MASK,
682 i);
683}
684
685static int rpr0521_read_ps_offset(struct rpr0521_data *data, int *offset)
686{
687 int ret;
688 __le16 buffer;
689
690 ret = regmap_bulk_read(data->regmap,
691 RPR0521_REG_PS_OFFSET_LSB, &buffer, sizeof(buffer));
692
693 if (ret < 0) {
694 dev_err(&data->client->dev, "Failed to read PS OFFSET register\n");
695 return ret;
696 }
697 *offset = le16_to_cpu(buffer);
698
699 return ret;
700}
701
702static int rpr0521_write_ps_offset(struct rpr0521_data *data, int offset)
703{
704 int ret;
705 __le16 buffer;
706
707 buffer = cpu_to_le16(offset & 0x3ff);
708 ret = regmap_raw_write(data->regmap,
709 RPR0521_REG_PS_OFFSET_LSB, &buffer, sizeof(buffer));
710
711 if (ret < 0) {
712 dev_err(&data->client->dev, "Failed to write PS OFFSET register\n");
713 return ret;
714 }
715
716 return ret;
717}
718
719static int rpr0521_read_raw(struct iio_dev *indio_dev,
720 struct iio_chan_spec const *chan, int *val,
721 int *val2, long mask)
722{
723 struct rpr0521_data *data = iio_priv(indio_dev);
724 int ret;
725 int busy;
726 u8 device_mask;
727 __le16 raw_data;
728
729 switch (mask) {
730 case IIO_CHAN_INFO_RAW:
731 if (chan->type != IIO_INTENSITY && chan->type != IIO_PROXIMITY)
732 return -EINVAL;
733
734 busy = iio_device_claim_direct_mode(indio_dev);
735 if (busy)
736 return -EBUSY;
737
738 device_mask = rpr0521_data_reg[chan->address].device_mask;
739
740 mutex_lock(&data->lock);
741 ret = rpr0521_set_power_state(data, true, device_mask);
742 if (ret < 0)
743 goto rpr0521_read_raw_out;
744
745 ret = regmap_bulk_read(data->regmap,
746 rpr0521_data_reg[chan->address].address,
747 &raw_data, sizeof(raw_data));
748 if (ret < 0) {
749 rpr0521_set_power_state(data, false, device_mask);
750 goto rpr0521_read_raw_out;
751 }
752
753 ret = rpr0521_set_power_state(data, false, device_mask);
754
755rpr0521_read_raw_out:
756 mutex_unlock(&data->lock);
757 iio_device_release_direct_mode(indio_dev);
758 if (ret < 0)
759 return ret;
760
761 *val = le16_to_cpu(raw_data);
762
763 return IIO_VAL_INT;
764
765 case IIO_CHAN_INFO_SCALE:
766 mutex_lock(&data->lock);
767 ret = rpr0521_get_gain(data, chan->address, val, val2);
768 mutex_unlock(&data->lock);
769 if (ret < 0)
770 return ret;
771
772 return IIO_VAL_INT_PLUS_MICRO;
773
774 case IIO_CHAN_INFO_SAMP_FREQ:
775 mutex_lock(&data->lock);
776 ret = rpr0521_read_samp_freq(data, chan->type, val, val2);
777 mutex_unlock(&data->lock);
778 if (ret < 0)
779 return ret;
780
781 return IIO_VAL_INT_PLUS_MICRO;
782
783 case IIO_CHAN_INFO_OFFSET:
784 mutex_lock(&data->lock);
785 ret = rpr0521_read_ps_offset(data, val);
786 mutex_unlock(&data->lock);
787 if (ret < 0)
788 return ret;
789
790 return IIO_VAL_INT;
791
792 default:
793 return -EINVAL;
794 }
795}
796
797static int rpr0521_write_raw(struct iio_dev *indio_dev,
798 struct iio_chan_spec const *chan, int val,
799 int val2, long mask)
800{
801 struct rpr0521_data *data = iio_priv(indio_dev);
802 int ret;
803
804 switch (mask) {
805 case IIO_CHAN_INFO_SCALE:
806 mutex_lock(&data->lock);
807 ret = rpr0521_set_gain(data, chan->address, val, val2);
808 mutex_unlock(&data->lock);
809
810 return ret;
811
812 case IIO_CHAN_INFO_SAMP_FREQ:
813 mutex_lock(&data->lock);
814 ret = rpr0521_write_samp_freq_common(data, chan->type,
815 val, val2);
816 mutex_unlock(&data->lock);
817
818 return ret;
819
820 case IIO_CHAN_INFO_OFFSET:
821 mutex_lock(&data->lock);
822 ret = rpr0521_write_ps_offset(data, val);
823 mutex_unlock(&data->lock);
824
825 return ret;
826
827 default:
828 return -EINVAL;
829 }
830}
831
832static const struct iio_info rpr0521_info = {
833 .read_raw = rpr0521_read_raw,
834 .write_raw = rpr0521_write_raw,
835 .attrs = &rpr0521_attribute_group,
836};
837
838static int rpr0521_init(struct rpr0521_data *data)
839{
840 int ret;
841 int id;
842
843 ret = regmap_read(data->regmap, RPR0521_REG_ID, &id);
844 if (ret < 0) {
845 dev_err(&data->client->dev, "Failed to read REG_ID register\n");
846 return ret;
847 }
848
849 if (id != RPR0521_MANUFACT_ID) {
850 dev_err(&data->client->dev, "Wrong id, got %x, expected %x\n",
851 id, RPR0521_MANUFACT_ID);
852 return -ENODEV;
853 }
854
855
856 ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL,
857 RPR0521_MODE_MEAS_TIME_MASK,
858 RPR0521_DEFAULT_MEAS_TIME);
859 if (ret) {
860 pr_err("regmap_update_bits returned %d\n", ret);
861 return ret;
862 }
863
864#ifndef CONFIG_PM
865 ret = rpr0521_als_enable(data, RPR0521_MODE_ALS_ENABLE);
866 if (ret < 0)
867 return ret;
868 ret = rpr0521_pxs_enable(data, RPR0521_MODE_PXS_ENABLE);
869 if (ret < 0)
870 return ret;
871#endif
872
873 data->irq_timestamp = 0;
874
875 return 0;
876}
877
878static int rpr0521_poweroff(struct rpr0521_data *data)
879{
880 int ret;
881 int tmp;
882
883 ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL,
884 RPR0521_MODE_ALS_MASK |
885 RPR0521_MODE_PXS_MASK,
886 RPR0521_MODE_ALS_DISABLE |
887 RPR0521_MODE_PXS_DISABLE);
888 if (ret < 0)
889 return ret;
890
891 data->als_dev_en = false;
892 data->pxs_dev_en = false;
893
894
895
896
897
898 ret = regmap_read(data->regmap, RPR0521_REG_INTERRUPT, &tmp);
899 if (ret) {
900 dev_err(&data->client->dev, "Failed to reset int pin.\n");
901 return ret;
902 }
903
904 return 0;
905}
906
907static bool rpr0521_is_volatile_reg(struct device *dev, unsigned int reg)
908{
909 switch (reg) {
910 case RPR0521_REG_MODE_CTRL:
911 case RPR0521_REG_ALS_CTRL:
912 case RPR0521_REG_PXS_CTRL:
913 return false;
914 default:
915 return true;
916 }
917}
918
919static const struct regmap_config rpr0521_regmap_config = {
920 .name = RPR0521_REGMAP_NAME,
921
922 .reg_bits = 8,
923 .val_bits = 8,
924
925 .max_register = RPR0521_REG_ID,
926 .cache_type = REGCACHE_RBTREE,
927 .volatile_reg = rpr0521_is_volatile_reg,
928};
929
930static int rpr0521_probe(struct i2c_client *client,
931 const struct i2c_device_id *id)
932{
933 struct rpr0521_data *data;
934 struct iio_dev *indio_dev;
935 struct regmap *regmap;
936 int ret;
937
938 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
939 if (!indio_dev)
940 return -ENOMEM;
941
942 regmap = devm_regmap_init_i2c(client, &rpr0521_regmap_config);
943 if (IS_ERR(regmap)) {
944 dev_err(&client->dev, "regmap_init failed!\n");
945 return PTR_ERR(regmap);
946 }
947
948 data = iio_priv(indio_dev);
949 i2c_set_clientdata(client, indio_dev);
950 data->client = client;
951 data->regmap = regmap;
952
953 mutex_init(&data->lock);
954
955 indio_dev->info = &rpr0521_info;
956 indio_dev->name = RPR0521_DRV_NAME;
957 indio_dev->channels = rpr0521_channels;
958 indio_dev->num_channels = ARRAY_SIZE(rpr0521_channels);
959 indio_dev->modes = INDIO_DIRECT_MODE;
960
961 ret = rpr0521_init(data);
962 if (ret < 0) {
963 dev_err(&client->dev, "rpr0521 chip init failed\n");
964 return ret;
965 }
966
967 ret = pm_runtime_set_active(&client->dev);
968 if (ret < 0)
969 goto err_poweroff;
970
971 pm_runtime_enable(&client->dev);
972 pm_runtime_set_autosuspend_delay(&client->dev, RPR0521_SLEEP_DELAY_MS);
973 pm_runtime_use_autosuspend(&client->dev);
974
975
976
977
978
979
980
981 if (client->irq) {
982
983 data->drdy_trigger0 = devm_iio_trigger_alloc(
984 indio_dev->dev.parent,
985 "%s-dev%d", indio_dev->name, iio_device_id(indio_dev));
986 if (!data->drdy_trigger0) {
987 ret = -ENOMEM;
988 goto err_pm_disable;
989 }
990 data->drdy_trigger0->ops = &rpr0521_trigger_ops;
991 indio_dev->available_scan_masks = rpr0521_available_scan_masks;
992 iio_trigger_set_drvdata(data->drdy_trigger0, indio_dev);
993
994
995 ret = devm_request_threaded_irq(&client->dev, client->irq,
996 rpr0521_drdy_irq_handler, rpr0521_drdy_irq_thread,
997 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
998 RPR0521_IRQ_NAME, indio_dev);
999 if (ret < 0) {
1000 dev_err(&client->dev, "request irq %d for trigger0 failed\n",
1001 client->irq);
1002 goto err_pm_disable;
1003 }
1004
1005 ret = devm_iio_trigger_register(indio_dev->dev.parent,
1006 data->drdy_trigger0);
1007 if (ret) {
1008 dev_err(&client->dev, "iio trigger register failed\n");
1009 goto err_pm_disable;
1010 }
1011
1012
1013
1014
1015
1016
1017
1018 ret = devm_iio_triggered_buffer_setup(indio_dev->dev.parent,
1019 indio_dev,
1020 rpr0521_trigger_consumer_store_time,
1021 rpr0521_trigger_consumer_handler,
1022 &rpr0521_buffer_setup_ops);
1023 if (ret < 0) {
1024 dev_err(&client->dev, "iio triggered buffer setup failed\n");
1025 goto err_pm_disable;
1026 }
1027 }
1028
1029 ret = iio_device_register(indio_dev);
1030 if (ret)
1031 goto err_pm_disable;
1032
1033 return 0;
1034
1035err_pm_disable:
1036 pm_runtime_disable(&client->dev);
1037 pm_runtime_set_suspended(&client->dev);
1038err_poweroff:
1039 rpr0521_poweroff(data);
1040
1041 return ret;
1042}
1043
1044static int rpr0521_remove(struct i2c_client *client)
1045{
1046 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1047
1048 iio_device_unregister(indio_dev);
1049
1050 pm_runtime_disable(&client->dev);
1051 pm_runtime_set_suspended(&client->dev);
1052
1053 rpr0521_poweroff(iio_priv(indio_dev));
1054
1055 return 0;
1056}
1057
1058#ifdef CONFIG_PM
1059static int rpr0521_runtime_suspend(struct device *dev)
1060{
1061 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1062 struct rpr0521_data *data = iio_priv(indio_dev);
1063 int ret;
1064
1065 mutex_lock(&data->lock);
1066
1067 if (!data->als_need_dis)
1068 data->als_ps_need_en = data->als_dev_en;
1069 if (!data->pxs_need_dis)
1070 data->pxs_ps_need_en = data->pxs_dev_en;
1071
1072
1073 ret = rpr0521_poweroff(data);
1074 regcache_mark_dirty(data->regmap);
1075 mutex_unlock(&data->lock);
1076
1077 return ret;
1078}
1079
1080static int rpr0521_runtime_resume(struct device *dev)
1081{
1082 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1083 struct rpr0521_data *data = iio_priv(indio_dev);
1084 int ret;
1085
1086 regcache_sync(data->regmap);
1087 if (data->als_ps_need_en) {
1088 ret = rpr0521_als_enable(data, RPR0521_MODE_ALS_ENABLE);
1089 if (ret < 0)
1090 return ret;
1091 data->als_ps_need_en = false;
1092 }
1093
1094 if (data->pxs_ps_need_en) {
1095 ret = rpr0521_pxs_enable(data, RPR0521_MODE_PXS_ENABLE);
1096 if (ret < 0)
1097 return ret;
1098 data->pxs_ps_need_en = false;
1099 }
1100 msleep(100);
1101
1102 return 0;
1103}
1104#endif
1105
1106static const struct dev_pm_ops rpr0521_pm_ops = {
1107 SET_RUNTIME_PM_OPS(rpr0521_runtime_suspend,
1108 rpr0521_runtime_resume, NULL)
1109};
1110
1111static const struct acpi_device_id rpr0521_acpi_match[] = {
1112 {"RPR0521", 0},
1113 { }
1114};
1115MODULE_DEVICE_TABLE(acpi, rpr0521_acpi_match);
1116
1117static const struct i2c_device_id rpr0521_id[] = {
1118 {"rpr0521", 0},
1119 { }
1120};
1121
1122MODULE_DEVICE_TABLE(i2c, rpr0521_id);
1123
1124static struct i2c_driver rpr0521_driver = {
1125 .driver = {
1126 .name = RPR0521_DRV_NAME,
1127 .pm = &rpr0521_pm_ops,
1128 .acpi_match_table = ACPI_PTR(rpr0521_acpi_match),
1129 },
1130 .probe = rpr0521_probe,
1131 .remove = rpr0521_remove,
1132 .id_table = rpr0521_id,
1133};
1134
1135module_i2c_driver(rpr0521_driver);
1136
1137MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>");
1138MODULE_DESCRIPTION("RPR0521 ROHM Ambient Light and Proximity Sensor driver");
1139MODULE_LICENSE("GPL v2");
1140