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13#include <linux/acpi.h>
14#include <linux/bitfield.h>
15#include <linux/delay.h>
16#include <linux/i2c.h>
17#include <linux/irq.h>
18#include <linux/kernel.h>
19#include <linux/log2.h>
20#include <linux/mod_devicetable.h>
21#include <linux/module.h>
22#include <linux/pm.h>
23#include <linux/property.h>
24#include <linux/regmap.h>
25#include <linux/regulator/consumer.h>
26#include <linux/slab.h>
27
28#include <linux/iio/buffer.h>
29#include <linux/iio/events.h>
30#include <linux/iio/iio.h>
31#include <linux/iio/sysfs.h>
32#include <linux/iio/trigger.h>
33#include <linux/iio/triggered_buffer.h>
34#include <linux/iio/trigger_consumer.h>
35
36
37#define SX9310_REG_IRQ_SRC 0x00
38#define SX9310_REG_STAT0 0x01
39#define SX9310_REG_STAT1 0x02
40#define SX9310_REG_STAT1_COMPSTAT_MASK GENMASK(3, 0)
41#define SX9310_REG_IRQ_MSK 0x03
42#define SX9310_CONVDONE_IRQ BIT(3)
43#define SX9310_FAR_IRQ BIT(5)
44#define SX9310_CLOSE_IRQ BIT(6)
45#define SX9310_REG_IRQ_FUNC 0x04
46
47#define SX9310_REG_PROX_CTRL0 0x10
48#define SX9310_REG_PROX_CTRL0_SENSOREN_MASK GENMASK(3, 0)
49#define SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK GENMASK(7, 4)
50#define SX9310_REG_PROX_CTRL0_SCANPERIOD_15MS 0x01
51#define SX9310_REG_PROX_CTRL1 0x11
52#define SX9310_REG_PROX_CTRL2 0x12
53#define SX9310_REG_PROX_CTRL2_COMBMODE_MASK GENMASK(7, 6)
54#define SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1_CS2_CS3 (0x03 << 6)
55#define SX9310_REG_PROX_CTRL2_COMBMODE_CS1_CS2 (0x02 << 6)
56#define SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1 (0x01 << 6)
57#define SX9310_REG_PROX_CTRL2_COMBMODE_CS3 (0x00 << 6)
58#define SX9310_REG_PROX_CTRL2_SHIELDEN_MASK GENMASK(3, 2)
59#define SX9310_REG_PROX_CTRL2_SHIELDEN_DYNAMIC (0x01 << 2)
60#define SX9310_REG_PROX_CTRL2_SHIELDEN_GROUND (0x02 << 2)
61#define SX9310_REG_PROX_CTRL3 0x13
62#define SX9310_REG_PROX_CTRL3_GAIN0_MASK GENMASK(3, 2)
63#define SX9310_REG_PROX_CTRL3_GAIN0_X8 (0x03 << 2)
64#define SX9310_REG_PROX_CTRL3_GAIN12_MASK GENMASK(1, 0)
65#define SX9310_REG_PROX_CTRL3_GAIN12_X4 0x02
66#define SX9310_REG_PROX_CTRL4 0x14
67#define SX9310_REG_PROX_CTRL4_RESOLUTION_MASK GENMASK(2, 0)
68#define SX9310_REG_PROX_CTRL4_RESOLUTION_FINEST 0x07
69#define SX9310_REG_PROX_CTRL4_RESOLUTION_VERY_FINE 0x06
70#define SX9310_REG_PROX_CTRL4_RESOLUTION_FINE 0x05
71#define SX9310_REG_PROX_CTRL4_RESOLUTION_MEDIUM 0x04
72#define SX9310_REG_PROX_CTRL4_RESOLUTION_MEDIUM_COARSE 0x03
73#define SX9310_REG_PROX_CTRL4_RESOLUTION_COARSE 0x02
74#define SX9310_REG_PROX_CTRL4_RESOLUTION_VERY_COARSE 0x01
75#define SX9310_REG_PROX_CTRL4_RESOLUTION_COARSEST 0x00
76#define SX9310_REG_PROX_CTRL5 0x15
77#define SX9310_REG_PROX_CTRL5_RANGE_SMALL (0x03 << 6)
78#define SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK GENMASK(3, 2)
79#define SX9310_REG_PROX_CTRL5_STARTUPSENS_CS1 (0x01 << 2)
80#define SX9310_REG_PROX_CTRL5_RAWFILT_MASK GENMASK(1, 0)
81#define SX9310_REG_PROX_CTRL5_RAWFILT_SHIFT 0
82#define SX9310_REG_PROX_CTRL5_RAWFILT_1P25 0x02
83#define SX9310_REG_PROX_CTRL6 0x16
84#define SX9310_REG_PROX_CTRL6_AVGTHRESH_DEFAULT 0x20
85#define SX9310_REG_PROX_CTRL7 0x17
86#define SX9310_REG_PROX_CTRL7_AVGNEGFILT_2 (0x01 << 3)
87#define SX9310_REG_PROX_CTRL7_AVGPOSFILT_MASK GENMASK(2, 0)
88#define SX9310_REG_PROX_CTRL7_AVGPOSFILT_SHIFT 0
89#define SX9310_REG_PROX_CTRL7_AVGPOSFILT_512 0x05
90#define SX9310_REG_PROX_CTRL8 0x18
91#define SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK GENMASK(7, 3)
92#define SX9310_REG_PROX_CTRL9 0x19
93#define SX9310_REG_PROX_CTRL8_9_PTHRESH_28 (0x08 << 3)
94#define SX9310_REG_PROX_CTRL8_9_PTHRESH_96 (0x11 << 3)
95#define SX9310_REG_PROX_CTRL8_9_BODYTHRESH_900 0x03
96#define SX9310_REG_PROX_CTRL8_9_BODYTHRESH_1500 0x05
97#define SX9310_REG_PROX_CTRL10 0x1a
98#define SX9310_REG_PROX_CTRL10_HYST_MASK GENMASK(5, 4)
99#define SX9310_REG_PROX_CTRL10_HYST_6PCT (0x01 << 4)
100#define SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK GENMASK(3, 2)
101#define SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK GENMASK(1, 0)
102#define SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_2 0x01
103#define SX9310_REG_PROX_CTRL11 0x1b
104#define SX9310_REG_PROX_CTRL12 0x1c
105#define SX9310_REG_PROX_CTRL13 0x1d
106#define SX9310_REG_PROX_CTRL14 0x1e
107#define SX9310_REG_PROX_CTRL15 0x1f
108#define SX9310_REG_PROX_CTRL16 0x20
109#define SX9310_REG_PROX_CTRL17 0x21
110#define SX9310_REG_PROX_CTRL18 0x22
111#define SX9310_REG_PROX_CTRL19 0x23
112#define SX9310_REG_SAR_CTRL0 0x2a
113#define SX9310_REG_SAR_CTRL0_SARDEB_4_SAMPLES (0x02 << 5)
114#define SX9310_REG_SAR_CTRL0_SARHYST_8 (0x02 << 3)
115#define SX9310_REG_SAR_CTRL1 0x2b
116
117#define SX9310_REG_SAR_CTRL1_SLOPE(_hnslope) (_hnslope / 78125)
118#define SX9310_REG_SAR_CTRL2 0x2c
119#define SX9310_REG_SAR_CTRL2_SAROFFSET_DEFAULT 0x3c
120
121#define SX9310_REG_SENSOR_SEL 0x30
122#define SX9310_REG_USE_MSB 0x31
123#define SX9310_REG_USE_LSB 0x32
124#define SX9310_REG_AVG_MSB 0x33
125#define SX9310_REG_AVG_LSB 0x34
126#define SX9310_REG_DIFF_MSB 0x35
127#define SX9310_REG_DIFF_LSB 0x36
128#define SX9310_REG_OFFSET_MSB 0x37
129#define SX9310_REG_OFFSET_LSB 0x38
130#define SX9310_REG_SAR_MSB 0x39
131#define SX9310_REG_SAR_LSB 0x3a
132#define SX9310_REG_I2C_ADDR 0x40
133#define SX9310_REG_PAUSE 0x41
134#define SX9310_REG_WHOAMI 0x42
135#define SX9310_WHOAMI_VALUE 0x01
136#define SX9311_WHOAMI_VALUE 0x02
137#define SX9310_REG_RESET 0x7f
138#define SX9310_SOFT_RESET 0xde
139
140
141
142#define SX9310_NUM_CHANNELS 4
143static_assert(SX9310_NUM_CHANNELS < BITS_PER_LONG);
144
145struct sx9310_data {
146
147 struct mutex mutex;
148 struct i2c_client *client;
149 struct iio_trigger *trig;
150 struct regmap *regmap;
151 struct regulator_bulk_data supplies[2];
152
153
154
155
156 unsigned long chan_prox_stat;
157 bool trigger_enabled;
158
159 struct {
160 __be16 channels[SX9310_NUM_CHANNELS];
161 s64 ts __aligned(8);
162 } buffer;
163
164 unsigned int suspend_ctrl0;
165 struct completion completion;
166 unsigned long chan_read;
167 unsigned long chan_event;
168 unsigned int whoami;
169};
170
171static const struct iio_event_spec sx9310_events[] = {
172 {
173 .type = IIO_EV_TYPE_THRESH,
174 .dir = IIO_EV_DIR_RISING,
175 .mask_shared_by_all = BIT(IIO_EV_INFO_PERIOD),
176 },
177 {
178 .type = IIO_EV_TYPE_THRESH,
179 .dir = IIO_EV_DIR_FALLING,
180 .mask_shared_by_all = BIT(IIO_EV_INFO_PERIOD),
181 },
182 {
183 .type = IIO_EV_TYPE_THRESH,
184 .dir = IIO_EV_DIR_EITHER,
185 .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
186 BIT(IIO_EV_INFO_HYSTERESIS) |
187 BIT(IIO_EV_INFO_VALUE),
188 },
189};
190
191#define SX9310_NAMED_CHANNEL(idx, name) \
192 { \
193 .type = IIO_PROXIMITY, \
194 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
195 BIT(IIO_CHAN_INFO_HARDWAREGAIN), \
196 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
197 .info_mask_separate_available = \
198 BIT(IIO_CHAN_INFO_HARDWAREGAIN), \
199 .indexed = 1, \
200 .channel = idx, \
201 .extend_name = name, \
202 .address = SX9310_REG_DIFF_MSB, \
203 .event_spec = sx9310_events, \
204 .num_event_specs = ARRAY_SIZE(sx9310_events), \
205 .scan_index = idx, \
206 .scan_type = { \
207 .sign = 's', \
208 .realbits = 12, \
209 .storagebits = 16, \
210 .endianness = IIO_BE, \
211 }, \
212 }
213#define SX9310_CHANNEL(idx) SX9310_NAMED_CHANNEL(idx, NULL)
214
215static const struct iio_chan_spec sx9310_channels[] = {
216 SX9310_CHANNEL(0),
217 SX9310_CHANNEL(1),
218 SX9310_CHANNEL(2),
219 SX9310_NAMED_CHANNEL(3, "comb"),
220
221 IIO_CHAN_SOFT_TIMESTAMP(4),
222};
223
224
225
226
227
228static const struct {
229 int val;
230 int val2;
231} sx9310_samp_freq_table[] = {
232 { 500, 0 },
233 { 66, 666666 },
234 { 33, 333333 },
235 { 22, 222222 },
236 { 16, 666666 },
237 { 11, 111111 },
238 { 8, 333333 },
239 { 5, 0 },
240 { 2, 500000 },
241 { 1, 666666 },
242 { 1, 250000 },
243 { 1, 0 },
244 { 0, 500000 },
245 { 0, 333333 },
246 { 0, 250000 },
247 { 0, 200000 },
248};
249static const unsigned int sx9310_scan_period_table[] = {
250 2, 15, 30, 45, 60, 90, 120, 200,
251 400, 600, 800, 1000, 2000, 3000, 4000, 5000,
252};
253
254static ssize_t sx9310_show_samp_freq_avail(struct device *dev,
255 struct device_attribute *attr,
256 char *buf)
257{
258 size_t len = 0;
259 int i;
260
261 for (i = 0; i < ARRAY_SIZE(sx9310_samp_freq_table); i++)
262 len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%d ",
263 sx9310_samp_freq_table[i].val,
264 sx9310_samp_freq_table[i].val2);
265 buf[len - 1] = '\n';
266 return len;
267}
268static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(sx9310_show_samp_freq_avail);
269
270static const struct regmap_range sx9310_writable_reg_ranges[] = {
271 regmap_reg_range(SX9310_REG_IRQ_MSK, SX9310_REG_IRQ_FUNC),
272 regmap_reg_range(SX9310_REG_PROX_CTRL0, SX9310_REG_PROX_CTRL19),
273 regmap_reg_range(SX9310_REG_SAR_CTRL0, SX9310_REG_SAR_CTRL2),
274 regmap_reg_range(SX9310_REG_SENSOR_SEL, SX9310_REG_SENSOR_SEL),
275 regmap_reg_range(SX9310_REG_OFFSET_MSB, SX9310_REG_OFFSET_LSB),
276 regmap_reg_range(SX9310_REG_PAUSE, SX9310_REG_PAUSE),
277 regmap_reg_range(SX9310_REG_RESET, SX9310_REG_RESET),
278};
279
280static const struct regmap_access_table sx9310_writeable_regs = {
281 .yes_ranges = sx9310_writable_reg_ranges,
282 .n_yes_ranges = ARRAY_SIZE(sx9310_writable_reg_ranges),
283};
284
285static const struct regmap_range sx9310_readable_reg_ranges[] = {
286 regmap_reg_range(SX9310_REG_IRQ_SRC, SX9310_REG_IRQ_FUNC),
287 regmap_reg_range(SX9310_REG_PROX_CTRL0, SX9310_REG_PROX_CTRL19),
288 regmap_reg_range(SX9310_REG_SAR_CTRL0, SX9310_REG_SAR_CTRL2),
289 regmap_reg_range(SX9310_REG_SENSOR_SEL, SX9310_REG_SAR_LSB),
290 regmap_reg_range(SX9310_REG_I2C_ADDR, SX9310_REG_WHOAMI),
291 regmap_reg_range(SX9310_REG_RESET, SX9310_REG_RESET),
292};
293
294static const struct regmap_access_table sx9310_readable_regs = {
295 .yes_ranges = sx9310_readable_reg_ranges,
296 .n_yes_ranges = ARRAY_SIZE(sx9310_readable_reg_ranges),
297};
298
299static const struct regmap_range sx9310_volatile_reg_ranges[] = {
300 regmap_reg_range(SX9310_REG_IRQ_SRC, SX9310_REG_STAT1),
301 regmap_reg_range(SX9310_REG_USE_MSB, SX9310_REG_DIFF_LSB),
302 regmap_reg_range(SX9310_REG_SAR_MSB, SX9310_REG_SAR_LSB),
303 regmap_reg_range(SX9310_REG_RESET, SX9310_REG_RESET),
304};
305
306static const struct regmap_access_table sx9310_volatile_regs = {
307 .yes_ranges = sx9310_volatile_reg_ranges,
308 .n_yes_ranges = ARRAY_SIZE(sx9310_volatile_reg_ranges),
309};
310
311static const struct regmap_config sx9310_regmap_config = {
312 .reg_bits = 8,
313 .val_bits = 8,
314
315 .max_register = SX9310_REG_RESET,
316 .cache_type = REGCACHE_RBTREE,
317
318 .wr_table = &sx9310_writeable_regs,
319 .rd_table = &sx9310_readable_regs,
320 .volatile_table = &sx9310_volatile_regs,
321};
322
323static int sx9310_update_chan_en(struct sx9310_data *data,
324 unsigned long chan_read,
325 unsigned long chan_event)
326{
327 int ret;
328 unsigned long channels = chan_read | chan_event;
329
330 if ((data->chan_read | data->chan_event) != channels) {
331 ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL0,
332 SX9310_REG_PROX_CTRL0_SENSOREN_MASK,
333 channels);
334 if (ret)
335 return ret;
336 }
337 data->chan_read = chan_read;
338 data->chan_event = chan_event;
339 return 0;
340}
341
342static int sx9310_get_read_channel(struct sx9310_data *data, int channel)
343{
344 return sx9310_update_chan_en(data, data->chan_read | BIT(channel),
345 data->chan_event);
346}
347
348static int sx9310_put_read_channel(struct sx9310_data *data, int channel)
349{
350 return sx9310_update_chan_en(data, data->chan_read & ~BIT(channel),
351 data->chan_event);
352}
353
354static int sx9310_get_event_channel(struct sx9310_data *data, int channel)
355{
356 return sx9310_update_chan_en(data, data->chan_read,
357 data->chan_event | BIT(channel));
358}
359
360static int sx9310_put_event_channel(struct sx9310_data *data, int channel)
361{
362 return sx9310_update_chan_en(data, data->chan_read,
363 data->chan_event & ~BIT(channel));
364}
365
366static int sx9310_enable_irq(struct sx9310_data *data, unsigned int irq)
367{
368 if (!data->client->irq)
369 return 0;
370 return regmap_update_bits(data->regmap, SX9310_REG_IRQ_MSK, irq, irq);
371}
372
373static int sx9310_disable_irq(struct sx9310_data *data, unsigned int irq)
374{
375 if (!data->client->irq)
376 return 0;
377 return regmap_update_bits(data->regmap, SX9310_REG_IRQ_MSK, irq, 0);
378}
379
380static int sx9310_read_prox_data(struct sx9310_data *data,
381 const struct iio_chan_spec *chan, __be16 *val)
382{
383 int ret;
384
385 ret = regmap_write(data->regmap, SX9310_REG_SENSOR_SEL, chan->channel);
386 if (ret)
387 return ret;
388
389 return regmap_bulk_read(data->regmap, chan->address, val, sizeof(*val));
390}
391
392
393
394
395
396static int sx9310_wait_for_sample(struct sx9310_data *data)
397{
398 int ret;
399 unsigned int val;
400
401 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &val);
402 if (ret)
403 return ret;
404
405 val = FIELD_GET(SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, val);
406
407 msleep(sx9310_scan_period_table[val]);
408
409 return 0;
410}
411
412static int sx9310_read_proximity(struct sx9310_data *data,
413 const struct iio_chan_spec *chan, int *val)
414{
415 int ret;
416 __be16 rawval;
417
418 mutex_lock(&data->mutex);
419
420 ret = sx9310_get_read_channel(data, chan->channel);
421 if (ret)
422 goto out;
423
424 ret = sx9310_enable_irq(data, SX9310_CONVDONE_IRQ);
425 if (ret)
426 goto out_put_channel;
427
428 mutex_unlock(&data->mutex);
429
430 if (data->client->irq) {
431 ret = wait_for_completion_interruptible(&data->completion);
432 reinit_completion(&data->completion);
433 } else {
434 ret = sx9310_wait_for_sample(data);
435 }
436
437 mutex_lock(&data->mutex);
438
439 if (ret)
440 goto out_disable_irq;
441
442 ret = sx9310_read_prox_data(data, chan, &rawval);
443 if (ret)
444 goto out_disable_irq;
445
446 *val = sign_extend32(be16_to_cpu(rawval),
447 chan->address == SX9310_REG_DIFF_MSB ? 11 : 15);
448
449 ret = sx9310_disable_irq(data, SX9310_CONVDONE_IRQ);
450 if (ret)
451 goto out_put_channel;
452
453 ret = sx9310_put_read_channel(data, chan->channel);
454 if (ret)
455 goto out;
456
457 mutex_unlock(&data->mutex);
458
459 return IIO_VAL_INT;
460
461out_disable_irq:
462 sx9310_disable_irq(data, SX9310_CONVDONE_IRQ);
463out_put_channel:
464 sx9310_put_read_channel(data, chan->channel);
465out:
466 mutex_unlock(&data->mutex);
467
468 return ret;
469}
470
471static int sx9310_read_gain(struct sx9310_data *data,
472 const struct iio_chan_spec *chan, int *val)
473{
474 unsigned int regval, gain;
475 int ret;
476
477 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL3, ®val);
478 if (ret)
479 return ret;
480
481 switch (chan->channel) {
482 case 0:
483 case 3:
484 gain = FIELD_GET(SX9310_REG_PROX_CTRL3_GAIN0_MASK, regval);
485 break;
486 case 1:
487 case 2:
488 gain = FIELD_GET(SX9310_REG_PROX_CTRL3_GAIN12_MASK, regval);
489 break;
490 default:
491 return -EINVAL;
492 }
493
494 *val = 1 << gain;
495
496 return IIO_VAL_INT;
497}
498
499static int sx9310_read_samp_freq(struct sx9310_data *data, int *val, int *val2)
500{
501 unsigned int regval;
502 int ret;
503
504 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, ®val);
505 if (ret)
506 return ret;
507
508 regval = FIELD_GET(SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, regval);
509 *val = sx9310_samp_freq_table[regval].val;
510 *val2 = sx9310_samp_freq_table[regval].val2;
511
512 return IIO_VAL_INT_PLUS_MICRO;
513}
514
515static int sx9310_read_raw(struct iio_dev *indio_dev,
516 const struct iio_chan_spec *chan, int *val,
517 int *val2, long mask)
518{
519 struct sx9310_data *data = iio_priv(indio_dev);
520 int ret;
521
522 if (chan->type != IIO_PROXIMITY)
523 return -EINVAL;
524
525 switch (mask) {
526 case IIO_CHAN_INFO_RAW:
527 ret = iio_device_claim_direct_mode(indio_dev);
528 if (ret)
529 return ret;
530
531 ret = sx9310_read_proximity(data, chan, val);
532 iio_device_release_direct_mode(indio_dev);
533 return ret;
534 case IIO_CHAN_INFO_HARDWAREGAIN:
535 ret = iio_device_claim_direct_mode(indio_dev);
536 if (ret)
537 return ret;
538
539 ret = sx9310_read_gain(data, chan, val);
540 iio_device_release_direct_mode(indio_dev);
541 return ret;
542 case IIO_CHAN_INFO_SAMP_FREQ:
543 return sx9310_read_samp_freq(data, val, val2);
544 default:
545 return -EINVAL;
546 }
547}
548
549static const int sx9310_gain_vals[] = { 1, 2, 4, 8 };
550
551static int sx9310_read_avail(struct iio_dev *indio_dev,
552 struct iio_chan_spec const *chan,
553 const int **vals, int *type, int *length,
554 long mask)
555{
556 if (chan->type != IIO_PROXIMITY)
557 return -EINVAL;
558
559 switch (mask) {
560 case IIO_CHAN_INFO_HARDWAREGAIN:
561 *type = IIO_VAL_INT;
562 *length = ARRAY_SIZE(sx9310_gain_vals);
563 *vals = sx9310_gain_vals;
564 return IIO_AVAIL_LIST;
565 }
566
567 return -EINVAL;
568}
569
570static const unsigned int sx9310_pthresh_codes[] = {
571 2, 4, 6, 8, 12, 16, 20, 24, 28, 32, 40, 48, 56, 64, 72, 80, 88, 96, 112,
572 128, 144, 160, 192, 224, 256, 320, 384, 512, 640, 768, 1024, 1536
573};
574
575static int sx9310_get_thresh_reg(unsigned int channel)
576{
577 switch (channel) {
578 case 0:
579 case 3:
580 return SX9310_REG_PROX_CTRL8;
581 case 1:
582 case 2:
583 return SX9310_REG_PROX_CTRL9;
584 }
585
586 return -EINVAL;
587}
588
589static int sx9310_read_thresh(struct sx9310_data *data,
590 const struct iio_chan_spec *chan, int *val)
591{
592 unsigned int reg;
593 unsigned int regval;
594 int ret;
595
596 reg = ret = sx9310_get_thresh_reg(chan->channel);
597 if (ret < 0)
598 return ret;
599
600 ret = regmap_read(data->regmap, reg, ®val);
601 if (ret)
602 return ret;
603
604 regval = FIELD_GET(SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK, regval);
605 if (regval >= ARRAY_SIZE(sx9310_pthresh_codes))
606 return -EINVAL;
607
608 *val = sx9310_pthresh_codes[regval];
609 return IIO_VAL_INT;
610}
611
612static int sx9310_read_hysteresis(struct sx9310_data *data,
613 const struct iio_chan_spec *chan, int *val)
614{
615 unsigned int regval, pthresh;
616 int ret;
617
618 ret = sx9310_read_thresh(data, chan, &pthresh);
619 if (ret < 0)
620 return ret;
621
622 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL10, ®val);
623 if (ret)
624 return ret;
625
626 regval = FIELD_GET(SX9310_REG_PROX_CTRL10_HYST_MASK, regval);
627 if (!regval)
628 regval = 5;
629
630
631 *val = pthresh >> (5 - regval);
632
633 return IIO_VAL_INT;
634}
635
636static int sx9310_read_far_debounce(struct sx9310_data *data, int *val)
637{
638 unsigned int regval;
639 int ret;
640
641 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL10, ®val);
642 if (ret)
643 return ret;
644
645 regval = FIELD_GET(SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK, regval);
646 if (regval)
647 *val = 1 << regval;
648 else
649 *val = 0;
650
651 return IIO_VAL_INT;
652}
653
654static int sx9310_read_close_debounce(struct sx9310_data *data, int *val)
655{
656 unsigned int regval;
657 int ret;
658
659 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL10, ®val);
660 if (ret)
661 return ret;
662
663 regval = FIELD_GET(SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK, regval);
664 if (regval)
665 *val = 1 << regval;
666 else
667 *val = 0;
668
669 return IIO_VAL_INT;
670}
671
672static int sx9310_read_event_val(struct iio_dev *indio_dev,
673 const struct iio_chan_spec *chan,
674 enum iio_event_type type,
675 enum iio_event_direction dir,
676 enum iio_event_info info, int *val, int *val2)
677{
678 struct sx9310_data *data = iio_priv(indio_dev);
679
680 if (chan->type != IIO_PROXIMITY)
681 return -EINVAL;
682
683 switch (info) {
684 case IIO_EV_INFO_VALUE:
685 return sx9310_read_thresh(data, chan, val);
686 case IIO_EV_INFO_PERIOD:
687 switch (dir) {
688 case IIO_EV_DIR_RISING:
689 return sx9310_read_far_debounce(data, val);
690 case IIO_EV_DIR_FALLING:
691 return sx9310_read_close_debounce(data, val);
692 default:
693 return -EINVAL;
694 }
695 case IIO_EV_INFO_HYSTERESIS:
696 return sx9310_read_hysteresis(data, chan, val);
697 default:
698 return -EINVAL;
699 }
700}
701
702static int sx9310_write_thresh(struct sx9310_data *data,
703 const struct iio_chan_spec *chan, int val)
704{
705 unsigned int reg;
706 unsigned int regval;
707 int ret, i;
708
709 reg = ret = sx9310_get_thresh_reg(chan->channel);
710 if (ret < 0)
711 return ret;
712
713 for (i = 0; i < ARRAY_SIZE(sx9310_pthresh_codes); i++) {
714 if (sx9310_pthresh_codes[i] == val) {
715 regval = i;
716 break;
717 }
718 }
719
720 if (i == ARRAY_SIZE(sx9310_pthresh_codes))
721 return -EINVAL;
722
723 regval = FIELD_PREP(SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK, regval);
724 mutex_lock(&data->mutex);
725 ret = regmap_update_bits(data->regmap, reg,
726 SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK, regval);
727 mutex_unlock(&data->mutex);
728
729 return ret;
730}
731
732static int sx9310_write_hysteresis(struct sx9310_data *data,
733 const struct iio_chan_spec *chan, int _val)
734{
735 unsigned int hyst, val = _val;
736 int ret, pthresh;
737
738 ret = sx9310_read_thresh(data, chan, &pthresh);
739 if (ret < 0)
740 return ret;
741
742 if (val == 0)
743 hyst = 0;
744 else if (val == pthresh >> 2)
745 hyst = 3;
746 else if (val == pthresh >> 3)
747 hyst = 2;
748 else if (val == pthresh >> 4)
749 hyst = 1;
750 else
751 return -EINVAL;
752
753 hyst = FIELD_PREP(SX9310_REG_PROX_CTRL10_HYST_MASK, hyst);
754 mutex_lock(&data->mutex);
755 ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL10,
756 SX9310_REG_PROX_CTRL10_HYST_MASK, hyst);
757 mutex_unlock(&data->mutex);
758
759 return ret;
760}
761
762static int sx9310_write_far_debounce(struct sx9310_data *data, int val)
763{
764 int ret;
765 unsigned int regval;
766
767 if (val > 0)
768 val = ilog2(val);
769 if (!FIELD_FIT(SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK, val))
770 return -EINVAL;
771
772 regval = FIELD_PREP(SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK, val);
773
774 mutex_lock(&data->mutex);
775 ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL10,
776 SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK,
777 regval);
778 mutex_unlock(&data->mutex);
779
780 return ret;
781}
782
783static int sx9310_write_close_debounce(struct sx9310_data *data, int val)
784{
785 int ret;
786 unsigned int regval;
787
788 if (val > 0)
789 val = ilog2(val);
790 if (!FIELD_FIT(SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK, val))
791 return -EINVAL;
792
793 regval = FIELD_PREP(SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK, val);
794
795 mutex_lock(&data->mutex);
796 ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL10,
797 SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK,
798 regval);
799 mutex_unlock(&data->mutex);
800
801 return ret;
802}
803
804static int sx9310_write_event_val(struct iio_dev *indio_dev,
805 const struct iio_chan_spec *chan,
806 enum iio_event_type type,
807 enum iio_event_direction dir,
808 enum iio_event_info info, int val, int val2)
809{
810 struct sx9310_data *data = iio_priv(indio_dev);
811
812 if (chan->type != IIO_PROXIMITY)
813 return -EINVAL;
814
815 switch (info) {
816 case IIO_EV_INFO_VALUE:
817 return sx9310_write_thresh(data, chan, val);
818 case IIO_EV_INFO_PERIOD:
819 switch (dir) {
820 case IIO_EV_DIR_RISING:
821 return sx9310_write_far_debounce(data, val);
822 case IIO_EV_DIR_FALLING:
823 return sx9310_write_close_debounce(data, val);
824 default:
825 return -EINVAL;
826 }
827 case IIO_EV_INFO_HYSTERESIS:
828 return sx9310_write_hysteresis(data, chan, val);
829 default:
830 return -EINVAL;
831 }
832}
833
834static int sx9310_set_samp_freq(struct sx9310_data *data, int val, int val2)
835{
836 int i, ret;
837
838 for (i = 0; i < ARRAY_SIZE(sx9310_samp_freq_table); i++)
839 if (val == sx9310_samp_freq_table[i].val &&
840 val2 == sx9310_samp_freq_table[i].val2)
841 break;
842
843 if (i == ARRAY_SIZE(sx9310_samp_freq_table))
844 return -EINVAL;
845
846 mutex_lock(&data->mutex);
847
848 ret = regmap_update_bits(
849 data->regmap, SX9310_REG_PROX_CTRL0,
850 SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK,
851 FIELD_PREP(SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, i));
852
853 mutex_unlock(&data->mutex);
854
855 return ret;
856}
857
858static int sx9310_write_gain(struct sx9310_data *data,
859 const struct iio_chan_spec *chan, int val)
860{
861 unsigned int gain, mask;
862 int ret;
863
864 gain = ilog2(val);
865
866 switch (chan->channel) {
867 case 0:
868 case 3:
869 mask = SX9310_REG_PROX_CTRL3_GAIN0_MASK;
870 gain = FIELD_PREP(SX9310_REG_PROX_CTRL3_GAIN0_MASK, gain);
871 break;
872 case 1:
873 case 2:
874 mask = SX9310_REG_PROX_CTRL3_GAIN12_MASK;
875 gain = FIELD_PREP(SX9310_REG_PROX_CTRL3_GAIN12_MASK, gain);
876 break;
877 default:
878 return -EINVAL;
879 }
880
881 mutex_lock(&data->mutex);
882 ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL3, mask,
883 gain);
884 mutex_unlock(&data->mutex);
885
886 return ret;
887}
888
889static int sx9310_write_raw(struct iio_dev *indio_dev,
890 const struct iio_chan_spec *chan, int val, int val2,
891 long mask)
892{
893 struct sx9310_data *data = iio_priv(indio_dev);
894
895 if (chan->type != IIO_PROXIMITY)
896 return -EINVAL;
897
898 switch (mask) {
899 case IIO_CHAN_INFO_SAMP_FREQ:
900 return sx9310_set_samp_freq(data, val, val2);
901 case IIO_CHAN_INFO_HARDWAREGAIN:
902 return sx9310_write_gain(data, chan, val);
903 }
904
905 return -EINVAL;
906}
907
908static irqreturn_t sx9310_irq_handler(int irq, void *private)
909{
910 struct iio_dev *indio_dev = private;
911 struct sx9310_data *data = iio_priv(indio_dev);
912
913 if (data->trigger_enabled)
914 iio_trigger_poll(data->trig);
915
916
917
918
919
920
921 return IRQ_WAKE_THREAD;
922}
923
924static void sx9310_push_events(struct iio_dev *indio_dev)
925{
926 int ret;
927 unsigned int val, chan;
928 struct sx9310_data *data = iio_priv(indio_dev);
929 s64 timestamp = iio_get_time_ns(indio_dev);
930 unsigned long prox_changed;
931
932
933 ret = regmap_read(data->regmap, SX9310_REG_STAT0, &val);
934 if (ret) {
935 dev_err(&data->client->dev, "i2c transfer error in irq\n");
936 return;
937 }
938
939
940
941
942
943 prox_changed = (data->chan_prox_stat ^ val) & data->chan_event;
944
945 for_each_set_bit(chan, &prox_changed, SX9310_NUM_CHANNELS) {
946 int dir;
947 u64 ev;
948
949 dir = (val & BIT(chan)) ? IIO_EV_DIR_FALLING : IIO_EV_DIR_RISING;
950 ev = IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, chan,
951 IIO_EV_TYPE_THRESH, dir);
952
953 iio_push_event(indio_dev, ev, timestamp);
954 }
955 data->chan_prox_stat = val;
956}
957
958static irqreturn_t sx9310_irq_thread_handler(int irq, void *private)
959{
960 struct iio_dev *indio_dev = private;
961 struct sx9310_data *data = iio_priv(indio_dev);
962 int ret;
963 unsigned int val;
964
965 mutex_lock(&data->mutex);
966
967 ret = regmap_read(data->regmap, SX9310_REG_IRQ_SRC, &val);
968 if (ret) {
969 dev_err(&data->client->dev, "i2c transfer error in irq\n");
970 goto out;
971 }
972
973 if (val & (SX9310_FAR_IRQ | SX9310_CLOSE_IRQ))
974 sx9310_push_events(indio_dev);
975
976 if (val & SX9310_CONVDONE_IRQ)
977 complete(&data->completion);
978
979out:
980 mutex_unlock(&data->mutex);
981
982 return IRQ_HANDLED;
983}
984
985static int sx9310_read_event_config(struct iio_dev *indio_dev,
986 const struct iio_chan_spec *chan,
987 enum iio_event_type type,
988 enum iio_event_direction dir)
989{
990 struct sx9310_data *data = iio_priv(indio_dev);
991
992 return !!(data->chan_event & BIT(chan->channel));
993}
994
995static int sx9310_write_event_config(struct iio_dev *indio_dev,
996 const struct iio_chan_spec *chan,
997 enum iio_event_type type,
998 enum iio_event_direction dir, int state)
999{
1000 struct sx9310_data *data = iio_priv(indio_dev);
1001 unsigned int eventirq = SX9310_FAR_IRQ | SX9310_CLOSE_IRQ;
1002 int ret;
1003
1004
1005 if (!!(data->chan_event & BIT(chan->channel)) == state)
1006 return 0;
1007
1008 mutex_lock(&data->mutex);
1009 if (state) {
1010 ret = sx9310_get_event_channel(data, chan->channel);
1011 if (ret)
1012 goto out_unlock;
1013 if (!(data->chan_event & ~BIT(chan->channel))) {
1014 ret = sx9310_enable_irq(data, eventirq);
1015 if (ret)
1016 sx9310_put_event_channel(data, chan->channel);
1017 }
1018 } else {
1019 ret = sx9310_put_event_channel(data, chan->channel);
1020 if (ret)
1021 goto out_unlock;
1022 if (!data->chan_event) {
1023 ret = sx9310_disable_irq(data, eventirq);
1024 if (ret)
1025 sx9310_get_event_channel(data, chan->channel);
1026 }
1027 }
1028
1029out_unlock:
1030 mutex_unlock(&data->mutex);
1031 return ret;
1032}
1033
1034static struct attribute *sx9310_attributes[] = {
1035 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
1036 NULL
1037};
1038
1039static const struct attribute_group sx9310_attribute_group = {
1040 .attrs = sx9310_attributes,
1041};
1042
1043static const struct iio_info sx9310_info = {
1044 .attrs = &sx9310_attribute_group,
1045 .read_raw = sx9310_read_raw,
1046 .read_avail = sx9310_read_avail,
1047 .read_event_value = sx9310_read_event_val,
1048 .write_event_value = sx9310_write_event_val,
1049 .write_raw = sx9310_write_raw,
1050 .read_event_config = sx9310_read_event_config,
1051 .write_event_config = sx9310_write_event_config,
1052};
1053
1054static int sx9310_set_trigger_state(struct iio_trigger *trig, bool state)
1055{
1056 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1057 struct sx9310_data *data = iio_priv(indio_dev);
1058 int ret = 0;
1059
1060 mutex_lock(&data->mutex);
1061
1062 if (state)
1063 ret = sx9310_enable_irq(data, SX9310_CONVDONE_IRQ);
1064 else if (!data->chan_read)
1065 ret = sx9310_disable_irq(data, SX9310_CONVDONE_IRQ);
1066 if (ret)
1067 goto out;
1068
1069 data->trigger_enabled = state;
1070
1071out:
1072 mutex_unlock(&data->mutex);
1073
1074 return ret;
1075}
1076
1077static const struct iio_trigger_ops sx9310_trigger_ops = {
1078 .set_trigger_state = sx9310_set_trigger_state,
1079};
1080
1081static irqreturn_t sx9310_trigger_handler(int irq, void *private)
1082{
1083 struct iio_poll_func *pf = private;
1084 struct iio_dev *indio_dev = pf->indio_dev;
1085 struct sx9310_data *data = iio_priv(indio_dev);
1086 __be16 val;
1087 int bit, ret, i = 0;
1088
1089 mutex_lock(&data->mutex);
1090
1091 for_each_set_bit(bit, indio_dev->active_scan_mask,
1092 indio_dev->masklength) {
1093 ret = sx9310_read_prox_data(data, &indio_dev->channels[bit],
1094 &val);
1095 if (ret)
1096 goto out;
1097
1098 data->buffer.channels[i++] = val;
1099 }
1100
1101 iio_push_to_buffers_with_timestamp(indio_dev, &data->buffer,
1102 pf->timestamp);
1103
1104out:
1105 mutex_unlock(&data->mutex);
1106
1107 iio_trigger_notify_done(indio_dev->trig);
1108
1109 return IRQ_HANDLED;
1110}
1111
1112static int sx9310_buffer_preenable(struct iio_dev *indio_dev)
1113{
1114 struct sx9310_data *data = iio_priv(indio_dev);
1115 unsigned long channels = 0;
1116 int bit, ret;
1117
1118 mutex_lock(&data->mutex);
1119 for_each_set_bit(bit, indio_dev->active_scan_mask,
1120 indio_dev->masklength)
1121 __set_bit(indio_dev->channels[bit].channel, &channels);
1122
1123 ret = sx9310_update_chan_en(data, channels, data->chan_event);
1124 mutex_unlock(&data->mutex);
1125 return ret;
1126}
1127
1128static int sx9310_buffer_postdisable(struct iio_dev *indio_dev)
1129{
1130 struct sx9310_data *data = iio_priv(indio_dev);
1131 int ret;
1132
1133 mutex_lock(&data->mutex);
1134 ret = sx9310_update_chan_en(data, 0, data->chan_event);
1135 mutex_unlock(&data->mutex);
1136 return ret;
1137}
1138
1139static const struct iio_buffer_setup_ops sx9310_buffer_setup_ops = {
1140 .preenable = sx9310_buffer_preenable,
1141 .postdisable = sx9310_buffer_postdisable,
1142};
1143
1144struct sx9310_reg_default {
1145 u8 reg;
1146 u8 def;
1147};
1148
1149static const struct sx9310_reg_default sx9310_default_regs[] = {
1150 { SX9310_REG_IRQ_MSK, 0x00 },
1151 { SX9310_REG_IRQ_FUNC, 0x00 },
1152
1153
1154
1155
1156
1157 { SX9310_REG_PROX_CTRL0, SX9310_REG_PROX_CTRL0_SCANPERIOD_15MS },
1158 { SX9310_REG_PROX_CTRL1, 0x00 },
1159 { SX9310_REG_PROX_CTRL2, SX9310_REG_PROX_CTRL2_COMBMODE_CS1_CS2 |
1160 SX9310_REG_PROX_CTRL2_SHIELDEN_DYNAMIC },
1161 { SX9310_REG_PROX_CTRL3, SX9310_REG_PROX_CTRL3_GAIN0_X8 |
1162 SX9310_REG_PROX_CTRL3_GAIN12_X4 },
1163 { SX9310_REG_PROX_CTRL4, SX9310_REG_PROX_CTRL4_RESOLUTION_FINEST },
1164 { SX9310_REG_PROX_CTRL5, SX9310_REG_PROX_CTRL5_RANGE_SMALL |
1165 SX9310_REG_PROX_CTRL5_STARTUPSENS_CS1 |
1166 SX9310_REG_PROX_CTRL5_RAWFILT_1P25 },
1167 { SX9310_REG_PROX_CTRL6, SX9310_REG_PROX_CTRL6_AVGTHRESH_DEFAULT },
1168 { SX9310_REG_PROX_CTRL7, SX9310_REG_PROX_CTRL7_AVGNEGFILT_2 |
1169 SX9310_REG_PROX_CTRL7_AVGPOSFILT_512 },
1170 { SX9310_REG_PROX_CTRL8, SX9310_REG_PROX_CTRL8_9_PTHRESH_96 |
1171 SX9310_REG_PROX_CTRL8_9_BODYTHRESH_1500 },
1172 { SX9310_REG_PROX_CTRL9, SX9310_REG_PROX_CTRL8_9_PTHRESH_28 |
1173 SX9310_REG_PROX_CTRL8_9_BODYTHRESH_900 },
1174 { SX9310_REG_PROX_CTRL10, SX9310_REG_PROX_CTRL10_HYST_6PCT |
1175 SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_2 },
1176 { SX9310_REG_PROX_CTRL11, 0x00 },
1177 { SX9310_REG_PROX_CTRL12, 0x00 },
1178 { SX9310_REG_PROX_CTRL13, 0x00 },
1179 { SX9310_REG_PROX_CTRL14, 0x00 },
1180 { SX9310_REG_PROX_CTRL15, 0x00 },
1181 { SX9310_REG_PROX_CTRL16, 0x00 },
1182 { SX9310_REG_PROX_CTRL17, 0x00 },
1183 { SX9310_REG_PROX_CTRL18, 0x00 },
1184 { SX9310_REG_PROX_CTRL19, 0x00 },
1185 { SX9310_REG_SAR_CTRL0, SX9310_REG_SAR_CTRL0_SARDEB_4_SAMPLES |
1186 SX9310_REG_SAR_CTRL0_SARHYST_8 },
1187 { SX9310_REG_SAR_CTRL1, SX9310_REG_SAR_CTRL1_SLOPE(10781250) },
1188 { SX9310_REG_SAR_CTRL2, SX9310_REG_SAR_CTRL2_SAROFFSET_DEFAULT },
1189};
1190
1191
1192static int sx9310_init_compensation(struct iio_dev *indio_dev)
1193{
1194 struct sx9310_data *data = iio_priv(indio_dev);
1195 int ret;
1196 unsigned int val;
1197 unsigned int ctrl0;
1198
1199 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &ctrl0);
1200 if (ret)
1201 return ret;
1202
1203
1204 ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0,
1205 ctrl0 | SX9310_REG_PROX_CTRL0_SENSOREN_MASK);
1206 if (ret)
1207 return ret;
1208
1209 ret = regmap_read_poll_timeout(data->regmap, SX9310_REG_STAT1, val,
1210 !(val & SX9310_REG_STAT1_COMPSTAT_MASK),
1211 20000, 2000000);
1212 if (ret) {
1213 if (ret == -ETIMEDOUT)
1214 dev_err(&data->client->dev,
1215 "initial compensation timed out: 0x%02x\n",
1216 val);
1217 return ret;
1218 }
1219
1220 regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, ctrl0);
1221 return ret;
1222}
1223
1224static const struct sx9310_reg_default *
1225sx9310_get_default_reg(struct device *dev, int idx,
1226 struct sx9310_reg_default *reg_def)
1227{
1228 u32 combined[SX9310_NUM_CHANNELS];
1229 u32 start = 0, raw = 0, pos = 0;
1230 unsigned long comb_mask = 0;
1231 int ret, i, count;
1232 const char *res;
1233
1234 memcpy(reg_def, &sx9310_default_regs[idx], sizeof(*reg_def));
1235 switch (reg_def->reg) {
1236 case SX9310_REG_PROX_CTRL2:
1237 if (device_property_read_bool(dev, "semtech,cs0-ground")) {
1238 reg_def->def &= ~SX9310_REG_PROX_CTRL2_SHIELDEN_MASK;
1239 reg_def->def |= SX9310_REG_PROX_CTRL2_SHIELDEN_GROUND;
1240 }
1241
1242 count = device_property_count_u32(dev, "semtech,combined-sensors");
1243 if (count < 0 || count > ARRAY_SIZE(combined))
1244 break;
1245 ret = device_property_read_u32_array(dev, "semtech,combined-sensors",
1246 combined, count);
1247 if (ret)
1248 break;
1249
1250 for (i = 0; i < count; i++)
1251 comb_mask |= BIT(combined[i]);
1252
1253 reg_def->def &= ~SX9310_REG_PROX_CTRL2_COMBMODE_MASK;
1254 if (comb_mask == (BIT(3) | BIT(2) | BIT(1) | BIT(0)))
1255 reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1_CS2_CS3;
1256 else if (comb_mask == (BIT(1) | BIT(2)))
1257 reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS1_CS2;
1258 else if (comb_mask == (BIT(0) | BIT(1)))
1259 reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1;
1260 else if (comb_mask == BIT(3))
1261 reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS3;
1262
1263 break;
1264 case SX9310_REG_PROX_CTRL4:
1265 ret = device_property_read_string(dev, "semtech,resolution", &res);
1266 if (ret)
1267 break;
1268
1269 reg_def->def &= ~SX9310_REG_PROX_CTRL4_RESOLUTION_MASK;
1270 if (!strcmp(res, "coarsest"))
1271 reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_COARSEST;
1272 else if (!strcmp(res, "very-coarse"))
1273 reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_VERY_COARSE;
1274 else if (!strcmp(res, "coarse"))
1275 reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_COARSE;
1276 else if (!strcmp(res, "medium-coarse"))
1277 reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_MEDIUM_COARSE;
1278 else if (!strcmp(res, "medium"))
1279 reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_MEDIUM;
1280 else if (!strcmp(res, "fine"))
1281 reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_FINE;
1282 else if (!strcmp(res, "very-fine"))
1283 reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_VERY_FINE;
1284 else if (!strcmp(res, "finest"))
1285 reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_FINEST;
1286
1287 break;
1288 case SX9310_REG_PROX_CTRL5:
1289 ret = device_property_read_u32(dev, "semtech,startup-sensor", &start);
1290 if (ret) {
1291 start = FIELD_GET(SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK,
1292 reg_def->def);
1293 }
1294
1295 reg_def->def &= ~SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK;
1296 reg_def->def |= FIELD_PREP(SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK,
1297 start);
1298
1299 ret = device_property_read_u32(dev, "semtech,proxraw-strength", &raw);
1300 if (ret) {
1301 raw = FIELD_GET(SX9310_REG_PROX_CTRL5_RAWFILT_MASK,
1302 reg_def->def);
1303 } else {
1304 raw = ilog2(raw);
1305 }
1306
1307 reg_def->def &= ~SX9310_REG_PROX_CTRL5_RAWFILT_MASK;
1308 reg_def->def |= FIELD_PREP(SX9310_REG_PROX_CTRL5_RAWFILT_MASK,
1309 raw);
1310 break;
1311 case SX9310_REG_PROX_CTRL7:
1312 ret = device_property_read_u32(dev, "semtech,avg-pos-strength", &pos);
1313 if (ret)
1314 break;
1315
1316
1317 pos = clamp(ilog2(pos), 3, 11) - (pos >= 32 ? 4 : 3);
1318 reg_def->def &= ~SX9310_REG_PROX_CTRL7_AVGPOSFILT_MASK;
1319 reg_def->def |= FIELD_PREP(SX9310_REG_PROX_CTRL7_AVGPOSFILT_MASK,
1320 pos);
1321 break;
1322 }
1323
1324 return reg_def;
1325}
1326
1327static int sx9310_init_device(struct iio_dev *indio_dev)
1328{
1329 struct sx9310_data *data = iio_priv(indio_dev);
1330 struct sx9310_reg_default tmp;
1331 const struct sx9310_reg_default *initval;
1332 int ret;
1333 unsigned int i, val;
1334
1335 ret = regmap_write(data->regmap, SX9310_REG_RESET, SX9310_SOFT_RESET);
1336 if (ret)
1337 return ret;
1338
1339 usleep_range(1000, 2000);
1340
1341
1342 ret = regmap_read(data->regmap, SX9310_REG_IRQ_SRC, &val);
1343 if (ret)
1344 return ret;
1345
1346
1347 for (i = 0; i < ARRAY_SIZE(sx9310_default_regs); i++) {
1348 initval = sx9310_get_default_reg(&indio_dev->dev, i, &tmp);
1349 ret = regmap_write(data->regmap, initval->reg, initval->def);
1350 if (ret)
1351 return ret;
1352 }
1353
1354 return sx9310_init_compensation(indio_dev);
1355}
1356
1357static int sx9310_set_indio_dev_name(struct device *dev,
1358 struct iio_dev *indio_dev,
1359 unsigned int whoami)
1360{
1361 unsigned int long ddata;
1362
1363 ddata = (uintptr_t)device_get_match_data(dev);
1364 if (ddata != whoami) {
1365 dev_err(dev, "WHOAMI does not match device data: %u\n", whoami);
1366 return -ENODEV;
1367 }
1368
1369 switch (whoami) {
1370 case SX9310_WHOAMI_VALUE:
1371 indio_dev->name = "sx9310";
1372 break;
1373 case SX9311_WHOAMI_VALUE:
1374 indio_dev->name = "sx9311";
1375 break;
1376 default:
1377 dev_err(dev, "unexpected WHOAMI response: %u\n", whoami);
1378 return -ENODEV;
1379 }
1380
1381 return 0;
1382}
1383
1384static void sx9310_regulator_disable(void *_data)
1385{
1386 struct sx9310_data *data = _data;
1387
1388 regulator_bulk_disable(ARRAY_SIZE(data->supplies), data->supplies);
1389}
1390
1391static int sx9310_probe(struct i2c_client *client)
1392{
1393 int ret;
1394 struct device *dev = &client->dev;
1395 struct iio_dev *indio_dev;
1396 struct sx9310_data *data;
1397
1398 indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
1399 if (!indio_dev)
1400 return -ENOMEM;
1401
1402 data = iio_priv(indio_dev);
1403 data->client = client;
1404 data->supplies[0].supply = "vdd";
1405 data->supplies[1].supply = "svdd";
1406 mutex_init(&data->mutex);
1407 init_completion(&data->completion);
1408
1409 data->regmap = devm_regmap_init_i2c(client, &sx9310_regmap_config);
1410 if (IS_ERR(data->regmap))
1411 return PTR_ERR(data->regmap);
1412
1413 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(data->supplies),
1414 data->supplies);
1415 if (ret)
1416 return ret;
1417
1418 ret = regulator_bulk_enable(ARRAY_SIZE(data->supplies), data->supplies);
1419 if (ret)
1420 return ret;
1421
1422 usleep_range(1000, 1100);
1423
1424 ret = devm_add_action_or_reset(dev, sx9310_regulator_disable, data);
1425 if (ret)
1426 return ret;
1427
1428 ret = regmap_read(data->regmap, SX9310_REG_WHOAMI, &data->whoami);
1429 if (ret) {
1430 dev_err(dev, "error in reading WHOAMI register: %d", ret);
1431 return ret;
1432 }
1433
1434 ret = sx9310_set_indio_dev_name(dev, indio_dev, data->whoami);
1435 if (ret)
1436 return ret;
1437
1438 ACPI_COMPANION_SET(&indio_dev->dev, ACPI_COMPANION(dev));
1439 indio_dev->channels = sx9310_channels;
1440 indio_dev->num_channels = ARRAY_SIZE(sx9310_channels);
1441 indio_dev->info = &sx9310_info;
1442 indio_dev->modes = INDIO_DIRECT_MODE;
1443 i2c_set_clientdata(client, indio_dev);
1444
1445 ret = sx9310_init_device(indio_dev);
1446 if (ret)
1447 return ret;
1448
1449 if (client->irq) {
1450 ret = devm_request_threaded_irq(dev, client->irq,
1451 sx9310_irq_handler,
1452 sx9310_irq_thread_handler,
1453 IRQF_ONESHOT,
1454 "sx9310_event", indio_dev);
1455 if (ret)
1456 return ret;
1457
1458 data->trig = devm_iio_trigger_alloc(dev, "%s-dev%d",
1459 indio_dev->name,
1460 iio_device_id(indio_dev));
1461 if (!data->trig)
1462 return -ENOMEM;
1463
1464 data->trig->ops = &sx9310_trigger_ops;
1465 iio_trigger_set_drvdata(data->trig, indio_dev);
1466
1467 ret = devm_iio_trigger_register(dev, data->trig);
1468 if (ret)
1469 return ret;
1470 }
1471
1472 ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
1473 iio_pollfunc_store_time,
1474 sx9310_trigger_handler,
1475 &sx9310_buffer_setup_ops);
1476 if (ret)
1477 return ret;
1478
1479 return devm_iio_device_register(dev, indio_dev);
1480}
1481
1482static int __maybe_unused sx9310_suspend(struct device *dev)
1483{
1484 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1485 struct sx9310_data *data = iio_priv(indio_dev);
1486 u8 ctrl0;
1487 int ret;
1488
1489 disable_irq_nosync(data->client->irq);
1490
1491 mutex_lock(&data->mutex);
1492 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0,
1493 &data->suspend_ctrl0);
1494 if (ret)
1495 goto out;
1496
1497 ctrl0 = data->suspend_ctrl0 & ~SX9310_REG_PROX_CTRL0_SENSOREN_MASK;
1498 ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, ctrl0);
1499 if (ret)
1500 goto out;
1501
1502 ret = regmap_write(data->regmap, SX9310_REG_PAUSE, 0);
1503
1504out:
1505 mutex_unlock(&data->mutex);
1506 return ret;
1507}
1508
1509static int __maybe_unused sx9310_resume(struct device *dev)
1510{
1511 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1512 struct sx9310_data *data = iio_priv(indio_dev);
1513 int ret;
1514
1515 mutex_lock(&data->mutex);
1516 ret = regmap_write(data->regmap, SX9310_REG_PAUSE, 1);
1517 if (ret)
1518 goto out;
1519
1520 ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0,
1521 data->suspend_ctrl0);
1522
1523out:
1524 mutex_unlock(&data->mutex);
1525 if (ret)
1526 return ret;
1527
1528 enable_irq(data->client->irq);
1529 return 0;
1530}
1531
1532static const struct dev_pm_ops sx9310_pm_ops = {
1533 SET_SYSTEM_SLEEP_PM_OPS(sx9310_suspend, sx9310_resume)
1534};
1535
1536static const struct acpi_device_id sx9310_acpi_match[] = {
1537 { "STH9310", SX9310_WHOAMI_VALUE },
1538 { "STH9311", SX9311_WHOAMI_VALUE },
1539 {}
1540};
1541MODULE_DEVICE_TABLE(acpi, sx9310_acpi_match);
1542
1543static const struct of_device_id sx9310_of_match[] = {
1544 { .compatible = "semtech,sx9310", (void *)SX9310_WHOAMI_VALUE },
1545 { .compatible = "semtech,sx9311", (void *)SX9311_WHOAMI_VALUE },
1546 {}
1547};
1548MODULE_DEVICE_TABLE(of, sx9310_of_match);
1549
1550static const struct i2c_device_id sx9310_id[] = {
1551 { "sx9310", SX9310_WHOAMI_VALUE },
1552 { "sx9311", SX9311_WHOAMI_VALUE },
1553 {}
1554};
1555MODULE_DEVICE_TABLE(i2c, sx9310_id);
1556
1557static struct i2c_driver sx9310_driver = {
1558 .driver = {
1559 .name = "sx9310",
1560 .acpi_match_table = sx9310_acpi_match,
1561 .of_match_table = sx9310_of_match,
1562 .pm = &sx9310_pm_ops,
1563
1564
1565
1566
1567
1568
1569 .probe_type = PROBE_PREFER_ASYNCHRONOUS,
1570 },
1571 .probe_new = sx9310_probe,
1572 .id_table = sx9310_id,
1573};
1574module_i2c_driver(sx9310_driver);
1575
1576MODULE_AUTHOR("Gwendal Grignou <gwendal@chromium.org>");
1577MODULE_AUTHOR("Daniel Campello <campello@chromium.org>");
1578MODULE_DESCRIPTION("Driver for Semtech SX9310/SX9311 proximity sensor");
1579MODULE_LICENSE("GPL v2");
1580
