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12#include <linux/delay.h>
13#include <linux/device.h>
14#include <linux/err.h>
15#include <linux/i2c.h>
16#include <linux/input.h>
17#include <linux/interrupt.h>
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/mutex.h>
21#include <linux/of_device.h>
22#include <linux/property.h>
23#include <linux/regmap.h>
24#include <linux/slab.h>
25
26#define IQS269_VER_INFO 0x00
27#define IQS269_VER_INFO_PROD_NUM 0x4F
28
29#define IQS269_SYS_FLAGS 0x02
30#define IQS269_SYS_FLAGS_SHOW_RESET BIT(15)
31#define IQS269_SYS_FLAGS_PWR_MODE_MASK GENMASK(12, 11)
32#define IQS269_SYS_FLAGS_PWR_MODE_SHIFT 11
33#define IQS269_SYS_FLAGS_IN_ATI BIT(10)
34
35#define IQS269_CHx_COUNTS 0x08
36
37#define IQS269_SLIDER_X 0x30
38
39#define IQS269_CAL_DATA_A 0x35
40#define IQS269_CAL_DATA_A_HALL_BIN_L_MASK GENMASK(15, 12)
41#define IQS269_CAL_DATA_A_HALL_BIN_L_SHIFT 12
42#define IQS269_CAL_DATA_A_HALL_BIN_R_MASK GENMASK(11, 8)
43#define IQS269_CAL_DATA_A_HALL_BIN_R_SHIFT 8
44
45#define IQS269_SYS_SETTINGS 0x80
46#define IQS269_SYS_SETTINGS_CLK_DIV BIT(15)
47#define IQS269_SYS_SETTINGS_ULP_AUTO BIT(14)
48#define IQS269_SYS_SETTINGS_DIS_AUTO BIT(13)
49#define IQS269_SYS_SETTINGS_PWR_MODE_MASK GENMASK(12, 11)
50#define IQS269_SYS_SETTINGS_PWR_MODE_SHIFT 11
51#define IQS269_SYS_SETTINGS_PWR_MODE_MAX 3
52#define IQS269_SYS_SETTINGS_ULP_UPDATE_MASK GENMASK(10, 8)
53#define IQS269_SYS_SETTINGS_ULP_UPDATE_SHIFT 8
54#define IQS269_SYS_SETTINGS_ULP_UPDATE_MAX 7
55#define IQS269_SYS_SETTINGS_RESEED_OFFSET BIT(6)
56#define IQS269_SYS_SETTINGS_EVENT_MODE BIT(5)
57#define IQS269_SYS_SETTINGS_EVENT_MODE_LP BIT(4)
58#define IQS269_SYS_SETTINGS_REDO_ATI BIT(2)
59#define IQS269_SYS_SETTINGS_ACK_RESET BIT(0)
60
61#define IQS269_FILT_STR_LP_LTA_MASK GENMASK(7, 6)
62#define IQS269_FILT_STR_LP_LTA_SHIFT 6
63#define IQS269_FILT_STR_LP_CNT_MASK GENMASK(5, 4)
64#define IQS269_FILT_STR_LP_CNT_SHIFT 4
65#define IQS269_FILT_STR_NP_LTA_MASK GENMASK(3, 2)
66#define IQS269_FILT_STR_NP_LTA_SHIFT 2
67#define IQS269_FILT_STR_NP_CNT_MASK GENMASK(1, 0)
68#define IQS269_FILT_STR_MAX 3
69
70#define IQS269_EVENT_MASK_SYS BIT(6)
71#define IQS269_EVENT_MASK_DEEP BIT(2)
72#define IQS269_EVENT_MASK_TOUCH BIT(1)
73#define IQS269_EVENT_MASK_PROX BIT(0)
74
75#define IQS269_RATE_NP_MS_MAX 255
76#define IQS269_RATE_LP_MS_MAX 255
77#define IQS269_RATE_ULP_MS_MAX 4080
78#define IQS269_TIMEOUT_PWR_MS_MAX 130560
79#define IQS269_TIMEOUT_LTA_MS_MAX 130560
80
81#define IQS269_MISC_A_ATI_BAND_DISABLE BIT(15)
82#define IQS269_MISC_A_ATI_LP_ONLY BIT(14)
83#define IQS269_MISC_A_ATI_BAND_TIGHTEN BIT(13)
84#define IQS269_MISC_A_FILT_DISABLE BIT(12)
85#define IQS269_MISC_A_GPIO3_SELECT_MASK GENMASK(10, 8)
86#define IQS269_MISC_A_GPIO3_SELECT_SHIFT 8
87#define IQS269_MISC_A_DUAL_DIR BIT(6)
88#define IQS269_MISC_A_TX_FREQ_MASK GENMASK(5, 4)
89#define IQS269_MISC_A_TX_FREQ_SHIFT 4
90#define IQS269_MISC_A_TX_FREQ_MAX 3
91#define IQS269_MISC_A_GLOBAL_CAP_SIZE BIT(0)
92
93#define IQS269_MISC_B_RESEED_UI_SEL_MASK GENMASK(7, 6)
94#define IQS269_MISC_B_RESEED_UI_SEL_SHIFT 6
95#define IQS269_MISC_B_RESEED_UI_SEL_MAX 3
96#define IQS269_MISC_B_TRACKING_UI_ENABLE BIT(4)
97#define IQS269_MISC_B_FILT_STR_SLIDER GENMASK(1, 0)
98
99#define IQS269_CHx_SETTINGS 0x8C
100
101#define IQS269_CHx_ENG_A_MEAS_CAP_SIZE BIT(15)
102#define IQS269_CHx_ENG_A_RX_GND_INACTIVE BIT(13)
103#define IQS269_CHx_ENG_A_LOCAL_CAP_SIZE BIT(12)
104#define IQS269_CHx_ENG_A_ATI_MODE_MASK GENMASK(9, 8)
105#define IQS269_CHx_ENG_A_ATI_MODE_SHIFT 8
106#define IQS269_CHx_ENG_A_ATI_MODE_MAX 3
107#define IQS269_CHx_ENG_A_INV_LOGIC BIT(7)
108#define IQS269_CHx_ENG_A_PROJ_BIAS_MASK GENMASK(6, 5)
109#define IQS269_CHx_ENG_A_PROJ_BIAS_SHIFT 5
110#define IQS269_CHx_ENG_A_PROJ_BIAS_MAX 3
111#define IQS269_CHx_ENG_A_SENSE_MODE_MASK GENMASK(3, 0)
112#define IQS269_CHx_ENG_A_SENSE_MODE_MAX 15
113
114#define IQS269_CHx_ENG_B_LOCAL_CAP_ENABLE BIT(13)
115#define IQS269_CHx_ENG_B_SENSE_FREQ_MASK GENMASK(10, 9)
116#define IQS269_CHx_ENG_B_SENSE_FREQ_SHIFT 9
117#define IQS269_CHx_ENG_B_SENSE_FREQ_MAX 3
118#define IQS269_CHx_ENG_B_STATIC_ENABLE BIT(8)
119#define IQS269_CHx_ENG_B_ATI_BASE_MASK GENMASK(7, 6)
120#define IQS269_CHx_ENG_B_ATI_BASE_75 0x00
121#define IQS269_CHx_ENG_B_ATI_BASE_100 0x40
122#define IQS269_CHx_ENG_B_ATI_BASE_150 0x80
123#define IQS269_CHx_ENG_B_ATI_BASE_200 0xC0
124#define IQS269_CHx_ENG_B_ATI_TARGET_MASK GENMASK(5, 0)
125#define IQS269_CHx_ENG_B_ATI_TARGET_MAX 2016
126
127#define IQS269_CHx_WEIGHT_MAX 255
128#define IQS269_CHx_THRESH_MAX 255
129#define IQS269_CHx_HYST_DEEP_MASK GENMASK(7, 4)
130#define IQS269_CHx_HYST_DEEP_SHIFT 4
131#define IQS269_CHx_HYST_TOUCH_MASK GENMASK(3, 0)
132#define IQS269_CHx_HYST_MAX 15
133
134#define IQS269_CHx_HALL_INACTIVE 6
135#define IQS269_CHx_HALL_ACTIVE 7
136
137#define IQS269_HALL_PAD_R BIT(0)
138#define IQS269_HALL_PAD_L BIT(1)
139#define IQS269_HALL_PAD_INV BIT(6)
140
141#define IQS269_HALL_UI 0xF5
142#define IQS269_HALL_UI_ENABLE BIT(15)
143
144#define IQS269_MAX_REG 0xFF
145
146#define IQS269_NUM_CH 8
147#define IQS269_NUM_SL 2
148
149#define IQS269_ATI_POLL_SLEEP_US (iqs269->delay_mult * 10000)
150#define IQS269_ATI_POLL_TIMEOUT_US (iqs269->delay_mult * 500000)
151#define IQS269_ATI_STABLE_DELAY_MS (iqs269->delay_mult * 150)
152
153#define IQS269_PWR_MODE_POLL_SLEEP_US IQS269_ATI_POLL_SLEEP_US
154#define IQS269_PWR_MODE_POLL_TIMEOUT_US IQS269_ATI_POLL_TIMEOUT_US
155
156#define iqs269_irq_wait() usleep_range(100, 150)
157
158enum iqs269_local_cap_size {
159 IQS269_LOCAL_CAP_SIZE_0,
160 IQS269_LOCAL_CAP_SIZE_GLOBAL_ONLY,
161 IQS269_LOCAL_CAP_SIZE_GLOBAL_0pF5,
162};
163
164enum iqs269_st_offs {
165 IQS269_ST_OFFS_PROX,
166 IQS269_ST_OFFS_DIR,
167 IQS269_ST_OFFS_TOUCH,
168 IQS269_ST_OFFS_DEEP,
169};
170
171enum iqs269_th_offs {
172 IQS269_TH_OFFS_PROX,
173 IQS269_TH_OFFS_TOUCH,
174 IQS269_TH_OFFS_DEEP,
175};
176
177enum iqs269_event_id {
178 IQS269_EVENT_PROX_DN,
179 IQS269_EVENT_PROX_UP,
180 IQS269_EVENT_TOUCH_DN,
181 IQS269_EVENT_TOUCH_UP,
182 IQS269_EVENT_DEEP_DN,
183 IQS269_EVENT_DEEP_UP,
184};
185
186struct iqs269_switch_desc {
187 unsigned int code;
188 bool enabled;
189};
190
191struct iqs269_event_desc {
192 const char *name;
193 enum iqs269_st_offs st_offs;
194 enum iqs269_th_offs th_offs;
195 bool dir_up;
196 u8 mask;
197};
198
199static const struct iqs269_event_desc iqs269_events[] = {
200 [IQS269_EVENT_PROX_DN] = {
201 .name = "event-prox",
202 .st_offs = IQS269_ST_OFFS_PROX,
203 .th_offs = IQS269_TH_OFFS_PROX,
204 .mask = IQS269_EVENT_MASK_PROX,
205 },
206 [IQS269_EVENT_PROX_UP] = {
207 .name = "event-prox-alt",
208 .st_offs = IQS269_ST_OFFS_PROX,
209 .th_offs = IQS269_TH_OFFS_PROX,
210 .dir_up = true,
211 .mask = IQS269_EVENT_MASK_PROX,
212 },
213 [IQS269_EVENT_TOUCH_DN] = {
214 .name = "event-touch",
215 .st_offs = IQS269_ST_OFFS_TOUCH,
216 .th_offs = IQS269_TH_OFFS_TOUCH,
217 .mask = IQS269_EVENT_MASK_TOUCH,
218 },
219 [IQS269_EVENT_TOUCH_UP] = {
220 .name = "event-touch-alt",
221 .st_offs = IQS269_ST_OFFS_TOUCH,
222 .th_offs = IQS269_TH_OFFS_TOUCH,
223 .dir_up = true,
224 .mask = IQS269_EVENT_MASK_TOUCH,
225 },
226 [IQS269_EVENT_DEEP_DN] = {
227 .name = "event-deep",
228 .st_offs = IQS269_ST_OFFS_DEEP,
229 .th_offs = IQS269_TH_OFFS_DEEP,
230 .mask = IQS269_EVENT_MASK_DEEP,
231 },
232 [IQS269_EVENT_DEEP_UP] = {
233 .name = "event-deep-alt",
234 .st_offs = IQS269_ST_OFFS_DEEP,
235 .th_offs = IQS269_TH_OFFS_DEEP,
236 .dir_up = true,
237 .mask = IQS269_EVENT_MASK_DEEP,
238 },
239};
240
241struct iqs269_ver_info {
242 u8 prod_num;
243 u8 sw_num;
244 u8 hw_num;
245 u8 padding;
246} __packed;
247
248struct iqs269_sys_reg {
249 __be16 general;
250 u8 active;
251 u8 filter;
252 u8 reseed;
253 u8 event_mask;
254 u8 rate_np;
255 u8 rate_lp;
256 u8 rate_ulp;
257 u8 timeout_pwr;
258 u8 timeout_rdy;
259 u8 timeout_lta;
260 __be16 misc_a;
261 __be16 misc_b;
262 u8 blocking;
263 u8 padding;
264 u8 slider_select[IQS269_NUM_SL];
265 u8 timeout_tap;
266 u8 timeout_swipe;
267 u8 thresh_swipe;
268 u8 redo_ati;
269} __packed;
270
271struct iqs269_ch_reg {
272 u8 rx_enable;
273 u8 tx_enable;
274 __be16 engine_a;
275 __be16 engine_b;
276 __be16 ati_comp;
277 u8 thresh[3];
278 u8 hyst;
279 u8 assoc_select;
280 u8 assoc_weight;
281} __packed;
282
283struct iqs269_flags {
284 __be16 system;
285 u8 gesture;
286 u8 padding;
287 u8 states[4];
288} __packed;
289
290struct iqs269_private {
291 struct i2c_client *client;
292 struct regmap *regmap;
293 struct mutex lock;
294 struct iqs269_switch_desc switches[ARRAY_SIZE(iqs269_events)];
295 struct iqs269_ch_reg ch_reg[IQS269_NUM_CH];
296 struct iqs269_sys_reg sys_reg;
297 struct input_dev *keypad;
298 struct input_dev *slider[IQS269_NUM_SL];
299 unsigned int keycode[ARRAY_SIZE(iqs269_events) * IQS269_NUM_CH];
300 unsigned int suspend_mode;
301 unsigned int delay_mult;
302 unsigned int ch_num;
303 bool hall_enable;
304 bool ati_current;
305};
306
307static int iqs269_ati_mode_set(struct iqs269_private *iqs269,
308 unsigned int ch_num, unsigned int mode)
309{
310 u16 engine_a;
311
312 if (ch_num >= IQS269_NUM_CH)
313 return -EINVAL;
314
315 if (mode > IQS269_CHx_ENG_A_ATI_MODE_MAX)
316 return -EINVAL;
317
318 mutex_lock(&iqs269->lock);
319
320 engine_a = be16_to_cpu(iqs269->ch_reg[ch_num].engine_a);
321
322 engine_a &= ~IQS269_CHx_ENG_A_ATI_MODE_MASK;
323 engine_a |= (mode << IQS269_CHx_ENG_A_ATI_MODE_SHIFT);
324
325 iqs269->ch_reg[ch_num].engine_a = cpu_to_be16(engine_a);
326 iqs269->ati_current = false;
327
328 mutex_unlock(&iqs269->lock);
329
330 return 0;
331}
332
333static int iqs269_ati_mode_get(struct iqs269_private *iqs269,
334 unsigned int ch_num, unsigned int *mode)
335{
336 u16 engine_a;
337
338 if (ch_num >= IQS269_NUM_CH)
339 return -EINVAL;
340
341 mutex_lock(&iqs269->lock);
342 engine_a = be16_to_cpu(iqs269->ch_reg[ch_num].engine_a);
343 mutex_unlock(&iqs269->lock);
344
345 engine_a &= IQS269_CHx_ENG_A_ATI_MODE_MASK;
346 *mode = (engine_a >> IQS269_CHx_ENG_A_ATI_MODE_SHIFT);
347
348 return 0;
349}
350
351static int iqs269_ati_base_set(struct iqs269_private *iqs269,
352 unsigned int ch_num, unsigned int base)
353{
354 u16 engine_b;
355
356 if (ch_num >= IQS269_NUM_CH)
357 return -EINVAL;
358
359 switch (base) {
360 case 75:
361 base = IQS269_CHx_ENG_B_ATI_BASE_75;
362 break;
363
364 case 100:
365 base = IQS269_CHx_ENG_B_ATI_BASE_100;
366 break;
367
368 case 150:
369 base = IQS269_CHx_ENG_B_ATI_BASE_150;
370 break;
371
372 case 200:
373 base = IQS269_CHx_ENG_B_ATI_BASE_200;
374 break;
375
376 default:
377 return -EINVAL;
378 }
379
380 mutex_lock(&iqs269->lock);
381
382 engine_b = be16_to_cpu(iqs269->ch_reg[ch_num].engine_b);
383
384 engine_b &= ~IQS269_CHx_ENG_B_ATI_BASE_MASK;
385 engine_b |= base;
386
387 iqs269->ch_reg[ch_num].engine_b = cpu_to_be16(engine_b);
388 iqs269->ati_current = false;
389
390 mutex_unlock(&iqs269->lock);
391
392 return 0;
393}
394
395static int iqs269_ati_base_get(struct iqs269_private *iqs269,
396 unsigned int ch_num, unsigned int *base)
397{
398 u16 engine_b;
399
400 if (ch_num >= IQS269_NUM_CH)
401 return -EINVAL;
402
403 mutex_lock(&iqs269->lock);
404 engine_b = be16_to_cpu(iqs269->ch_reg[ch_num].engine_b);
405 mutex_unlock(&iqs269->lock);
406
407 switch (engine_b & IQS269_CHx_ENG_B_ATI_BASE_MASK) {
408 case IQS269_CHx_ENG_B_ATI_BASE_75:
409 *base = 75;
410 return 0;
411
412 case IQS269_CHx_ENG_B_ATI_BASE_100:
413 *base = 100;
414 return 0;
415
416 case IQS269_CHx_ENG_B_ATI_BASE_150:
417 *base = 150;
418 return 0;
419
420 case IQS269_CHx_ENG_B_ATI_BASE_200:
421 *base = 200;
422 return 0;
423
424 default:
425 return -EINVAL;
426 }
427}
428
429static int iqs269_ati_target_set(struct iqs269_private *iqs269,
430 unsigned int ch_num, unsigned int target)
431{
432 u16 engine_b;
433
434 if (ch_num >= IQS269_NUM_CH)
435 return -EINVAL;
436
437 if (target > IQS269_CHx_ENG_B_ATI_TARGET_MAX)
438 return -EINVAL;
439
440 mutex_lock(&iqs269->lock);
441
442 engine_b = be16_to_cpu(iqs269->ch_reg[ch_num].engine_b);
443
444 engine_b &= ~IQS269_CHx_ENG_B_ATI_TARGET_MASK;
445 engine_b |= target / 32;
446
447 iqs269->ch_reg[ch_num].engine_b = cpu_to_be16(engine_b);
448 iqs269->ati_current = false;
449
450 mutex_unlock(&iqs269->lock);
451
452 return 0;
453}
454
455static int iqs269_ati_target_get(struct iqs269_private *iqs269,
456 unsigned int ch_num, unsigned int *target)
457{
458 u16 engine_b;
459
460 if (ch_num >= IQS269_NUM_CH)
461 return -EINVAL;
462
463 mutex_lock(&iqs269->lock);
464 engine_b = be16_to_cpu(iqs269->ch_reg[ch_num].engine_b);
465 mutex_unlock(&iqs269->lock);
466
467 *target = (engine_b & IQS269_CHx_ENG_B_ATI_TARGET_MASK) * 32;
468
469 return 0;
470}
471
472static int iqs269_parse_mask(const struct fwnode_handle *fwnode,
473 const char *propname, u8 *mask)
474{
475 unsigned int val[IQS269_NUM_CH];
476 int count, error, i;
477
478 count = fwnode_property_count_u32(fwnode, propname);
479 if (count < 0)
480 return 0;
481
482 if (count > IQS269_NUM_CH)
483 return -EINVAL;
484
485 error = fwnode_property_read_u32_array(fwnode, propname, val, count);
486 if (error)
487 return error;
488
489 *mask = 0;
490
491 for (i = 0; i < count; i++) {
492 if (val[i] >= IQS269_NUM_CH)
493 return -EINVAL;
494
495 *mask |= BIT(val[i]);
496 }
497
498 return 0;
499}
500
501static int iqs269_parse_chan(struct iqs269_private *iqs269,
502 const struct fwnode_handle *ch_node)
503{
504 struct i2c_client *client = iqs269->client;
505 struct fwnode_handle *ev_node;
506 struct iqs269_ch_reg *ch_reg;
507 u16 engine_a, engine_b;
508 unsigned int reg, val;
509 int error, i;
510
511 error = fwnode_property_read_u32(ch_node, "reg", ®);
512 if (error) {
513 dev_err(&client->dev, "Failed to read channel number: %d\n",
514 error);
515 return error;
516 } else if (reg >= IQS269_NUM_CH) {
517 dev_err(&client->dev, "Invalid channel number: %u\n", reg);
518 return -EINVAL;
519 }
520
521 iqs269->sys_reg.active |= BIT(reg);
522 if (!fwnode_property_present(ch_node, "azoteq,reseed-disable"))
523 iqs269->sys_reg.reseed |= BIT(reg);
524
525 if (fwnode_property_present(ch_node, "azoteq,blocking-enable"))
526 iqs269->sys_reg.blocking |= BIT(reg);
527
528 if (fwnode_property_present(ch_node, "azoteq,slider0-select"))
529 iqs269->sys_reg.slider_select[0] |= BIT(reg);
530
531 if (fwnode_property_present(ch_node, "azoteq,slider1-select"))
532 iqs269->sys_reg.slider_select[1] |= BIT(reg);
533
534 ch_reg = &iqs269->ch_reg[reg];
535
536 error = regmap_raw_read(iqs269->regmap,
537 IQS269_CHx_SETTINGS + reg * sizeof(*ch_reg) / 2,
538 ch_reg, sizeof(*ch_reg));
539 if (error)
540 return error;
541
542 error = iqs269_parse_mask(ch_node, "azoteq,rx-enable",
543 &ch_reg->rx_enable);
544 if (error) {
545 dev_err(&client->dev, "Invalid channel %u RX enable mask: %d\n",
546 reg, error);
547 return error;
548 }
549
550 error = iqs269_parse_mask(ch_node, "azoteq,tx-enable",
551 &ch_reg->tx_enable);
552 if (error) {
553 dev_err(&client->dev, "Invalid channel %u TX enable mask: %d\n",
554 reg, error);
555 return error;
556 }
557
558 engine_a = be16_to_cpu(ch_reg->engine_a);
559 engine_b = be16_to_cpu(ch_reg->engine_b);
560
561 engine_a |= IQS269_CHx_ENG_A_MEAS_CAP_SIZE;
562 if (fwnode_property_present(ch_node, "azoteq,meas-cap-decrease"))
563 engine_a &= ~IQS269_CHx_ENG_A_MEAS_CAP_SIZE;
564
565 engine_a |= IQS269_CHx_ENG_A_RX_GND_INACTIVE;
566 if (fwnode_property_present(ch_node, "azoteq,rx-float-inactive"))
567 engine_a &= ~IQS269_CHx_ENG_A_RX_GND_INACTIVE;
568
569 engine_a &= ~IQS269_CHx_ENG_A_LOCAL_CAP_SIZE;
570 engine_b &= ~IQS269_CHx_ENG_B_LOCAL_CAP_ENABLE;
571 if (!fwnode_property_read_u32(ch_node, "azoteq,local-cap-size", &val)) {
572 switch (val) {
573 case IQS269_LOCAL_CAP_SIZE_0:
574 break;
575
576 case IQS269_LOCAL_CAP_SIZE_GLOBAL_0pF5:
577 engine_a |= IQS269_CHx_ENG_A_LOCAL_CAP_SIZE;
578 fallthrough;
579
580 case IQS269_LOCAL_CAP_SIZE_GLOBAL_ONLY:
581 engine_b |= IQS269_CHx_ENG_B_LOCAL_CAP_ENABLE;
582 break;
583
584 default:
585 dev_err(&client->dev,
586 "Invalid channel %u local cap. size: %u\n", reg,
587 val);
588 return -EINVAL;
589 }
590 }
591
592 engine_a &= ~IQS269_CHx_ENG_A_INV_LOGIC;
593 if (fwnode_property_present(ch_node, "azoteq,invert-enable"))
594 engine_a |= IQS269_CHx_ENG_A_INV_LOGIC;
595
596 if (!fwnode_property_read_u32(ch_node, "azoteq,proj-bias", &val)) {
597 if (val > IQS269_CHx_ENG_A_PROJ_BIAS_MAX) {
598 dev_err(&client->dev,
599 "Invalid channel %u bias current: %u\n", reg,
600 val);
601 return -EINVAL;
602 }
603
604 engine_a &= ~IQS269_CHx_ENG_A_PROJ_BIAS_MASK;
605 engine_a |= (val << IQS269_CHx_ENG_A_PROJ_BIAS_SHIFT);
606 }
607
608 if (!fwnode_property_read_u32(ch_node, "azoteq,sense-mode", &val)) {
609 if (val > IQS269_CHx_ENG_A_SENSE_MODE_MAX) {
610 dev_err(&client->dev,
611 "Invalid channel %u sensing mode: %u\n", reg,
612 val);
613 return -EINVAL;
614 }
615
616 engine_a &= ~IQS269_CHx_ENG_A_SENSE_MODE_MASK;
617 engine_a |= val;
618 }
619
620 if (!fwnode_property_read_u32(ch_node, "azoteq,sense-freq", &val)) {
621 if (val > IQS269_CHx_ENG_B_SENSE_FREQ_MAX) {
622 dev_err(&client->dev,
623 "Invalid channel %u sensing frequency: %u\n",
624 reg, val);
625 return -EINVAL;
626 }
627
628 engine_b &= ~IQS269_CHx_ENG_B_SENSE_FREQ_MASK;
629 engine_b |= (val << IQS269_CHx_ENG_B_SENSE_FREQ_SHIFT);
630 }
631
632 engine_b &= ~IQS269_CHx_ENG_B_STATIC_ENABLE;
633 if (fwnode_property_present(ch_node, "azoteq,static-enable"))
634 engine_b |= IQS269_CHx_ENG_B_STATIC_ENABLE;
635
636 ch_reg->engine_a = cpu_to_be16(engine_a);
637 ch_reg->engine_b = cpu_to_be16(engine_b);
638
639 if (!fwnode_property_read_u32(ch_node, "azoteq,ati-mode", &val)) {
640 error = iqs269_ati_mode_set(iqs269, reg, val);
641 if (error) {
642 dev_err(&client->dev,
643 "Invalid channel %u ATI mode: %u\n", reg, val);
644 return error;
645 }
646 }
647
648 if (!fwnode_property_read_u32(ch_node, "azoteq,ati-base", &val)) {
649 error = iqs269_ati_base_set(iqs269, reg, val);
650 if (error) {
651 dev_err(&client->dev,
652 "Invalid channel %u ATI base: %u\n", reg, val);
653 return error;
654 }
655 }
656
657 if (!fwnode_property_read_u32(ch_node, "azoteq,ati-target", &val)) {
658 error = iqs269_ati_target_set(iqs269, reg, val);
659 if (error) {
660 dev_err(&client->dev,
661 "Invalid channel %u ATI target: %u\n", reg,
662 val);
663 return error;
664 }
665 }
666
667 error = iqs269_parse_mask(ch_node, "azoteq,assoc-select",
668 &ch_reg->assoc_select);
669 if (error) {
670 dev_err(&client->dev, "Invalid channel %u association: %d\n",
671 reg, error);
672 return error;
673 }
674
675 if (!fwnode_property_read_u32(ch_node, "azoteq,assoc-weight", &val)) {
676 if (val > IQS269_CHx_WEIGHT_MAX) {
677 dev_err(&client->dev,
678 "Invalid channel %u associated weight: %u\n",
679 reg, val);
680 return -EINVAL;
681 }
682
683 ch_reg->assoc_weight = val;
684 }
685
686 for (i = 0; i < ARRAY_SIZE(iqs269_events); i++) {
687 ev_node = fwnode_get_named_child_node(ch_node,
688 iqs269_events[i].name);
689 if (!ev_node)
690 continue;
691
692 if (!fwnode_property_read_u32(ev_node, "azoteq,thresh", &val)) {
693 if (val > IQS269_CHx_THRESH_MAX) {
694 dev_err(&client->dev,
695 "Invalid channel %u threshold: %u\n",
696 reg, val);
697 return -EINVAL;
698 }
699
700 ch_reg->thresh[iqs269_events[i].th_offs] = val;
701 }
702
703 if (!fwnode_property_read_u32(ev_node, "azoteq,hyst", &val)) {
704 u8 *hyst = &ch_reg->hyst;
705
706 if (val > IQS269_CHx_HYST_MAX) {
707 dev_err(&client->dev,
708 "Invalid channel %u hysteresis: %u\n",
709 reg, val);
710 return -EINVAL;
711 }
712
713 if (i == IQS269_EVENT_DEEP_DN ||
714 i == IQS269_EVENT_DEEP_UP) {
715 *hyst &= ~IQS269_CHx_HYST_DEEP_MASK;
716 *hyst |= (val << IQS269_CHx_HYST_DEEP_SHIFT);
717 } else if (i == IQS269_EVENT_TOUCH_DN ||
718 i == IQS269_EVENT_TOUCH_UP) {
719 *hyst &= ~IQS269_CHx_HYST_TOUCH_MASK;
720 *hyst |= val;
721 }
722 }
723
724 if (fwnode_property_read_u32(ev_node, "linux,code", &val))
725 continue;
726
727 switch (reg) {
728 case IQS269_CHx_HALL_ACTIVE:
729 if (iqs269->hall_enable) {
730 iqs269->switches[i].code = val;
731 iqs269->switches[i].enabled = true;
732 }
733 fallthrough;
734
735 case IQS269_CHx_HALL_INACTIVE:
736 if (iqs269->hall_enable)
737 break;
738 fallthrough;
739
740 default:
741 iqs269->keycode[i * IQS269_NUM_CH + reg] = val;
742 }
743
744 iqs269->sys_reg.event_mask &= ~iqs269_events[i].mask;
745 }
746
747 return 0;
748}
749
750static int iqs269_parse_prop(struct iqs269_private *iqs269)
751{
752 struct iqs269_sys_reg *sys_reg = &iqs269->sys_reg;
753 struct i2c_client *client = iqs269->client;
754 struct fwnode_handle *ch_node;
755 u16 general, misc_a, misc_b;
756 unsigned int val;
757 int error;
758
759 iqs269->hall_enable = device_property_present(&client->dev,
760 "azoteq,hall-enable");
761
762 if (!device_property_read_u32(&client->dev, "azoteq,suspend-mode",
763 &val)) {
764 if (val > IQS269_SYS_SETTINGS_PWR_MODE_MAX) {
765 dev_err(&client->dev, "Invalid suspend mode: %u\n",
766 val);
767 return -EINVAL;
768 }
769
770 iqs269->suspend_mode = val;
771 }
772
773 error = regmap_raw_read(iqs269->regmap, IQS269_SYS_SETTINGS, sys_reg,
774 sizeof(*sys_reg));
775 if (error)
776 return error;
777
778 if (!device_property_read_u32(&client->dev, "azoteq,filt-str-lp-lta",
779 &val)) {
780 if (val > IQS269_FILT_STR_MAX) {
781 dev_err(&client->dev, "Invalid filter strength: %u\n",
782 val);
783 return -EINVAL;
784 }
785
786 sys_reg->filter &= ~IQS269_FILT_STR_LP_LTA_MASK;
787 sys_reg->filter |= (val << IQS269_FILT_STR_LP_LTA_SHIFT);
788 }
789
790 if (!device_property_read_u32(&client->dev, "azoteq,filt-str-lp-cnt",
791 &val)) {
792 if (val > IQS269_FILT_STR_MAX) {
793 dev_err(&client->dev, "Invalid filter strength: %u\n",
794 val);
795 return -EINVAL;
796 }
797
798 sys_reg->filter &= ~IQS269_FILT_STR_LP_CNT_MASK;
799 sys_reg->filter |= (val << IQS269_FILT_STR_LP_CNT_SHIFT);
800 }
801
802 if (!device_property_read_u32(&client->dev, "azoteq,filt-str-np-lta",
803 &val)) {
804 if (val > IQS269_FILT_STR_MAX) {
805 dev_err(&client->dev, "Invalid filter strength: %u\n",
806 val);
807 return -EINVAL;
808 }
809
810 sys_reg->filter &= ~IQS269_FILT_STR_NP_LTA_MASK;
811 sys_reg->filter |= (val << IQS269_FILT_STR_NP_LTA_SHIFT);
812 }
813
814 if (!device_property_read_u32(&client->dev, "azoteq,filt-str-np-cnt",
815 &val)) {
816 if (val > IQS269_FILT_STR_MAX) {
817 dev_err(&client->dev, "Invalid filter strength: %u\n",
818 val);
819 return -EINVAL;
820 }
821
822 sys_reg->filter &= ~IQS269_FILT_STR_NP_CNT_MASK;
823 sys_reg->filter |= val;
824 }
825
826 if (!device_property_read_u32(&client->dev, "azoteq,rate-np-ms",
827 &val)) {
828 if (val > IQS269_RATE_NP_MS_MAX) {
829 dev_err(&client->dev, "Invalid report rate: %u\n", val);
830 return -EINVAL;
831 }
832
833 sys_reg->rate_np = val;
834 }
835
836 if (!device_property_read_u32(&client->dev, "azoteq,rate-lp-ms",
837 &val)) {
838 if (val > IQS269_RATE_LP_MS_MAX) {
839 dev_err(&client->dev, "Invalid report rate: %u\n", val);
840 return -EINVAL;
841 }
842
843 sys_reg->rate_lp = val;
844 }
845
846 if (!device_property_read_u32(&client->dev, "azoteq,rate-ulp-ms",
847 &val)) {
848 if (val > IQS269_RATE_ULP_MS_MAX) {
849 dev_err(&client->dev, "Invalid report rate: %u\n", val);
850 return -EINVAL;
851 }
852
853 sys_reg->rate_ulp = val / 16;
854 }
855
856 if (!device_property_read_u32(&client->dev, "azoteq,timeout-pwr-ms",
857 &val)) {
858 if (val > IQS269_TIMEOUT_PWR_MS_MAX) {
859 dev_err(&client->dev, "Invalid timeout: %u\n", val);
860 return -EINVAL;
861 }
862
863 sys_reg->timeout_pwr = val / 512;
864 }
865
866 if (!device_property_read_u32(&client->dev, "azoteq,timeout-lta-ms",
867 &val)) {
868 if (val > IQS269_TIMEOUT_LTA_MS_MAX) {
869 dev_err(&client->dev, "Invalid timeout: %u\n", val);
870 return -EINVAL;
871 }
872
873 sys_reg->timeout_lta = val / 512;
874 }
875
876 misc_a = be16_to_cpu(sys_reg->misc_a);
877 misc_b = be16_to_cpu(sys_reg->misc_b);
878
879 misc_a &= ~IQS269_MISC_A_ATI_BAND_DISABLE;
880 if (device_property_present(&client->dev, "azoteq,ati-band-disable"))
881 misc_a |= IQS269_MISC_A_ATI_BAND_DISABLE;
882
883 misc_a &= ~IQS269_MISC_A_ATI_LP_ONLY;
884 if (device_property_present(&client->dev, "azoteq,ati-lp-only"))
885 misc_a |= IQS269_MISC_A_ATI_LP_ONLY;
886
887 misc_a &= ~IQS269_MISC_A_ATI_BAND_TIGHTEN;
888 if (device_property_present(&client->dev, "azoteq,ati-band-tighten"))
889 misc_a |= IQS269_MISC_A_ATI_BAND_TIGHTEN;
890
891 misc_a &= ~IQS269_MISC_A_FILT_DISABLE;
892 if (device_property_present(&client->dev, "azoteq,filt-disable"))
893 misc_a |= IQS269_MISC_A_FILT_DISABLE;
894
895 if (!device_property_read_u32(&client->dev, "azoteq,gpio3-select",
896 &val)) {
897 if (val >= IQS269_NUM_CH) {
898 dev_err(&client->dev, "Invalid GPIO3 selection: %u\n",
899 val);
900 return -EINVAL;
901 }
902
903 misc_a &= ~IQS269_MISC_A_GPIO3_SELECT_MASK;
904 misc_a |= (val << IQS269_MISC_A_GPIO3_SELECT_SHIFT);
905 }
906
907 misc_a &= ~IQS269_MISC_A_DUAL_DIR;
908 if (device_property_present(&client->dev, "azoteq,dual-direction"))
909 misc_a |= IQS269_MISC_A_DUAL_DIR;
910
911 if (!device_property_read_u32(&client->dev, "azoteq,tx-freq", &val)) {
912 if (val > IQS269_MISC_A_TX_FREQ_MAX) {
913 dev_err(&client->dev,
914 "Invalid excitation frequency: %u\n", val);
915 return -EINVAL;
916 }
917
918 misc_a &= ~IQS269_MISC_A_TX_FREQ_MASK;
919 misc_a |= (val << IQS269_MISC_A_TX_FREQ_SHIFT);
920 }
921
922 misc_a &= ~IQS269_MISC_A_GLOBAL_CAP_SIZE;
923 if (device_property_present(&client->dev, "azoteq,global-cap-increase"))
924 misc_a |= IQS269_MISC_A_GLOBAL_CAP_SIZE;
925
926 if (!device_property_read_u32(&client->dev, "azoteq,reseed-select",
927 &val)) {
928 if (val > IQS269_MISC_B_RESEED_UI_SEL_MAX) {
929 dev_err(&client->dev, "Invalid reseed selection: %u\n",
930 val);
931 return -EINVAL;
932 }
933
934 misc_b &= ~IQS269_MISC_B_RESEED_UI_SEL_MASK;
935 misc_b |= (val << IQS269_MISC_B_RESEED_UI_SEL_SHIFT);
936 }
937
938 misc_b &= ~IQS269_MISC_B_TRACKING_UI_ENABLE;
939 if (device_property_present(&client->dev, "azoteq,tracking-enable"))
940 misc_b |= IQS269_MISC_B_TRACKING_UI_ENABLE;
941
942 if (!device_property_read_u32(&client->dev, "azoteq,filt-str-slider",
943 &val)) {
944 if (val > IQS269_FILT_STR_MAX) {
945 dev_err(&client->dev, "Invalid filter strength: %u\n",
946 val);
947 return -EINVAL;
948 }
949
950 misc_b &= ~IQS269_MISC_B_FILT_STR_SLIDER;
951 misc_b |= val;
952 }
953
954 sys_reg->misc_a = cpu_to_be16(misc_a);
955 sys_reg->misc_b = cpu_to_be16(misc_b);
956
957 sys_reg->active = 0;
958 sys_reg->reseed = 0;
959
960 sys_reg->blocking = 0;
961
962 sys_reg->slider_select[0] = 0;
963 sys_reg->slider_select[1] = 0;
964
965 sys_reg->event_mask = ~((u8)IQS269_EVENT_MASK_SYS);
966
967 device_for_each_child_node(&client->dev, ch_node) {
968 error = iqs269_parse_chan(iqs269, ch_node);
969 if (error) {
970 fwnode_handle_put(ch_node);
971 return error;
972 }
973 }
974
975
976
977
978
979 sys_reg->redo_ati = sys_reg->active;
980
981 general = be16_to_cpu(sys_reg->general);
982
983 if (device_property_present(&client->dev, "azoteq,clk-div")) {
984 general |= IQS269_SYS_SETTINGS_CLK_DIV;
985 iqs269->delay_mult = 4;
986 } else {
987 general &= ~IQS269_SYS_SETTINGS_CLK_DIV;
988 iqs269->delay_mult = 1;
989 }
990
991
992
993
994
995
996 general &= ~IQS269_SYS_SETTINGS_ULP_AUTO;
997 general &= ~IQS269_SYS_SETTINGS_DIS_AUTO;
998 general &= ~IQS269_SYS_SETTINGS_PWR_MODE_MASK;
999
1000 if (!device_property_read_u32(&client->dev, "azoteq,ulp-update",
1001 &val)) {
1002 if (val > IQS269_SYS_SETTINGS_ULP_UPDATE_MAX) {
1003 dev_err(&client->dev, "Invalid update rate: %u\n", val);
1004 return -EINVAL;
1005 }
1006
1007 general &= ~IQS269_SYS_SETTINGS_ULP_UPDATE_MASK;
1008 general |= (val << IQS269_SYS_SETTINGS_ULP_UPDATE_SHIFT);
1009 }
1010
1011 general &= ~IQS269_SYS_SETTINGS_RESEED_OFFSET;
1012 if (device_property_present(&client->dev, "azoteq,reseed-offset"))
1013 general |= IQS269_SYS_SETTINGS_RESEED_OFFSET;
1014
1015 general |= IQS269_SYS_SETTINGS_EVENT_MODE;
1016
1017
1018
1019
1020
1021
1022 if (sys_reg->slider_select[0] || sys_reg->slider_select[1])
1023 general |= IQS269_SYS_SETTINGS_EVENT_MODE_LP;
1024
1025 general |= IQS269_SYS_SETTINGS_REDO_ATI;
1026 general |= IQS269_SYS_SETTINGS_ACK_RESET;
1027
1028 sys_reg->general = cpu_to_be16(general);
1029
1030 return 0;
1031}
1032
1033static int iqs269_dev_init(struct iqs269_private *iqs269)
1034{
1035 struct iqs269_sys_reg *sys_reg = &iqs269->sys_reg;
1036 struct iqs269_ch_reg *ch_reg;
1037 unsigned int val;
1038 int error, i;
1039
1040 mutex_lock(&iqs269->lock);
1041
1042 error = regmap_update_bits(iqs269->regmap, IQS269_HALL_UI,
1043 IQS269_HALL_UI_ENABLE,
1044 iqs269->hall_enable ? ~0 : 0);
1045 if (error)
1046 goto err_mutex;
1047
1048 for (i = 0; i < IQS269_NUM_CH; i++) {
1049 if (!(sys_reg->active & BIT(i)))
1050 continue;
1051
1052 ch_reg = &iqs269->ch_reg[i];
1053
1054 error = regmap_raw_write(iqs269->regmap,
1055 IQS269_CHx_SETTINGS + i *
1056 sizeof(*ch_reg) / 2, ch_reg,
1057 sizeof(*ch_reg));
1058 if (error)
1059 goto err_mutex;
1060 }
1061
1062
1063
1064
1065
1066
1067 error = regmap_raw_write(iqs269->regmap, IQS269_SYS_SETTINGS, sys_reg,
1068 sizeof(*sys_reg));
1069 if (error)
1070 goto err_mutex;
1071
1072 error = regmap_read_poll_timeout(iqs269->regmap, IQS269_SYS_FLAGS, val,
1073 !(val & IQS269_SYS_FLAGS_IN_ATI),
1074 IQS269_ATI_POLL_SLEEP_US,
1075 IQS269_ATI_POLL_TIMEOUT_US);
1076 if (error)
1077 goto err_mutex;
1078
1079 msleep(IQS269_ATI_STABLE_DELAY_MS);
1080 iqs269->ati_current = true;
1081
1082err_mutex:
1083 mutex_unlock(&iqs269->lock);
1084
1085 return error;
1086}
1087
1088static int iqs269_input_init(struct iqs269_private *iqs269)
1089{
1090 struct i2c_client *client = iqs269->client;
1091 struct iqs269_flags flags;
1092 unsigned int sw_code, keycode;
1093 int error, i, j;
1094 u8 dir_mask, state;
1095
1096 iqs269->keypad = devm_input_allocate_device(&client->dev);
1097 if (!iqs269->keypad)
1098 return -ENOMEM;
1099
1100 iqs269->keypad->keycodemax = ARRAY_SIZE(iqs269->keycode);
1101 iqs269->keypad->keycode = iqs269->keycode;
1102 iqs269->keypad->keycodesize = sizeof(*iqs269->keycode);
1103
1104 iqs269->keypad->name = "iqs269a_keypad";
1105 iqs269->keypad->id.bustype = BUS_I2C;
1106
1107 if (iqs269->hall_enable) {
1108 error = regmap_raw_read(iqs269->regmap, IQS269_SYS_FLAGS,
1109 &flags, sizeof(flags));
1110 if (error) {
1111 dev_err(&client->dev,
1112 "Failed to read initial status: %d\n", error);
1113 return error;
1114 }
1115 }
1116
1117 for (i = 0; i < ARRAY_SIZE(iqs269_events); i++) {
1118 dir_mask = flags.states[IQS269_ST_OFFS_DIR];
1119 if (!iqs269_events[i].dir_up)
1120 dir_mask = ~dir_mask;
1121
1122 state = flags.states[iqs269_events[i].st_offs] & dir_mask;
1123
1124 sw_code = iqs269->switches[i].code;
1125
1126 for (j = 0; j < IQS269_NUM_CH; j++) {
1127 keycode = iqs269->keycode[i * IQS269_NUM_CH + j];
1128
1129
1130
1131
1132
1133 switch (j) {
1134 case IQS269_CHx_HALL_ACTIVE:
1135 if (iqs269->hall_enable &&
1136 iqs269->switches[i].enabled) {
1137 input_set_capability(iqs269->keypad,
1138 EV_SW, sw_code);
1139 input_report_switch(iqs269->keypad,
1140 sw_code,
1141 state & BIT(j));
1142 }
1143 fallthrough;
1144
1145 case IQS269_CHx_HALL_INACTIVE:
1146 if (iqs269->hall_enable)
1147 continue;
1148 fallthrough;
1149
1150 default:
1151 if (keycode != KEY_RESERVED)
1152 input_set_capability(iqs269->keypad,
1153 EV_KEY, keycode);
1154 }
1155 }
1156 }
1157
1158 input_sync(iqs269->keypad);
1159
1160 error = input_register_device(iqs269->keypad);
1161 if (error) {
1162 dev_err(&client->dev, "Failed to register keypad: %d\n", error);
1163 return error;
1164 }
1165
1166 for (i = 0; i < IQS269_NUM_SL; i++) {
1167 if (!iqs269->sys_reg.slider_select[i])
1168 continue;
1169
1170 iqs269->slider[i] = devm_input_allocate_device(&client->dev);
1171 if (!iqs269->slider[i])
1172 return -ENOMEM;
1173
1174 iqs269->slider[i]->name = i ? "iqs269a_slider_1"
1175 : "iqs269a_slider_0";
1176 iqs269->slider[i]->id.bustype = BUS_I2C;
1177
1178 input_set_capability(iqs269->slider[i], EV_KEY, BTN_TOUCH);
1179 input_set_abs_params(iqs269->slider[i], ABS_X, 0, 255, 0, 0);
1180
1181 error = input_register_device(iqs269->slider[i]);
1182 if (error) {
1183 dev_err(&client->dev,
1184 "Failed to register slider %d: %d\n", i, error);
1185 return error;
1186 }
1187 }
1188
1189 return 0;
1190}
1191
1192static int iqs269_report(struct iqs269_private *iqs269)
1193{
1194 struct i2c_client *client = iqs269->client;
1195 struct iqs269_flags flags;
1196 unsigned int sw_code, keycode;
1197 int error, i, j;
1198 u8 slider_x[IQS269_NUM_SL];
1199 u8 dir_mask, state;
1200
1201 error = regmap_raw_read(iqs269->regmap, IQS269_SYS_FLAGS, &flags,
1202 sizeof(flags));
1203 if (error) {
1204 dev_err(&client->dev, "Failed to read device status: %d\n",
1205 error);
1206 return error;
1207 }
1208
1209
1210
1211
1212
1213
1214 if (be16_to_cpu(flags.system) & IQS269_SYS_FLAGS_SHOW_RESET) {
1215 dev_err(&client->dev, "Unexpected device reset\n");
1216
1217 error = iqs269_dev_init(iqs269);
1218 if (error)
1219 dev_err(&client->dev,
1220 "Failed to re-initialize device: %d\n", error);
1221
1222 return error;
1223 }
1224
1225 error = regmap_raw_read(iqs269->regmap, IQS269_SLIDER_X, slider_x,
1226 sizeof(slider_x));
1227 if (error) {
1228 dev_err(&client->dev, "Failed to read slider position: %d\n",
1229 error);
1230 return error;
1231 }
1232
1233 for (i = 0; i < IQS269_NUM_SL; i++) {
1234 if (!iqs269->sys_reg.slider_select[i])
1235 continue;
1236
1237
1238
1239
1240
1241 if (flags.states[IQS269_ST_OFFS_TOUCH] &
1242 iqs269->sys_reg.slider_select[i]) {
1243 input_report_key(iqs269->slider[i], BTN_TOUCH, 1);
1244 input_report_abs(iqs269->slider[i], ABS_X, slider_x[i]);
1245 } else {
1246 input_report_key(iqs269->slider[i], BTN_TOUCH, 0);
1247 }
1248
1249 input_sync(iqs269->slider[i]);
1250 }
1251
1252 for (i = 0; i < ARRAY_SIZE(iqs269_events); i++) {
1253 dir_mask = flags.states[IQS269_ST_OFFS_DIR];
1254 if (!iqs269_events[i].dir_up)
1255 dir_mask = ~dir_mask;
1256
1257 state = flags.states[iqs269_events[i].st_offs] & dir_mask;
1258
1259 sw_code = iqs269->switches[i].code;
1260
1261 for (j = 0; j < IQS269_NUM_CH; j++) {
1262 keycode = iqs269->keycode[i * IQS269_NUM_CH + j];
1263
1264 switch (j) {
1265 case IQS269_CHx_HALL_ACTIVE:
1266 if (iqs269->hall_enable &&
1267 iqs269->switches[i].enabled)
1268 input_report_switch(iqs269->keypad,
1269 sw_code,
1270 state & BIT(j));
1271 fallthrough;
1272
1273 case IQS269_CHx_HALL_INACTIVE:
1274 if (iqs269->hall_enable)
1275 continue;
1276 fallthrough;
1277
1278 default:
1279 input_report_key(iqs269->keypad, keycode,
1280 state & BIT(j));
1281 }
1282 }
1283 }
1284
1285 input_sync(iqs269->keypad);
1286
1287 return 0;
1288}
1289
1290static irqreturn_t iqs269_irq(int irq, void *context)
1291{
1292 struct iqs269_private *iqs269 = context;
1293
1294 if (iqs269_report(iqs269))
1295 return IRQ_NONE;
1296
1297
1298
1299
1300
1301
1302 iqs269_irq_wait();
1303
1304 return IRQ_HANDLED;
1305}
1306
1307static ssize_t counts_show(struct device *dev,
1308 struct device_attribute *attr, char *buf)
1309{
1310 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1311 struct i2c_client *client = iqs269->client;
1312 __le16 counts;
1313 int error;
1314
1315 if (!iqs269->ati_current || iqs269->hall_enable)
1316 return -EPERM;
1317
1318
1319
1320
1321
1322
1323 disable_irq(client->irq);
1324
1325 error = regmap_raw_read(iqs269->regmap,
1326 IQS269_CHx_COUNTS + iqs269->ch_num * 2,
1327 &counts, sizeof(counts));
1328
1329 iqs269_irq_wait();
1330 enable_irq(client->irq);
1331
1332 if (error)
1333 return error;
1334
1335 return scnprintf(buf, PAGE_SIZE, "%u\n", le16_to_cpu(counts));
1336}
1337
1338static ssize_t hall_bin_show(struct device *dev,
1339 struct device_attribute *attr, char *buf)
1340{
1341 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1342 struct i2c_client *client = iqs269->client;
1343 unsigned int val;
1344 int error;
1345
1346 disable_irq(client->irq);
1347
1348 error = regmap_read(iqs269->regmap, IQS269_CAL_DATA_A, &val);
1349
1350 iqs269_irq_wait();
1351 enable_irq(client->irq);
1352
1353 if (error)
1354 return error;
1355
1356 switch (iqs269->ch_reg[IQS269_CHx_HALL_ACTIVE].rx_enable &
1357 iqs269->ch_reg[IQS269_CHx_HALL_INACTIVE].rx_enable) {
1358 case IQS269_HALL_PAD_R:
1359 val &= IQS269_CAL_DATA_A_HALL_BIN_R_MASK;
1360 val >>= IQS269_CAL_DATA_A_HALL_BIN_R_SHIFT;
1361 break;
1362
1363 case IQS269_HALL_PAD_L:
1364 val &= IQS269_CAL_DATA_A_HALL_BIN_L_MASK;
1365 val >>= IQS269_CAL_DATA_A_HALL_BIN_L_SHIFT;
1366 break;
1367
1368 default:
1369 return -EINVAL;
1370 }
1371
1372 return scnprintf(buf, PAGE_SIZE, "%u\n", val);
1373}
1374
1375static ssize_t hall_enable_show(struct device *dev,
1376 struct device_attribute *attr, char *buf)
1377{
1378 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1379
1380 return scnprintf(buf, PAGE_SIZE, "%u\n", iqs269->hall_enable);
1381}
1382
1383static ssize_t hall_enable_store(struct device *dev,
1384 struct device_attribute *attr, const char *buf,
1385 size_t count)
1386{
1387 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1388 unsigned int val;
1389 int error;
1390
1391 error = kstrtouint(buf, 10, &val);
1392 if (error)
1393 return error;
1394
1395 mutex_lock(&iqs269->lock);
1396
1397 iqs269->hall_enable = val;
1398 iqs269->ati_current = false;
1399
1400 mutex_unlock(&iqs269->lock);
1401
1402 return count;
1403}
1404
1405static ssize_t ch_number_show(struct device *dev,
1406 struct device_attribute *attr, char *buf)
1407{
1408 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1409
1410 return scnprintf(buf, PAGE_SIZE, "%u\n", iqs269->ch_num);
1411}
1412
1413static ssize_t ch_number_store(struct device *dev,
1414 struct device_attribute *attr, const char *buf,
1415 size_t count)
1416{
1417 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1418 unsigned int val;
1419 int error;
1420
1421 error = kstrtouint(buf, 10, &val);
1422 if (error)
1423 return error;
1424
1425 if (val >= IQS269_NUM_CH)
1426 return -EINVAL;
1427
1428 iqs269->ch_num = val;
1429
1430 return count;
1431}
1432
1433static ssize_t rx_enable_show(struct device *dev,
1434 struct device_attribute *attr, char *buf)
1435{
1436 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1437
1438 return scnprintf(buf, PAGE_SIZE, "%u\n",
1439 iqs269->ch_reg[iqs269->ch_num].rx_enable);
1440}
1441
1442static ssize_t rx_enable_store(struct device *dev,
1443 struct device_attribute *attr, const char *buf,
1444 size_t count)
1445{
1446 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1447 unsigned int val;
1448 int error;
1449
1450 error = kstrtouint(buf, 10, &val);
1451 if (error)
1452 return error;
1453
1454 if (val > 0xFF)
1455 return -EINVAL;
1456
1457 mutex_lock(&iqs269->lock);
1458
1459 iqs269->ch_reg[iqs269->ch_num].rx_enable = val;
1460 iqs269->ati_current = false;
1461
1462 mutex_unlock(&iqs269->lock);
1463
1464 return count;
1465}
1466
1467static ssize_t ati_mode_show(struct device *dev,
1468 struct device_attribute *attr, char *buf)
1469{
1470 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1471 unsigned int val;
1472 int error;
1473
1474 error = iqs269_ati_mode_get(iqs269, iqs269->ch_num, &val);
1475 if (error)
1476 return error;
1477
1478 return scnprintf(buf, PAGE_SIZE, "%u\n", val);
1479}
1480
1481static ssize_t ati_mode_store(struct device *dev,
1482 struct device_attribute *attr, const char *buf,
1483 size_t count)
1484{
1485 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1486 unsigned int val;
1487 int error;
1488
1489 error = kstrtouint(buf, 10, &val);
1490 if (error)
1491 return error;
1492
1493 error = iqs269_ati_mode_set(iqs269, iqs269->ch_num, val);
1494 if (error)
1495 return error;
1496
1497 return count;
1498}
1499
1500static ssize_t ati_base_show(struct device *dev,
1501 struct device_attribute *attr, char *buf)
1502{
1503 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1504 unsigned int val;
1505 int error;
1506
1507 error = iqs269_ati_base_get(iqs269, iqs269->ch_num, &val);
1508 if (error)
1509 return error;
1510
1511 return scnprintf(buf, PAGE_SIZE, "%u\n", val);
1512}
1513
1514static ssize_t ati_base_store(struct device *dev,
1515 struct device_attribute *attr, const char *buf,
1516 size_t count)
1517{
1518 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1519 unsigned int val;
1520 int error;
1521
1522 error = kstrtouint(buf, 10, &val);
1523 if (error)
1524 return error;
1525
1526 error = iqs269_ati_base_set(iqs269, iqs269->ch_num, val);
1527 if (error)
1528 return error;
1529
1530 return count;
1531}
1532
1533static ssize_t ati_target_show(struct device *dev,
1534 struct device_attribute *attr, char *buf)
1535{
1536 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1537 unsigned int val;
1538 int error;
1539
1540 error = iqs269_ati_target_get(iqs269, iqs269->ch_num, &val);
1541 if (error)
1542 return error;
1543
1544 return scnprintf(buf, PAGE_SIZE, "%u\n", val);
1545}
1546
1547static ssize_t ati_target_store(struct device *dev,
1548 struct device_attribute *attr, const char *buf,
1549 size_t count)
1550{
1551 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1552 unsigned int val;
1553 int error;
1554
1555 error = kstrtouint(buf, 10, &val);
1556 if (error)
1557 return error;
1558
1559 error = iqs269_ati_target_set(iqs269, iqs269->ch_num, val);
1560 if (error)
1561 return error;
1562
1563 return count;
1564}
1565
1566static ssize_t ati_trigger_show(struct device *dev,
1567 struct device_attribute *attr, char *buf)
1568{
1569 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1570
1571 return scnprintf(buf, PAGE_SIZE, "%u\n", iqs269->ati_current);
1572}
1573
1574static ssize_t ati_trigger_store(struct device *dev,
1575 struct device_attribute *attr, const char *buf,
1576 size_t count)
1577{
1578 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1579 struct i2c_client *client = iqs269->client;
1580 unsigned int val;
1581 int error;
1582
1583 error = kstrtouint(buf, 10, &val);
1584 if (error)
1585 return error;
1586
1587 if (!val)
1588 return count;
1589
1590 disable_irq(client->irq);
1591
1592 error = iqs269_dev_init(iqs269);
1593
1594 iqs269_irq_wait();
1595 enable_irq(client->irq);
1596
1597 if (error)
1598 return error;
1599
1600 return count;
1601}
1602
1603static DEVICE_ATTR_RO(counts);
1604static DEVICE_ATTR_RO(hall_bin);
1605static DEVICE_ATTR_RW(hall_enable);
1606static DEVICE_ATTR_RW(ch_number);
1607static DEVICE_ATTR_RW(rx_enable);
1608static DEVICE_ATTR_RW(ati_mode);
1609static DEVICE_ATTR_RW(ati_base);
1610static DEVICE_ATTR_RW(ati_target);
1611static DEVICE_ATTR_RW(ati_trigger);
1612
1613static struct attribute *iqs269_attrs[] = {
1614 &dev_attr_counts.attr,
1615 &dev_attr_hall_bin.attr,
1616 &dev_attr_hall_enable.attr,
1617 &dev_attr_ch_number.attr,
1618 &dev_attr_rx_enable.attr,
1619 &dev_attr_ati_mode.attr,
1620 &dev_attr_ati_base.attr,
1621 &dev_attr_ati_target.attr,
1622 &dev_attr_ati_trigger.attr,
1623 NULL,
1624};
1625
1626static const struct attribute_group iqs269_attr_group = {
1627 .attrs = iqs269_attrs,
1628};
1629
1630static const struct regmap_config iqs269_regmap_config = {
1631 .reg_bits = 8,
1632 .val_bits = 16,
1633 .max_register = IQS269_MAX_REG,
1634};
1635
1636static int iqs269_probe(struct i2c_client *client)
1637{
1638 struct iqs269_ver_info ver_info;
1639 struct iqs269_private *iqs269;
1640 int error;
1641
1642 iqs269 = devm_kzalloc(&client->dev, sizeof(*iqs269), GFP_KERNEL);
1643 if (!iqs269)
1644 return -ENOMEM;
1645
1646 i2c_set_clientdata(client, iqs269);
1647 iqs269->client = client;
1648
1649 iqs269->regmap = devm_regmap_init_i2c(client, &iqs269_regmap_config);
1650 if (IS_ERR(iqs269->regmap)) {
1651 error = PTR_ERR(iqs269->regmap);
1652 dev_err(&client->dev, "Failed to initialize register map: %d\n",
1653 error);
1654 return error;
1655 }
1656
1657 mutex_init(&iqs269->lock);
1658
1659 error = regmap_raw_read(iqs269->regmap, IQS269_VER_INFO, &ver_info,
1660 sizeof(ver_info));
1661 if (error)
1662 return error;
1663
1664 if (ver_info.prod_num != IQS269_VER_INFO_PROD_NUM) {
1665 dev_err(&client->dev, "Unrecognized product number: 0x%02X\n",
1666 ver_info.prod_num);
1667 return -EINVAL;
1668 }
1669
1670 error = iqs269_parse_prop(iqs269);
1671 if (error)
1672 return error;
1673
1674 error = iqs269_dev_init(iqs269);
1675 if (error) {
1676 dev_err(&client->dev, "Failed to initialize device: %d\n",
1677 error);
1678 return error;
1679 }
1680
1681 error = iqs269_input_init(iqs269);
1682 if (error)
1683 return error;
1684
1685 error = devm_request_threaded_irq(&client->dev, client->irq,
1686 NULL, iqs269_irq, IRQF_ONESHOT,
1687 client->name, iqs269);
1688 if (error) {
1689 dev_err(&client->dev, "Failed to request IRQ: %d\n", error);
1690 return error;
1691 }
1692
1693 error = devm_device_add_group(&client->dev, &iqs269_attr_group);
1694 if (error)
1695 dev_err(&client->dev, "Failed to add attributes: %d\n", error);
1696
1697 return error;
1698}
1699
1700static int __maybe_unused iqs269_suspend(struct device *dev)
1701{
1702 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1703 struct i2c_client *client = iqs269->client;
1704 unsigned int val;
1705 int error;
1706
1707 if (!iqs269->suspend_mode)
1708 return 0;
1709
1710 disable_irq(client->irq);
1711
1712
1713
1714
1715
1716
1717 error = regmap_update_bits(iqs269->regmap, IQS269_SYS_SETTINGS,
1718 IQS269_SYS_SETTINGS_DIS_AUTO, ~0);
1719 if (error)
1720 goto err_irq;
1721
1722
1723
1724
1725
1726 error = regmap_read_poll_timeout(iqs269->regmap, IQS269_SYS_FLAGS, val,
1727 !(val & IQS269_SYS_FLAGS_PWR_MODE_MASK),
1728 IQS269_PWR_MODE_POLL_SLEEP_US,
1729 IQS269_PWR_MODE_POLL_TIMEOUT_US);
1730 if (error)
1731 goto err_irq;
1732
1733 error = regmap_update_bits(iqs269->regmap, IQS269_SYS_SETTINGS,
1734 IQS269_SYS_SETTINGS_PWR_MODE_MASK,
1735 iqs269->suspend_mode <<
1736 IQS269_SYS_SETTINGS_PWR_MODE_SHIFT);
1737 if (error)
1738 goto err_irq;
1739
1740
1741
1742
1743
1744
1745 error = regmap_read_poll_timeout(iqs269->regmap, IQS269_SYS_FLAGS, val,
1746 (val & IQS269_SYS_FLAGS_PWR_MODE_MASK)
1747 == (iqs269->suspend_mode <<
1748 IQS269_SYS_FLAGS_PWR_MODE_SHIFT),
1749 IQS269_PWR_MODE_POLL_SLEEP_US,
1750 IQS269_PWR_MODE_POLL_TIMEOUT_US);
1751
1752err_irq:
1753 iqs269_irq_wait();
1754 enable_irq(client->irq);
1755
1756 return error;
1757}
1758
1759static int __maybe_unused iqs269_resume(struct device *dev)
1760{
1761 struct iqs269_private *iqs269 = dev_get_drvdata(dev);
1762 struct i2c_client *client = iqs269->client;
1763 unsigned int val;
1764 int error;
1765
1766 if (!iqs269->suspend_mode)
1767 return 0;
1768
1769 disable_irq(client->irq);
1770
1771 error = regmap_update_bits(iqs269->regmap, IQS269_SYS_SETTINGS,
1772 IQS269_SYS_SETTINGS_PWR_MODE_MASK, 0);
1773 if (error)
1774 goto err_irq;
1775
1776
1777
1778
1779
1780 error = regmap_read_poll_timeout(iqs269->regmap, IQS269_SYS_FLAGS, val,
1781 !(val & IQS269_SYS_FLAGS_PWR_MODE_MASK),
1782 IQS269_PWR_MODE_POLL_SLEEP_US,
1783 IQS269_PWR_MODE_POLL_TIMEOUT_US);
1784 if (error)
1785 goto err_irq;
1786
1787 error = regmap_update_bits(iqs269->regmap, IQS269_SYS_SETTINGS,
1788 IQS269_SYS_SETTINGS_DIS_AUTO, 0);
1789 if (error)
1790 goto err_irq;
1791
1792
1793
1794
1795
1796
1797 error = iqs269_report(iqs269);
1798
1799err_irq:
1800 iqs269_irq_wait();
1801 enable_irq(client->irq);
1802
1803 return error;
1804}
1805
1806static SIMPLE_DEV_PM_OPS(iqs269_pm, iqs269_suspend, iqs269_resume);
1807
1808static const struct of_device_id iqs269_of_match[] = {
1809 { .compatible = "azoteq,iqs269a" },
1810 { }
1811};
1812MODULE_DEVICE_TABLE(of, iqs269_of_match);
1813
1814static struct i2c_driver iqs269_i2c_driver = {
1815 .driver = {
1816 .name = "iqs269a",
1817 .of_match_table = iqs269_of_match,
1818 .pm = &iqs269_pm,
1819 },
1820 .probe_new = iqs269_probe,
1821};
1822module_i2c_driver(iqs269_i2c_driver);
1823
1824MODULE_AUTHOR("Jeff LaBundy <jeff@labundy.com>");
1825MODULE_DESCRIPTION("Azoteq IQS269A Capacitive Touch Controller");
1826MODULE_LICENSE("GPL");
1827
