linux/drivers/media/dvb-frontends/sp887x.c
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   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3   Driver for the Spase sp887x demodulator
   4*/
   5
   6/*
   7 * This driver needs external firmware. Please use the command
   8 * "<kerneldir>/scripts/get_dvb_firmware sp887x" to
   9 * download/extract it, and then copy it to /usr/lib/hotplug/firmware
  10 * or /lib/firmware (depending on configuration of firmware hotplug).
  11 */
  12#define SP887X_DEFAULT_FIRMWARE "dvb-fe-sp887x.fw"
  13
  14#include <linux/init.h>
  15#include <linux/module.h>
  16#include <linux/device.h>
  17#include <linux/firmware.h>
  18#include <linux/string.h>
  19#include <linux/slab.h>
  20
  21#include <media/dvb_frontend.h>
  22#include "sp887x.h"
  23
  24
  25struct sp887x_state {
  26        struct i2c_adapter* i2c;
  27        const struct sp887x_config* config;
  28        struct dvb_frontend frontend;
  29
  30        /* demodulator private data */
  31        u8 initialised:1;
  32};
  33
  34static int debug;
  35#define dprintk(args...) \
  36        do { \
  37                if (debug) printk(KERN_DEBUG "sp887x: " args); \
  38        } while (0)
  39
  40static int i2c_writebytes (struct sp887x_state* state, u8 *buf, u8 len)
  41{
  42        struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = len };
  43        int err;
  44
  45        if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  46                printk ("%s: i2c write error (addr %02x, err == %i)\n",
  47                        __func__, state->config->demod_address, err);
  48                return -EREMOTEIO;
  49        }
  50
  51        return 0;
  52}
  53
  54static int sp887x_writereg (struct sp887x_state* state, u16 reg, u16 data)
  55{
  56        u8 b0 [] = { reg >> 8 , reg & 0xff, data >> 8, data & 0xff };
  57        struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 4 };
  58        int ret;
  59
  60        if ((ret = i2c_transfer(state->i2c, &msg, 1)) != 1) {
  61                /*
  62                 *  in case of soft reset we ignore ACK errors...
  63                 */
  64                if (!(reg == 0xf1a && data == 0x000 &&
  65                        (ret == -EREMOTEIO || ret == -EFAULT)))
  66                {
  67                        printk("%s: writereg error (reg %03x, data %03x, ret == %i)\n",
  68                               __func__, reg & 0xffff, data & 0xffff, ret);
  69                        return ret;
  70                }
  71        }
  72
  73        return 0;
  74}
  75
  76static int sp887x_readreg (struct sp887x_state* state, u16 reg)
  77{
  78        u8 b0 [] = { reg >> 8 , reg & 0xff };
  79        u8 b1 [2];
  80        int ret;
  81        struct i2c_msg msg[] = {{ .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 2 },
  82                         { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 2 }};
  83
  84        if ((ret = i2c_transfer(state->i2c, msg, 2)) != 2) {
  85                printk("%s: readreg error (ret == %i)\n", __func__, ret);
  86                return -1;
  87        }
  88
  89        return (((b1[0] << 8) | b1[1]) & 0xfff);
  90}
  91
  92static void sp887x_microcontroller_stop (struct sp887x_state* state)
  93{
  94        dprintk("%s\n", __func__);
  95        sp887x_writereg(state, 0xf08, 0x000);
  96        sp887x_writereg(state, 0xf09, 0x000);
  97
  98        /* microcontroller STOP */
  99        sp887x_writereg(state, 0xf00, 0x000);
 100}
 101
 102static void sp887x_microcontroller_start (struct sp887x_state* state)
 103{
 104        dprintk("%s\n", __func__);
 105        sp887x_writereg(state, 0xf08, 0x000);
 106        sp887x_writereg(state, 0xf09, 0x000);
 107
 108        /* microcontroller START */
 109        sp887x_writereg(state, 0xf00, 0x001);
 110}
 111
 112static void sp887x_setup_agc (struct sp887x_state* state)
 113{
 114        /* setup AGC parameters */
 115        dprintk("%s\n", __func__);
 116        sp887x_writereg(state, 0x33c, 0x054);
 117        sp887x_writereg(state, 0x33b, 0x04c);
 118        sp887x_writereg(state, 0x328, 0x000);
 119        sp887x_writereg(state, 0x327, 0x005);
 120        sp887x_writereg(state, 0x326, 0x001);
 121        sp887x_writereg(state, 0x325, 0x001);
 122        sp887x_writereg(state, 0x324, 0x001);
 123        sp887x_writereg(state, 0x318, 0x050);
 124        sp887x_writereg(state, 0x317, 0x3fe);
 125        sp887x_writereg(state, 0x316, 0x001);
 126        sp887x_writereg(state, 0x313, 0x005);
 127        sp887x_writereg(state, 0x312, 0x002);
 128        sp887x_writereg(state, 0x306, 0x000);
 129        sp887x_writereg(state, 0x303, 0x000);
 130}
 131
 132#define BLOCKSIZE 30
 133#define FW_SIZE 0x4000
 134/*
 135 *  load firmware and setup MPEG interface...
 136 */
 137static int sp887x_initial_setup (struct dvb_frontend* fe, const struct firmware *fw)
 138{
 139        struct sp887x_state* state = fe->demodulator_priv;
 140        u8 buf [BLOCKSIZE + 2];
 141        int i;
 142        int fw_size = fw->size;
 143        const unsigned char *mem = fw->data;
 144
 145        dprintk("%s\n", __func__);
 146
 147        /* ignore the first 10 bytes, then we expect 0x4000 bytes of firmware */
 148        if (fw_size < FW_SIZE + 10)
 149                return -ENODEV;
 150
 151        mem = fw->data + 10;
 152
 153        /* soft reset */
 154        sp887x_writereg(state, 0xf1a, 0x000);
 155
 156        sp887x_microcontroller_stop (state);
 157
 158        printk ("%s: firmware upload... ", __func__);
 159
 160        /* setup write pointer to -1 (end of memory) */
 161        /* bit 0x8000 in address is set to enable 13bit mode */
 162        sp887x_writereg(state, 0x8f08, 0x1fff);
 163
 164        /* dummy write (wrap around to start of memory) */
 165        sp887x_writereg(state, 0x8f0a, 0x0000);
 166
 167        for (i = 0; i < FW_SIZE; i += BLOCKSIZE) {
 168                int c = BLOCKSIZE;
 169                int err;
 170
 171                if (c > FW_SIZE - i)
 172                        c = FW_SIZE - i;
 173
 174                /* bit 0x8000 in address is set to enable 13bit mode */
 175                /* bit 0x4000 enables multibyte read/write transfers */
 176                /* write register is 0xf0a */
 177                buf[0] = 0xcf;
 178                buf[1] = 0x0a;
 179
 180                memcpy(&buf[2], mem + i, c);
 181
 182                if ((err = i2c_writebytes (state, buf, c+2)) < 0) {
 183                        printk ("failed.\n");
 184                        printk ("%s: i2c error (err == %i)\n", __func__, err);
 185                        return err;
 186                }
 187        }
 188
 189        /* don't write RS bytes between packets */
 190        sp887x_writereg(state, 0xc13, 0x001);
 191
 192        /* suppress clock if (!data_valid) */
 193        sp887x_writereg(state, 0xc14, 0x000);
 194
 195        /* setup MPEG interface... */
 196        sp887x_writereg(state, 0xc1a, 0x872);
 197        sp887x_writereg(state, 0xc1b, 0x001);
 198        sp887x_writereg(state, 0xc1c, 0x000); /* parallel mode (serial mode == 1) */
 199        sp887x_writereg(state, 0xc1a, 0x871);
 200
 201        /* ADC mode, 2 for MT8872, 3 for SP8870/SP8871 */
 202        sp887x_writereg(state, 0x301, 0x002);
 203
 204        sp887x_setup_agc(state);
 205
 206        /* bit 0x010: enable data valid signal */
 207        sp887x_writereg(state, 0xd00, 0x010);
 208        sp887x_writereg(state, 0x0d1, 0x000);
 209        return 0;
 210};
 211
 212static int configure_reg0xc05(struct dtv_frontend_properties *p, u16 *reg0xc05)
 213{
 214        int known_parameters = 1;
 215
 216        *reg0xc05 = 0x000;
 217
 218        switch (p->modulation) {
 219        case QPSK:
 220                break;
 221        case QAM_16:
 222                *reg0xc05 |= (1 << 10);
 223                break;
 224        case QAM_64:
 225                *reg0xc05 |= (2 << 10);
 226                break;
 227        case QAM_AUTO:
 228                known_parameters = 0;
 229                break;
 230        default:
 231                return -EINVAL;
 232        }
 233
 234        switch (p->hierarchy) {
 235        case HIERARCHY_NONE:
 236                break;
 237        case HIERARCHY_1:
 238                *reg0xc05 |= (1 << 7);
 239                break;
 240        case HIERARCHY_2:
 241                *reg0xc05 |= (2 << 7);
 242                break;
 243        case HIERARCHY_4:
 244                *reg0xc05 |= (3 << 7);
 245                break;
 246        case HIERARCHY_AUTO:
 247                known_parameters = 0;
 248                break;
 249        default:
 250                return -EINVAL;
 251        }
 252
 253        switch (p->code_rate_HP) {
 254        case FEC_1_2:
 255                break;
 256        case FEC_2_3:
 257                *reg0xc05 |= (1 << 3);
 258                break;
 259        case FEC_3_4:
 260                *reg0xc05 |= (2 << 3);
 261                break;
 262        case FEC_5_6:
 263                *reg0xc05 |= (3 << 3);
 264                break;
 265        case FEC_7_8:
 266                *reg0xc05 |= (4 << 3);
 267                break;
 268        case FEC_AUTO:
 269                known_parameters = 0;
 270                break;
 271        default:
 272                return -EINVAL;
 273        }
 274
 275        if (known_parameters)
 276                *reg0xc05 |= (2 << 1);  /* use specified parameters */
 277        else
 278                *reg0xc05 |= (1 << 1);  /* enable autoprobing */
 279
 280        return 0;
 281}
 282
 283/*
 284 *  estimates division of two 24bit numbers,
 285 *  derived from the ves1820/stv0299 driver code
 286 */
 287static void divide (int n, int d, int *quotient_i, int *quotient_f)
 288{
 289        unsigned int q, r;
 290
 291        r = (n % d) << 8;
 292        q = (r / d);
 293
 294        if (quotient_i)
 295                *quotient_i = q;
 296
 297        if (quotient_f) {
 298                r = (r % d) << 8;
 299                q = (q << 8) | (r / d);
 300                r = (r % d) << 8;
 301                *quotient_f = (q << 8) | (r / d);
 302        }
 303}
 304
 305static void sp887x_correct_offsets (struct sp887x_state* state,
 306                                    struct dtv_frontend_properties *p,
 307                                    int actual_freq)
 308{
 309        static const u32 srate_correction [] = { 1879617, 4544878, 8098561 };
 310        int bw_index;
 311        int freq_offset = actual_freq - p->frequency;
 312        int sysclock = 61003; //[kHz]
 313        int ifreq = 36000000;
 314        int freq;
 315        int frequency_shift;
 316
 317        switch (p->bandwidth_hz) {
 318        default:
 319        case 8000000:
 320                bw_index = 0;
 321                break;
 322        case 7000000:
 323                bw_index = 1;
 324                break;
 325        case 6000000:
 326                bw_index = 2;
 327                break;
 328        }
 329
 330        if (p->inversion == INVERSION_ON)
 331                freq = ifreq - freq_offset;
 332        else
 333                freq = ifreq + freq_offset;
 334
 335        divide(freq / 333, sysclock, NULL, &frequency_shift);
 336
 337        if (p->inversion == INVERSION_ON)
 338                frequency_shift = -frequency_shift;
 339
 340        /* sample rate correction */
 341        sp887x_writereg(state, 0x319, srate_correction[bw_index] >> 12);
 342        sp887x_writereg(state, 0x31a, srate_correction[bw_index] & 0xfff);
 343
 344        /* carrier offset correction */
 345        sp887x_writereg(state, 0x309, frequency_shift >> 12);
 346        sp887x_writereg(state, 0x30a, frequency_shift & 0xfff);
 347}
 348
 349static int sp887x_setup_frontend_parameters(struct dvb_frontend *fe)
 350{
 351        struct dtv_frontend_properties *p = &fe->dtv_property_cache;
 352        struct sp887x_state* state = fe->demodulator_priv;
 353        unsigned actual_freq;
 354        int err;
 355        u16 val, reg0xc05;
 356
 357        if (p->bandwidth_hz != 8000000 &&
 358            p->bandwidth_hz != 7000000 &&
 359            p->bandwidth_hz != 6000000)
 360                return -EINVAL;
 361
 362        if ((err = configure_reg0xc05(p, &reg0xc05)))
 363                return err;
 364
 365        sp887x_microcontroller_stop(state);
 366
 367        /* setup the PLL */
 368        if (fe->ops.tuner_ops.set_params) {
 369                fe->ops.tuner_ops.set_params(fe);
 370                if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
 371        }
 372        if (fe->ops.tuner_ops.get_frequency) {
 373                fe->ops.tuner_ops.get_frequency(fe, &actual_freq);
 374                if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
 375        } else {
 376                actual_freq = p->frequency;
 377        }
 378
 379        /* read status reg in order to clear <pending irqs */
 380        sp887x_readreg(state, 0x200);
 381
 382        sp887x_correct_offsets(state, p, actual_freq);
 383
 384        /* filter for 6/7/8 Mhz channel */
 385        if (p->bandwidth_hz == 6000000)
 386                val = 2;
 387        else if (p->bandwidth_hz == 7000000)
 388                val = 1;
 389        else
 390                val = 0;
 391
 392        sp887x_writereg(state, 0x311, val);
 393
 394        /* scan order: 2k first = 0, 8k first = 1 */
 395        if (p->transmission_mode == TRANSMISSION_MODE_2K)
 396                sp887x_writereg(state, 0x338, 0x000);
 397        else
 398                sp887x_writereg(state, 0x338, 0x001);
 399
 400        sp887x_writereg(state, 0xc05, reg0xc05);
 401
 402        if (p->bandwidth_hz == 6000000)
 403                val = 2 << 3;
 404        else if (p->bandwidth_hz == 7000000)
 405                val = 3 << 3;
 406        else
 407                val = 0 << 3;
 408
 409        /* enable OFDM and SAW bits as lock indicators in sync register 0xf17,
 410         * optimize algorithm for given bandwidth...
 411         */
 412        sp887x_writereg(state, 0xf14, 0x160 | val);
 413        sp887x_writereg(state, 0xf15, 0x000);
 414
 415        sp887x_microcontroller_start(state);
 416        return 0;
 417}
 418
 419static int sp887x_read_status(struct dvb_frontend *fe, enum fe_status *status)
 420{
 421        struct sp887x_state* state = fe->demodulator_priv;
 422        u16 snr12 = sp887x_readreg(state, 0xf16);
 423        u16 sync0x200 = sp887x_readreg(state, 0x200);
 424        u16 sync0xf17 = sp887x_readreg(state, 0xf17);
 425
 426        *status = 0;
 427
 428        if (snr12 > 0x00f)
 429                *status |= FE_HAS_SIGNAL;
 430
 431        //if (sync0x200 & 0x004)
 432        //      *status |= FE_HAS_SYNC | FE_HAS_CARRIER;
 433
 434        //if (sync0x200 & 0x008)
 435        //      *status |= FE_HAS_VITERBI;
 436
 437        if ((sync0xf17 & 0x00f) == 0x002) {
 438                *status |= FE_HAS_LOCK;
 439                *status |= FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_CARRIER;
 440        }
 441
 442        if (sync0x200 & 0x001) {        /* tuner adjustment requested...*/
 443                int steps = (sync0x200 >> 4) & 0x00f;
 444                if (steps & 0x008)
 445                        steps = -steps;
 446                dprintk("sp887x: implement tuner adjustment (%+i steps)!!\n",
 447                       steps);
 448        }
 449
 450        return 0;
 451}
 452
 453static int sp887x_read_ber(struct dvb_frontend* fe, u32* ber)
 454{
 455        struct sp887x_state* state = fe->demodulator_priv;
 456
 457        *ber = (sp887x_readreg(state, 0xc08) & 0x3f) |
 458               (sp887x_readreg(state, 0xc07) << 6);
 459        sp887x_writereg(state, 0xc08, 0x000);
 460        sp887x_writereg(state, 0xc07, 0x000);
 461        if (*ber >= 0x3fff0)
 462                *ber = ~0;
 463
 464        return 0;
 465}
 466
 467static int sp887x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 468{
 469        struct sp887x_state* state = fe->demodulator_priv;
 470
 471        u16 snr12 = sp887x_readreg(state, 0xf16);
 472        u32 signal = 3 * (snr12 << 4);
 473        *strength = (signal < 0xffff) ? signal : 0xffff;
 474
 475        return 0;
 476}
 477
 478static int sp887x_read_snr(struct dvb_frontend* fe, u16* snr)
 479{
 480        struct sp887x_state* state = fe->demodulator_priv;
 481
 482        u16 snr12 = sp887x_readreg(state, 0xf16);
 483        *snr = (snr12 << 4) | (snr12 >> 8);
 484
 485        return 0;
 486}
 487
 488static int sp887x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 489{
 490        struct sp887x_state* state = fe->demodulator_priv;
 491
 492        *ucblocks = sp887x_readreg(state, 0xc0c);
 493        if (*ucblocks == 0xfff)
 494                *ucblocks = ~0;
 495
 496        return 0;
 497}
 498
 499static int sp887x_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
 500{
 501        struct sp887x_state* state = fe->demodulator_priv;
 502
 503        if (enable) {
 504                return sp887x_writereg(state, 0x206, 0x001);
 505        } else {
 506                return sp887x_writereg(state, 0x206, 0x000);
 507        }
 508}
 509
 510static int sp887x_sleep(struct dvb_frontend* fe)
 511{
 512        struct sp887x_state* state = fe->demodulator_priv;
 513
 514        /* tristate TS output and disable interface pins */
 515        sp887x_writereg(state, 0xc18, 0x000);
 516
 517        return 0;
 518}
 519
 520static int sp887x_init(struct dvb_frontend* fe)
 521{
 522        struct sp887x_state* state = fe->demodulator_priv;
 523        const struct firmware *fw = NULL;
 524        int ret;
 525
 526        if (!state->initialised) {
 527                /* request the firmware, this will block until someone uploads it */
 528                printk("sp887x: waiting for firmware upload (%s)...\n", SP887X_DEFAULT_FIRMWARE);
 529                ret = state->config->request_firmware(fe, &fw, SP887X_DEFAULT_FIRMWARE);
 530                if (ret) {
 531                        printk("sp887x: no firmware upload (timeout or file not found?)\n");
 532                        return ret;
 533                }
 534
 535                ret = sp887x_initial_setup(fe, fw);
 536                release_firmware(fw);
 537                if (ret) {
 538                        printk("sp887x: writing firmware to device failed\n");
 539                        return ret;
 540                }
 541                printk("sp887x: firmware upload complete\n");
 542                state->initialised = 1;
 543        }
 544
 545        /* enable TS output and interface pins */
 546        sp887x_writereg(state, 0xc18, 0x00d);
 547
 548        return 0;
 549}
 550
 551static int sp887x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
 552{
 553        fesettings->min_delay_ms = 350;
 554        fesettings->step_size = 166666*2;
 555        fesettings->max_drift = (166666*2)+1;
 556        return 0;
 557}
 558
 559static void sp887x_release(struct dvb_frontend* fe)
 560{
 561        struct sp887x_state* state = fe->demodulator_priv;
 562        kfree(state);
 563}
 564
 565static const struct dvb_frontend_ops sp887x_ops;
 566
 567struct dvb_frontend* sp887x_attach(const struct sp887x_config* config,
 568                                   struct i2c_adapter* i2c)
 569{
 570        struct sp887x_state* state = NULL;
 571
 572        /* allocate memory for the internal state */
 573        state = kzalloc(sizeof(struct sp887x_state), GFP_KERNEL);
 574        if (state == NULL) goto error;
 575
 576        /* setup the state */
 577        state->config = config;
 578        state->i2c = i2c;
 579        state->initialised = 0;
 580
 581        /* check if the demod is there */
 582        if (sp887x_readreg(state, 0x0200) < 0) goto error;
 583
 584        /* create dvb_frontend */
 585        memcpy(&state->frontend.ops, &sp887x_ops, sizeof(struct dvb_frontend_ops));
 586        state->frontend.demodulator_priv = state;
 587        return &state->frontend;
 588
 589error:
 590        kfree(state);
 591        return NULL;
 592}
 593
 594static const struct dvb_frontend_ops sp887x_ops = {
 595        .delsys = { SYS_DVBT },
 596        .info = {
 597                .name = "Spase SP887x DVB-T",
 598                .frequency_min_hz =  50500 * kHz,
 599                .frequency_max_hz = 858000 * kHz,
 600                .frequency_stepsize_hz = 166666,
 601                .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
 602                        FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
 603                        FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
 604                        FE_CAN_RECOVER
 605        },
 606
 607        .release = sp887x_release,
 608
 609        .init = sp887x_init,
 610        .sleep = sp887x_sleep,
 611        .i2c_gate_ctrl = sp887x_i2c_gate_ctrl,
 612
 613        .set_frontend = sp887x_setup_frontend_parameters,
 614        .get_tune_settings = sp887x_get_tune_settings,
 615
 616        .read_status = sp887x_read_status,
 617        .read_ber = sp887x_read_ber,
 618        .read_signal_strength = sp887x_read_signal_strength,
 619        .read_snr = sp887x_read_snr,
 620        .read_ucblocks = sp887x_read_ucblocks,
 621};
 622
 623module_param(debug, int, 0644);
 624MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
 625
 626MODULE_DESCRIPTION("Spase sp887x DVB-T demodulator driver");
 627MODULE_LICENSE("GPL");
 628
 629EXPORT_SYMBOL(sp887x_attach);
 630