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13#include <linux/delay.h>
14#include <linux/device.h>
15#include <linux/fwnode.h>
16#include <linux/gpio/consumer.h>
17#include <linux/gpio/driver.h>
18#include <linux/i2c.h>
19#include <linux/i2c-mux.h>
20#include <linux/module.h>
21#include <linux/mutex.h>
22#include <linux/of_graph.h>
23#include <linux/regulator/consumer.h>
24#include <linux/slab.h>
25
26#include <media/v4l2-async.h>
27#include <media/v4l2-ctrls.h>
28#include <media/v4l2-device.h>
29#include <media/v4l2-fwnode.h>
30#include <media/v4l2-subdev.h>
31
32
33#define MAX9286_MSTLINKSEL_AUTO (7 << 5)
34#define MAX9286_MSTLINKSEL(n) ((n) << 5)
35#define MAX9286_EN_VS_GEN BIT(4)
36#define MAX9286_LINKEN(n) (1 << (n))
37
38#define MAX9286_FSYNCMODE_ECU (3 << 6)
39#define MAX9286_FSYNCMODE_EXT (2 << 6)
40#define MAX9286_FSYNCMODE_INT_OUT (1 << 6)
41#define MAX9286_FSYNCMODE_INT_HIZ (0 << 6)
42#define MAX9286_GPIEN BIT(5)
43#define MAX9286_ENLMO_RSTFSYNC BIT(2)
44#define MAX9286_FSYNCMETH_AUTO (2 << 0)
45#define MAX9286_FSYNCMETH_SEMI_AUTO (1 << 0)
46#define MAX9286_FSYNCMETH_MANUAL (0 << 0)
47#define MAX9286_REG_FSYNC_PERIOD_L 0x06
48#define MAX9286_REG_FSYNC_PERIOD_M 0x07
49#define MAX9286_REG_FSYNC_PERIOD_H 0x08
50
51#define MAX9286_FWDCCEN(n) (1 << ((n) + 4))
52#define MAX9286_REVCCEN(n) (1 << (n))
53
54#define MAX9286_HVEN BIT(7)
55#define MAX9286_EDC_6BIT_HAMMING (2 << 5)
56#define MAX9286_EDC_6BIT_CRC (1 << 5)
57#define MAX9286_EDC_1BIT_PARITY (0 << 5)
58#define MAX9286_DESEL BIT(4)
59#define MAX9286_INVVS BIT(3)
60#define MAX9286_INVHS BIT(2)
61#define MAX9286_HVSRC_D0 (2 << 0)
62#define MAX9286_HVSRC_D14 (1 << 0)
63#define MAX9286_HVSRC_D18 (0 << 0)
64
65#define MAX9286_0X0F_RESERVED BIT(3)
66
67#define MAX9286_CSILANECNT(n) (((n) - 1) << 6)
68#define MAX9286_CSIDBL BIT(5)
69#define MAX9286_DBL BIT(4)
70#define MAX9286_DATATYPE_USER_8BIT (11 << 0)
71#define MAX9286_DATATYPE_USER_YUV_12BIT (10 << 0)
72#define MAX9286_DATATYPE_USER_24BIT (9 << 0)
73#define MAX9286_DATATYPE_RAW14 (8 << 0)
74#define MAX9286_DATATYPE_RAW11 (7 << 0)
75#define MAX9286_DATATYPE_RAW10 (6 << 0)
76#define MAX9286_DATATYPE_RAW8 (5 << 0)
77#define MAX9286_DATATYPE_YUV422_10BIT (4 << 0)
78#define MAX9286_DATATYPE_YUV422_8BIT (3 << 0)
79#define MAX9286_DATATYPE_RGB555 (2 << 0)
80#define MAX9286_DATATYPE_RGB565 (1 << 0)
81#define MAX9286_DATATYPE_RGB888 (0 << 0)
82
83#define MAX9286_VC(n) ((n) << 5)
84#define MAX9286_VCTYPE BIT(4)
85#define MAX9286_CSIOUTEN BIT(3)
86#define MAX9286_0X15_RESV (3 << 0)
87
88#define MAX9286_SWITCHIN(n) (1 << ((n) + 4))
89#define MAX9286_ENEQ(n) (1 << (n))
90
91#define MAX9286_LOCKED BIT(7)
92
93#define MAX9286_FSYNC_LOCKED BIT(6)
94
95#define MAX9286_I2CLOCACK BIT(7)
96#define MAX9286_I2CSLVSH_1046NS_469NS (3 << 5)
97#define MAX9286_I2CSLVSH_938NS_352NS (2 << 5)
98#define MAX9286_I2CSLVSH_469NS_234NS (1 << 5)
99#define MAX9286_I2CSLVSH_352NS_117NS (0 << 5)
100#define MAX9286_I2CMSTBT_837KBPS (7 << 2)
101#define MAX9286_I2CMSTBT_533KBPS (6 << 2)
102#define MAX9286_I2CMSTBT_339KBPS (5 << 2)
103#define MAX9286_I2CMSTBT_173KBPS (4 << 2)
104#define MAX9286_I2CMSTBT_105KBPS (3 << 2)
105#define MAX9286_I2CMSTBT_84KBPS (2 << 2)
106#define MAX9286_I2CMSTBT_28KBPS (1 << 2)
107#define MAX9286_I2CMSTBT_8KBPS (0 << 2)
108#define MAX9286_I2CSLVTO_NONE (3 << 0)
109#define MAX9286_I2CSLVTO_1024US (2 << 0)
110#define MAX9286_I2CSLVTO_256US (1 << 0)
111#define MAX9286_I2CSLVTO_64US (0 << 0)
112
113#define MAX9286_REV_TRF(n) ((n) << 4)
114#define MAX9286_REV_AMP(n) ((((n) - 30) / 10) << 1)
115#define MAX9286_REV_AMP_X BIT(0)
116#define MAX9286_REV_AMP_HIGH 170
117
118#define MAX9286_EN_REV_CFG BIT(6)
119#define MAX9286_REV_FLEN(n) ((n) - 20)
120
121#define MAX9286_VIDEO_DETECT_MASK 0x0f
122
123#define MAX9286_LFLTBMONMASKED BIT(7)
124#define MAX9286_LOCKMONMASKED BIT(6)
125#define MAX9286_AUTOCOMBACKEN BIT(5)
126#define MAX9286_AUTOMASKEN BIT(4)
127#define MAX9286_MASKLINK(n) ((n) << 0)
128
129
130
131
132
133#define MAX9286_NUM_GMSL 4
134#define MAX9286_N_SINKS 4
135#define MAX9286_N_PADS 5
136#define MAX9286_SRC_PAD 4
137
138struct max9286_source {
139 struct v4l2_subdev *sd;
140 struct fwnode_handle *fwnode;
141};
142
143struct max9286_asd {
144 struct v4l2_async_subdev base;
145 struct max9286_source *source;
146};
147
148static inline struct max9286_asd *to_max9286_asd(struct v4l2_async_subdev *asd)
149{
150 return container_of(asd, struct max9286_asd, base);
151}
152
153struct max9286_priv {
154 struct i2c_client *client;
155 struct gpio_desc *gpiod_pwdn;
156 struct v4l2_subdev sd;
157 struct media_pad pads[MAX9286_N_PADS];
158 struct regulator *regulator;
159
160 struct gpio_chip gpio;
161 u8 gpio_state;
162
163 struct i2c_mux_core *mux;
164 unsigned int mux_channel;
165 bool mux_open;
166
167
168 u32 init_rev_chan_mv;
169 u32 rev_chan_mv;
170
171 struct v4l2_ctrl_handler ctrls;
172 struct v4l2_ctrl *pixelrate;
173
174 struct v4l2_mbus_framefmt fmt[MAX9286_N_SINKS];
175
176
177 struct mutex mutex;
178
179 unsigned int nsources;
180 unsigned int source_mask;
181 unsigned int route_mask;
182 unsigned int bound_sources;
183 unsigned int csi2_data_lanes;
184 struct max9286_source sources[MAX9286_NUM_GMSL];
185 struct v4l2_async_notifier notifier;
186};
187
188static struct max9286_source *next_source(struct max9286_priv *priv,
189 struct max9286_source *source)
190{
191 if (!source)
192 source = &priv->sources[0];
193 else
194 source++;
195
196 for (; source < &priv->sources[MAX9286_NUM_GMSL]; source++) {
197 if (source->fwnode)
198 return source;
199 }
200
201 return NULL;
202}
203
204#define for_each_source(priv, source) \
205 for ((source) = NULL; ((source) = next_source((priv), (source))); )
206
207#define to_index(priv, source) ((source) - &(priv)->sources[0])
208
209static inline struct max9286_priv *sd_to_max9286(struct v4l2_subdev *sd)
210{
211 return container_of(sd, struct max9286_priv, sd);
212}
213
214
215
216
217
218static int max9286_read(struct max9286_priv *priv, u8 reg)
219{
220 int ret;
221
222 ret = i2c_smbus_read_byte_data(priv->client, reg);
223 if (ret < 0)
224 dev_err(&priv->client->dev,
225 "%s: register 0x%02x read failed (%d)\n",
226 __func__, reg, ret);
227
228 return ret;
229}
230
231static int max9286_write(struct max9286_priv *priv, u8 reg, u8 val)
232{
233 int ret;
234
235 ret = i2c_smbus_write_byte_data(priv->client, reg, val);
236 if (ret < 0)
237 dev_err(&priv->client->dev,
238 "%s: register 0x%02x write failed (%d)\n",
239 __func__, reg, ret);
240
241 return ret;
242}
243
244
245
246
247
248static void max9286_i2c_mux_configure(struct max9286_priv *priv, u8 conf)
249{
250 max9286_write(priv, 0x0a, conf);
251
252
253
254
255
256 usleep_range(3000, 5000);
257}
258
259static void max9286_i2c_mux_open(struct max9286_priv *priv)
260{
261
262 max9286_i2c_mux_configure(priv, 0xff);
263
264 priv->mux_open = true;
265}
266
267static void max9286_i2c_mux_close(struct max9286_priv *priv)
268{
269
270
271
272
273
274 max9286_i2c_mux_configure(priv, 0x00);
275
276 priv->mux_open = false;
277 priv->mux_channel = -1;
278}
279
280static int max9286_i2c_mux_select(struct i2c_mux_core *muxc, u32 chan)
281{
282 struct max9286_priv *priv = i2c_mux_priv(muxc);
283
284
285 if (priv->mux_open)
286 return 0;
287
288 if (priv->mux_channel == chan)
289 return 0;
290
291 priv->mux_channel = chan;
292
293 max9286_i2c_mux_configure(priv, MAX9286_FWDCCEN(chan) |
294 MAX9286_REVCCEN(chan));
295
296 return 0;
297}
298
299static int max9286_i2c_mux_init(struct max9286_priv *priv)
300{
301 struct max9286_source *source;
302 int ret;
303
304 if (!i2c_check_functionality(priv->client->adapter,
305 I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
306 return -ENODEV;
307
308 priv->mux = i2c_mux_alloc(priv->client->adapter, &priv->client->dev,
309 priv->nsources, 0, I2C_MUX_LOCKED,
310 max9286_i2c_mux_select, NULL);
311 if (!priv->mux)
312 return -ENOMEM;
313
314 priv->mux->priv = priv;
315
316 for_each_source(priv, source) {
317 unsigned int index = to_index(priv, source);
318
319 ret = i2c_mux_add_adapter(priv->mux, 0, index, 0);
320 if (ret < 0)
321 goto error;
322 }
323
324 return 0;
325
326error:
327 i2c_mux_del_adapters(priv->mux);
328 return ret;
329}
330
331static void max9286_configure_i2c(struct max9286_priv *priv, bool localack)
332{
333 u8 config = MAX9286_I2CSLVSH_469NS_234NS | MAX9286_I2CSLVTO_1024US |
334 MAX9286_I2CMSTBT_105KBPS;
335
336 if (localack)
337 config |= MAX9286_I2CLOCACK;
338
339 max9286_write(priv, 0x34, config);
340 usleep_range(3000, 5000);
341}
342
343static void max9286_reverse_channel_setup(struct max9286_priv *priv,
344 unsigned int chan_amplitude)
345{
346 u8 chan_config;
347
348 if (priv->rev_chan_mv == chan_amplitude)
349 return;
350
351 priv->rev_chan_mv = chan_amplitude;
352
353
354 chan_config = MAX9286_REV_TRF(1);
355
356
357
358
359
360
361
362
363
364 max9286_write(priv, 0x3f, MAX9286_EN_REV_CFG | MAX9286_REV_FLEN(35));
365
366 if (chan_amplitude > 100) {
367
368 chan_amplitude = max(30U, chan_amplitude - 100);
369 chan_config |= MAX9286_REV_AMP_X;
370 }
371 max9286_write(priv, 0x3b, chan_config | MAX9286_REV_AMP(chan_amplitude));
372 usleep_range(2000, 2500);
373}
374
375
376
377
378
379
380
381
382
383static int max9286_check_video_links(struct max9286_priv *priv)
384{
385 unsigned int i;
386 int ret;
387
388
389
390
391
392
393 for (i = 0; i < 10; i++) {
394 ret = max9286_read(priv, 0x49);
395 if (ret < 0)
396 return -EIO;
397
398 if ((ret & MAX9286_VIDEO_DETECT_MASK) == priv->source_mask)
399 break;
400
401 usleep_range(350, 500);
402 }
403
404 if (i == 10) {
405 dev_err(&priv->client->dev,
406 "Unable to detect video links: 0x%02x\n", ret);
407 return -EIO;
408 }
409
410
411 for (i = 0; i < 10; i++) {
412 ret = max9286_read(priv, 0x27);
413 if (ret < 0)
414 return -EIO;
415
416 if (ret & MAX9286_LOCKED)
417 break;
418
419 usleep_range(350, 450);
420 }
421
422 if (i == 10) {
423 dev_err(&priv->client->dev, "Not all enabled links locked\n");
424 return -EIO;
425 }
426
427 return 0;
428}
429
430
431
432
433
434
435
436
437static int max9286_check_config_link(struct max9286_priv *priv,
438 unsigned int source_mask)
439{
440 unsigned int conflink_mask = (source_mask & 0x0f) << 4;
441 unsigned int i;
442 int ret;
443
444
445
446
447
448
449 for (i = 0; i < 10; i++) {
450 ret = max9286_read(priv, 0x49);
451 if (ret < 0)
452 return -EIO;
453
454 ret &= 0xf0;
455 if (ret == conflink_mask)
456 break;
457
458 usleep_range(350, 500);
459 }
460
461 if (ret != conflink_mask) {
462 dev_err(&priv->client->dev,
463 "Unable to detect configuration links: 0x%02x expected 0x%02x\n",
464 ret, conflink_mask);
465 return -EIO;
466 }
467
468 dev_info(&priv->client->dev,
469 "Successfully detected configuration links after %u loops: 0x%02x\n",
470 i, conflink_mask);
471
472 return 0;
473}
474
475
476
477
478
479static int max9286_set_pixelrate(struct max9286_priv *priv)
480{
481 struct max9286_source *source = NULL;
482 u64 pixelrate = 0;
483
484 for_each_source(priv, source) {
485 struct v4l2_ctrl *ctrl;
486 u64 source_rate = 0;
487
488
489 ctrl = v4l2_ctrl_find(source->sd->ctrl_handler,
490 V4L2_CID_PIXEL_RATE);
491 if (!ctrl) {
492 pixelrate = 0;
493 break;
494 }
495
496
497 source_rate = v4l2_ctrl_g_ctrl_int64(ctrl);
498 if (!pixelrate) {
499 pixelrate = source_rate;
500 } else if (pixelrate != source_rate) {
501 dev_err(&priv->client->dev,
502 "Unable to calculate pixel rate\n");
503 return -EINVAL;
504 }
505 }
506
507 if (!pixelrate) {
508 dev_err(&priv->client->dev,
509 "No pixel rate control available in sources\n");
510 return -EINVAL;
511 }
512
513
514
515
516
517 return v4l2_ctrl_s_ctrl_int64(priv->pixelrate,
518 pixelrate * priv->nsources);
519}
520
521static int max9286_notify_bound(struct v4l2_async_notifier *notifier,
522 struct v4l2_subdev *subdev,
523 struct v4l2_async_subdev *asd)
524{
525 struct max9286_priv *priv = sd_to_max9286(notifier->sd);
526 struct max9286_source *source = to_max9286_asd(asd)->source;
527 unsigned int index = to_index(priv, source);
528 unsigned int src_pad;
529 int ret;
530
531 ret = media_entity_get_fwnode_pad(&subdev->entity,
532 source->fwnode,
533 MEDIA_PAD_FL_SOURCE);
534 if (ret < 0) {
535 dev_err(&priv->client->dev,
536 "Failed to find pad for %s\n", subdev->name);
537 return ret;
538 }
539
540 priv->bound_sources |= BIT(index);
541 source->sd = subdev;
542 src_pad = ret;
543
544 ret = media_create_pad_link(&source->sd->entity, src_pad,
545 &priv->sd.entity, index,
546 MEDIA_LNK_FL_ENABLED |
547 MEDIA_LNK_FL_IMMUTABLE);
548 if (ret) {
549 dev_err(&priv->client->dev,
550 "Unable to link %s:%u -> %s:%u\n",
551 source->sd->name, src_pad, priv->sd.name, index);
552 return ret;
553 }
554
555 dev_dbg(&priv->client->dev, "Bound %s pad: %u on index %u\n",
556 subdev->name, src_pad, index);
557
558
559
560
561
562
563 if (priv->bound_sources != priv->source_mask)
564 return 0;
565
566
567
568
569
570
571
572
573
574
575
576 max9286_reverse_channel_setup(priv, MAX9286_REV_AMP_HIGH);
577 max9286_check_config_link(priv, priv->source_mask);
578 max9286_configure_i2c(priv, false);
579
580 return max9286_set_pixelrate(priv);
581}
582
583static void max9286_notify_unbind(struct v4l2_async_notifier *notifier,
584 struct v4l2_subdev *subdev,
585 struct v4l2_async_subdev *asd)
586{
587 struct max9286_priv *priv = sd_to_max9286(notifier->sd);
588 struct max9286_source *source = to_max9286_asd(asd)->source;
589 unsigned int index = to_index(priv, source);
590
591 source->sd = NULL;
592 priv->bound_sources &= ~BIT(index);
593}
594
595static const struct v4l2_async_notifier_operations max9286_notify_ops = {
596 .bound = max9286_notify_bound,
597 .unbind = max9286_notify_unbind,
598};
599
600static int max9286_v4l2_notifier_register(struct max9286_priv *priv)
601{
602 struct device *dev = &priv->client->dev;
603 struct max9286_source *source = NULL;
604 int ret;
605
606 if (!priv->nsources)
607 return 0;
608
609 v4l2_async_notifier_init(&priv->notifier);
610
611 for_each_source(priv, source) {
612 unsigned int i = to_index(priv, source);
613 struct max9286_asd *mas;
614
615 mas = v4l2_async_notifier_add_fwnode_subdev(&priv->notifier,
616 source->fwnode,
617 struct max9286_asd);
618 if (IS_ERR(mas)) {
619 dev_err(dev, "Failed to add subdev for source %u: %ld",
620 i, PTR_ERR(mas));
621 v4l2_async_notifier_cleanup(&priv->notifier);
622 return PTR_ERR(mas);
623 }
624
625 mas->source = source;
626 }
627
628 priv->notifier.ops = &max9286_notify_ops;
629
630 ret = v4l2_async_subdev_notifier_register(&priv->sd, &priv->notifier);
631 if (ret) {
632 dev_err(dev, "Failed to register subdev_notifier");
633 v4l2_async_notifier_cleanup(&priv->notifier);
634 return ret;
635 }
636
637 return 0;
638}
639
640static void max9286_v4l2_notifier_unregister(struct max9286_priv *priv)
641{
642 if (!priv->nsources)
643 return;
644
645 v4l2_async_notifier_unregister(&priv->notifier);
646 v4l2_async_notifier_cleanup(&priv->notifier);
647}
648
649static int max9286_s_stream(struct v4l2_subdev *sd, int enable)
650{
651 struct max9286_priv *priv = sd_to_max9286(sd);
652 struct max9286_source *source;
653 unsigned int i;
654 bool sync = false;
655 int ret;
656
657 if (enable) {
658
659
660
661
662
663 max9286_i2c_mux_open(priv);
664
665
666 for_each_source(priv, source) {
667 ret = v4l2_subdev_call(source->sd, video, s_stream, 1);
668 if (ret)
669 return ret;
670 }
671
672 ret = max9286_check_video_links(priv);
673 if (ret)
674 return ret;
675
676
677
678
679
680
681
682
683
684 for (i = 0; i < 40; i++) {
685 if (max9286_read(priv, 0x31) & MAX9286_FSYNC_LOCKED) {
686 sync = true;
687 break;
688 }
689 usleep_range(9000, 11000);
690 }
691
692 if (!sync) {
693 dev_err(&priv->client->dev,
694 "Failed to get frame synchronization\n");
695 return -EXDEV;
696 }
697
698
699
700
701
702 max9286_write(priv, 0x15, 0x80 | MAX9286_VCTYPE |
703 MAX9286_CSIOUTEN | MAX9286_0X15_RESV);
704 } else {
705 max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
706
707
708 for_each_source(priv, source)
709 v4l2_subdev_call(source->sd, video, s_stream, 0);
710
711 max9286_i2c_mux_close(priv);
712 }
713
714 return 0;
715}
716
717static int max9286_enum_mbus_code(struct v4l2_subdev *sd,
718 struct v4l2_subdev_state *sd_state,
719 struct v4l2_subdev_mbus_code_enum *code)
720{
721 if (code->pad || code->index > 0)
722 return -EINVAL;
723
724 code->code = MEDIA_BUS_FMT_UYVY8_1X16;
725
726 return 0;
727}
728
729static struct v4l2_mbus_framefmt *
730max9286_get_pad_format(struct max9286_priv *priv,
731 struct v4l2_subdev_state *sd_state,
732 unsigned int pad, u32 which)
733{
734 switch (which) {
735 case V4L2_SUBDEV_FORMAT_TRY:
736 return v4l2_subdev_get_try_format(&priv->sd, sd_state, pad);
737 case V4L2_SUBDEV_FORMAT_ACTIVE:
738 return &priv->fmt[pad];
739 default:
740 return NULL;
741 }
742}
743
744static int max9286_set_fmt(struct v4l2_subdev *sd,
745 struct v4l2_subdev_state *sd_state,
746 struct v4l2_subdev_format *format)
747{
748 struct max9286_priv *priv = sd_to_max9286(sd);
749 struct v4l2_mbus_framefmt *cfg_fmt;
750
751 if (format->pad == MAX9286_SRC_PAD)
752 return -EINVAL;
753
754
755 switch (format->format.code) {
756 case MEDIA_BUS_FMT_UYVY8_1X16:
757 case MEDIA_BUS_FMT_VYUY8_1X16:
758 case MEDIA_BUS_FMT_YUYV8_1X16:
759 case MEDIA_BUS_FMT_YVYU8_1X16:
760 break;
761 default:
762 format->format.code = MEDIA_BUS_FMT_UYVY8_1X16;
763 break;
764 }
765
766 cfg_fmt = max9286_get_pad_format(priv, sd_state, format->pad,
767 format->which);
768 if (!cfg_fmt)
769 return -EINVAL;
770
771 mutex_lock(&priv->mutex);
772 *cfg_fmt = format->format;
773 mutex_unlock(&priv->mutex);
774
775 return 0;
776}
777
778static int max9286_get_fmt(struct v4l2_subdev *sd,
779 struct v4l2_subdev_state *sd_state,
780 struct v4l2_subdev_format *format)
781{
782 struct max9286_priv *priv = sd_to_max9286(sd);
783 struct v4l2_mbus_framefmt *cfg_fmt;
784 unsigned int pad = format->pad;
785
786
787
788
789
790
791
792 if (pad == MAX9286_SRC_PAD)
793 pad = __ffs(priv->bound_sources);
794
795 cfg_fmt = max9286_get_pad_format(priv, sd_state, pad, format->which);
796 if (!cfg_fmt)
797 return -EINVAL;
798
799 mutex_lock(&priv->mutex);
800 format->format = *cfg_fmt;
801 mutex_unlock(&priv->mutex);
802
803 return 0;
804}
805
806static const struct v4l2_subdev_video_ops max9286_video_ops = {
807 .s_stream = max9286_s_stream,
808};
809
810static const struct v4l2_subdev_pad_ops max9286_pad_ops = {
811 .enum_mbus_code = max9286_enum_mbus_code,
812 .get_fmt = max9286_get_fmt,
813 .set_fmt = max9286_set_fmt,
814};
815
816static const struct v4l2_subdev_ops max9286_subdev_ops = {
817 .video = &max9286_video_ops,
818 .pad = &max9286_pad_ops,
819};
820
821static void max9286_init_format(struct v4l2_mbus_framefmt *fmt)
822{
823 fmt->width = 1280;
824 fmt->height = 800;
825 fmt->code = MEDIA_BUS_FMT_UYVY8_1X16;
826 fmt->colorspace = V4L2_COLORSPACE_SRGB;
827 fmt->field = V4L2_FIELD_NONE;
828 fmt->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
829 fmt->quantization = V4L2_QUANTIZATION_DEFAULT;
830 fmt->xfer_func = V4L2_XFER_FUNC_DEFAULT;
831}
832
833static int max9286_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
834{
835 struct v4l2_mbus_framefmt *format;
836 unsigned int i;
837
838 for (i = 0; i < MAX9286_N_SINKS; i++) {
839 format = v4l2_subdev_get_try_format(subdev, fh->state, i);
840 max9286_init_format(format);
841 }
842
843 return 0;
844}
845
846static const struct v4l2_subdev_internal_ops max9286_subdev_internal_ops = {
847 .open = max9286_open,
848};
849
850static int max9286_s_ctrl(struct v4l2_ctrl *ctrl)
851{
852 switch (ctrl->id) {
853 case V4L2_CID_PIXEL_RATE:
854 return 0;
855 default:
856 return -EINVAL;
857 }
858}
859
860static const struct v4l2_ctrl_ops max9286_ctrl_ops = {
861 .s_ctrl = max9286_s_ctrl,
862};
863
864static int max9286_v4l2_register(struct max9286_priv *priv)
865{
866 struct device *dev = &priv->client->dev;
867 struct fwnode_handle *ep;
868 int ret;
869 int i;
870
871
872 ret = max9286_v4l2_notifier_register(priv);
873 if (ret) {
874 dev_err(dev, "Unable to register V4L2 async notifiers\n");
875 return ret;
876 }
877
878
879
880 for (i = 0; i < MAX9286_N_SINKS; i++)
881 max9286_init_format(&priv->fmt[i]);
882
883 v4l2_i2c_subdev_init(&priv->sd, priv->client, &max9286_subdev_ops);
884 priv->sd.internal_ops = &max9286_subdev_internal_ops;
885 priv->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
886
887 v4l2_ctrl_handler_init(&priv->ctrls, 1);
888 priv->pixelrate = v4l2_ctrl_new_std(&priv->ctrls,
889 &max9286_ctrl_ops,
890 V4L2_CID_PIXEL_RATE,
891 1, INT_MAX, 1, 50000000);
892
893 priv->sd.ctrl_handler = &priv->ctrls;
894 ret = priv->ctrls.error;
895 if (ret)
896 goto err_async;
897
898 priv->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE;
899
900 priv->pads[MAX9286_SRC_PAD].flags = MEDIA_PAD_FL_SOURCE;
901 for (i = 0; i < MAX9286_SRC_PAD; i++)
902 priv->pads[i].flags = MEDIA_PAD_FL_SINK;
903 ret = media_entity_pads_init(&priv->sd.entity, MAX9286_N_PADS,
904 priv->pads);
905 if (ret)
906 goto err_async;
907
908 ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), MAX9286_SRC_PAD,
909 0, 0);
910 if (!ep) {
911 dev_err(dev, "Unable to retrieve endpoint on \"port@4\"\n");
912 ret = -ENOENT;
913 goto err_async;
914 }
915 priv->sd.fwnode = ep;
916
917 ret = v4l2_async_register_subdev(&priv->sd);
918 if (ret < 0) {
919 dev_err(dev, "Unable to register subdevice\n");
920 goto err_put_node;
921 }
922
923 return 0;
924
925err_put_node:
926 fwnode_handle_put(ep);
927err_async:
928 max9286_v4l2_notifier_unregister(priv);
929
930 return ret;
931}
932
933static void max9286_v4l2_unregister(struct max9286_priv *priv)
934{
935 fwnode_handle_put(priv->sd.fwnode);
936 v4l2_async_unregister_subdev(&priv->sd);
937 max9286_v4l2_notifier_unregister(priv);
938}
939
940
941
942
943
944static int max9286_setup(struct max9286_priv *priv)
945{
946
947
948
949
950
951
952
953 static const u8 link_order[] = {
954 (3 << 6) | (2 << 4) | (1 << 2) | (0 << 0),
955 (3 << 6) | (2 << 4) | (1 << 2) | (0 << 0),
956 (3 << 6) | (2 << 4) | (0 << 2) | (1 << 0),
957 (3 << 6) | (2 << 4) | (1 << 2) | (0 << 0),
958 (3 << 6) | (0 << 4) | (2 << 2) | (1 << 0),
959 (3 << 6) | (1 << 4) | (2 << 2) | (0 << 0),
960 (3 << 6) | (1 << 4) | (0 << 2) | (2 << 0),
961 (3 << 6) | (1 << 4) | (1 << 2) | (0 << 0),
962 (0 << 6) | (3 << 4) | (2 << 2) | (1 << 0),
963 (1 << 6) | (3 << 4) | (2 << 2) | (0 << 0),
964 (1 << 6) | (3 << 4) | (0 << 2) | (2 << 0),
965 (2 << 6) | (3 << 4) | (1 << 2) | (0 << 0),
966 (1 << 6) | (0 << 4) | (3 << 2) | (2 << 0),
967 (2 << 6) | (1 << 4) | (3 << 2) | (0 << 0),
968 (2 << 6) | (1 << 4) | (0 << 2) | (3 << 0),
969 (3 << 6) | (2 << 4) | (1 << 2) | (0 << 0),
970 };
971
972
973
974
975
976
977
978 max9286_configure_i2c(priv, true);
979 max9286_reverse_channel_setup(priv, priv->init_rev_chan_mv);
980
981
982
983
984
985 max9286_write(priv, 0x00, MAX9286_MSTLINKSEL_AUTO | priv->route_mask);
986 max9286_write(priv, 0x0b, link_order[priv->route_mask]);
987 max9286_write(priv, 0x69, (0xf & ~priv->route_mask));
988
989
990
991
992
993 max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
994
995
996 max9286_write(priv, 0x12, MAX9286_CSIDBL | MAX9286_DBL |
997 MAX9286_CSILANECNT(priv->csi2_data_lanes) |
998 MAX9286_DATATYPE_YUV422_8BIT);
999
1000
1001 max9286_write(priv, 0x01, MAX9286_FSYNCMODE_INT_HIZ |
1002 MAX9286_FSYNCMETH_AUTO);
1003
1004
1005 max9286_write(priv, 0x0c, MAX9286_HVEN | MAX9286_INVVS |
1006 MAX9286_HVSRC_D14);
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017 max9286_write(priv, 0x63, 0);
1018 max9286_write(priv, 0x64, 0);
1019
1020
1021
1022
1023
1024 usleep_range(2000, 5000);
1025
1026 return 0;
1027}
1028
1029static void max9286_gpio_set(struct gpio_chip *chip,
1030 unsigned int offset, int value)
1031{
1032 struct max9286_priv *priv = gpiochip_get_data(chip);
1033
1034 if (value)
1035 priv->gpio_state |= BIT(offset);
1036 else
1037 priv->gpio_state &= ~BIT(offset);
1038
1039 max9286_write(priv, 0x0f, MAX9286_0X0F_RESERVED | priv->gpio_state);
1040}
1041
1042static int max9286_gpio_get(struct gpio_chip *chip, unsigned int offset)
1043{
1044 struct max9286_priv *priv = gpiochip_get_data(chip);
1045
1046 return priv->gpio_state & BIT(offset);
1047}
1048
1049static int max9286_register_gpio(struct max9286_priv *priv)
1050{
1051 struct device *dev = &priv->client->dev;
1052 struct gpio_chip *gpio = &priv->gpio;
1053 int ret;
1054
1055
1056 gpio->label = dev_name(dev);
1057 gpio->parent = dev;
1058 gpio->owner = THIS_MODULE;
1059 gpio->of_node = dev->of_node;
1060 gpio->ngpio = 2;
1061 gpio->base = -1;
1062 gpio->set = max9286_gpio_set;
1063 gpio->get = max9286_gpio_get;
1064 gpio->can_sleep = true;
1065
1066
1067 priv->gpio_state = BIT(0) | BIT(1);
1068
1069 ret = devm_gpiochip_add_data(dev, gpio, priv);
1070 if (ret)
1071 dev_err(dev, "Unable to create gpio_chip\n");
1072
1073 return ret;
1074}
1075
1076static int max9286_init(struct device *dev)
1077{
1078 struct max9286_priv *priv;
1079 struct i2c_client *client;
1080 int ret;
1081
1082 client = to_i2c_client(dev);
1083 priv = i2c_get_clientdata(client);
1084
1085
1086 ret = regulator_enable(priv->regulator);
1087 if (ret < 0) {
1088 dev_err(&client->dev, "Unable to turn PoC on\n");
1089 return ret;
1090 }
1091
1092 ret = max9286_setup(priv);
1093 if (ret) {
1094 dev_err(dev, "Unable to setup max9286\n");
1095 goto err_regulator;
1096 }
1097
1098
1099
1100
1101
1102 ret = max9286_v4l2_register(priv);
1103 if (ret) {
1104 dev_err(dev, "Failed to register with V4L2\n");
1105 goto err_regulator;
1106 }
1107
1108 ret = max9286_i2c_mux_init(priv);
1109 if (ret) {
1110 dev_err(dev, "Unable to initialize I2C multiplexer\n");
1111 goto err_v4l2_register;
1112 }
1113
1114
1115 max9286_i2c_mux_close(priv);
1116
1117 return 0;
1118
1119err_v4l2_register:
1120 max9286_v4l2_unregister(priv);
1121err_regulator:
1122 regulator_disable(priv->regulator);
1123
1124 return ret;
1125}
1126
1127static void max9286_cleanup_dt(struct max9286_priv *priv)
1128{
1129 struct max9286_source *source;
1130
1131 for_each_source(priv, source) {
1132 fwnode_handle_put(source->fwnode);
1133 source->fwnode = NULL;
1134 }
1135}
1136
1137static int max9286_parse_dt(struct max9286_priv *priv)
1138{
1139 struct device *dev = &priv->client->dev;
1140 struct device_node *i2c_mux;
1141 struct device_node *node = NULL;
1142 unsigned int i2c_mux_mask = 0;
1143 u32 reverse_channel_microvolt;
1144
1145
1146 of_node_get(dev->of_node);
1147 i2c_mux = of_find_node_by_name(dev->of_node, "i2c-mux");
1148 if (!i2c_mux) {
1149 dev_err(dev, "Failed to find i2c-mux node\n");
1150 return -EINVAL;
1151 }
1152
1153
1154 for_each_child_of_node(i2c_mux, node) {
1155 u32 id = 0;
1156
1157 of_property_read_u32(node, "reg", &id);
1158 if (id >= MAX9286_NUM_GMSL)
1159 continue;
1160
1161 if (!of_device_is_available(node)) {
1162 dev_dbg(dev, "Skipping disabled I2C bus port %u\n", id);
1163 continue;
1164 }
1165
1166 i2c_mux_mask |= BIT(id);
1167 }
1168 of_node_put(node);
1169 of_node_put(i2c_mux);
1170
1171
1172 for_each_endpoint_of_node(dev->of_node, node) {
1173 struct max9286_source *source;
1174 struct of_endpoint ep;
1175
1176 of_graph_parse_endpoint(node, &ep);
1177 dev_dbg(dev, "Endpoint %pOF on port %d",
1178 ep.local_node, ep.port);
1179
1180 if (ep.port > MAX9286_NUM_GMSL) {
1181 dev_err(dev, "Invalid endpoint %s on port %d",
1182 of_node_full_name(ep.local_node), ep.port);
1183 continue;
1184 }
1185
1186
1187 if (ep.port == MAX9286_SRC_PAD) {
1188 struct v4l2_fwnode_endpoint vep = {
1189 .bus_type = V4L2_MBUS_CSI2_DPHY
1190 };
1191 int ret;
1192
1193 ret = v4l2_fwnode_endpoint_parse(
1194 of_fwnode_handle(node), &vep);
1195 if (ret) {
1196 of_node_put(node);
1197 return ret;
1198 }
1199
1200 priv->csi2_data_lanes =
1201 vep.bus.mipi_csi2.num_data_lanes;
1202
1203 continue;
1204 }
1205
1206
1207 if (!(i2c_mux_mask & BIT(ep.port)))
1208 continue;
1209
1210 if (priv->sources[ep.port].fwnode) {
1211 dev_err(dev,
1212 "Multiple port endpoints are not supported: %d",
1213 ep.port);
1214
1215 continue;
1216 }
1217
1218 source = &priv->sources[ep.port];
1219 source->fwnode = fwnode_graph_get_remote_endpoint(
1220 of_fwnode_handle(node));
1221 if (!source->fwnode) {
1222 dev_err(dev,
1223 "Endpoint %pOF has no remote endpoint connection\n",
1224 ep.local_node);
1225
1226 continue;
1227 }
1228
1229 priv->source_mask |= BIT(ep.port);
1230 priv->nsources++;
1231 }
1232 of_node_put(node);
1233
1234
1235
1236
1237
1238
1239
1240
1241 if (of_property_read_u32(dev->of_node,
1242 "maxim,reverse-channel-microvolt",
1243 &reverse_channel_microvolt))
1244 priv->init_rev_chan_mv = 170;
1245 else
1246 priv->init_rev_chan_mv = reverse_channel_microvolt / 1000U;
1247
1248 priv->route_mask = priv->source_mask;
1249
1250 return 0;
1251}
1252
1253static int max9286_probe(struct i2c_client *client)
1254{
1255 struct max9286_priv *priv;
1256 int ret;
1257
1258 priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
1259 if (!priv)
1260 return -ENOMEM;
1261
1262 mutex_init(&priv->mutex);
1263
1264 priv->client = client;
1265 i2c_set_clientdata(client, priv);
1266
1267 priv->gpiod_pwdn = devm_gpiod_get_optional(&client->dev, "enable",
1268 GPIOD_OUT_HIGH);
1269 if (IS_ERR(priv->gpiod_pwdn))
1270 return PTR_ERR(priv->gpiod_pwdn);
1271
1272 gpiod_set_consumer_name(priv->gpiod_pwdn, "max9286-pwdn");
1273 gpiod_set_value_cansleep(priv->gpiod_pwdn, 1);
1274
1275
1276 if (priv->gpiod_pwdn)
1277 usleep_range(4000, 5000);
1278
1279
1280
1281
1282
1283
1284 max9286_i2c_mux_close(priv);
1285
1286
1287
1288
1289
1290
1291 max9286_configure_i2c(priv, false);
1292
1293 ret = max9286_register_gpio(priv);
1294 if (ret)
1295 goto err_powerdown;
1296
1297 priv->regulator = devm_regulator_get(&client->dev, "poc");
1298 if (IS_ERR(priv->regulator)) {
1299 if (PTR_ERR(priv->regulator) != -EPROBE_DEFER)
1300 dev_err(&client->dev,
1301 "Unable to get PoC regulator (%ld)\n",
1302 PTR_ERR(priv->regulator));
1303 ret = PTR_ERR(priv->regulator);
1304 goto err_powerdown;
1305 }
1306
1307 ret = max9286_parse_dt(priv);
1308 if (ret)
1309 goto err_powerdown;
1310
1311 ret = max9286_init(&client->dev);
1312 if (ret < 0)
1313 goto err_cleanup_dt;
1314
1315 return 0;
1316
1317err_cleanup_dt:
1318 max9286_cleanup_dt(priv);
1319err_powerdown:
1320 gpiod_set_value_cansleep(priv->gpiod_pwdn, 0);
1321
1322 return ret;
1323}
1324
1325static int max9286_remove(struct i2c_client *client)
1326{
1327 struct max9286_priv *priv = i2c_get_clientdata(client);
1328
1329 i2c_mux_del_adapters(priv->mux);
1330
1331 max9286_v4l2_unregister(priv);
1332
1333 regulator_disable(priv->regulator);
1334
1335 gpiod_set_value_cansleep(priv->gpiod_pwdn, 0);
1336
1337 max9286_cleanup_dt(priv);
1338
1339 return 0;
1340}
1341
1342static const struct of_device_id max9286_dt_ids[] = {
1343 { .compatible = "maxim,max9286" },
1344 {},
1345};
1346MODULE_DEVICE_TABLE(of, max9286_dt_ids);
1347
1348static struct i2c_driver max9286_i2c_driver = {
1349 .driver = {
1350 .name = "max9286",
1351 .of_match_table = of_match_ptr(max9286_dt_ids),
1352 },
1353 .probe_new = max9286_probe,
1354 .remove = max9286_remove,
1355};
1356
1357module_i2c_driver(max9286_i2c_driver);
1358
1359MODULE_DESCRIPTION("Maxim MAX9286 GMSL Deserializer Driver");
1360MODULE_AUTHOR("Jacopo Mondi, Kieran Bingham, Laurent Pinchart, Niklas Söderlund, Vladimir Barinov");
1361MODULE_LICENSE("GPL");
1362