1
2
3
4#include <asm/unaligned.h>
5#include <linux/acpi.h>
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio/consumer.h>
9#include <linux/i2c.h>
10#include <linux/module.h>
11#include <linux/pm_runtime.h>
12#include <linux/regulator/consumer.h>
13#include <media/v4l2-ctrls.h>
14#include <media/v4l2-device.h>
15#include <media/v4l2-fwnode.h>
16
17#define OV8856_REG_VALUE_08BIT 1
18#define OV8856_REG_VALUE_16BIT 2
19#define OV8856_REG_VALUE_24BIT 3
20
21#define OV8856_SCLK 144000000ULL
22#define OV8856_XVCLK_19_2 19200000
23#define OV8856_DATA_LANES 4
24#define OV8856_RGB_DEPTH 10
25
26#define OV8856_REG_CHIP_ID 0x300a
27#define OV8856_CHIP_ID 0x00885a
28
29#define OV8856_REG_MODE_SELECT 0x0100
30#define OV8856_MODE_STANDBY 0x00
31#define OV8856_MODE_STREAMING 0x01
32
33
34#define OV8856_2A_MODULE 0x01
35#define OV8856_1B_MODULE 0x02
36
37
38
39
40#define OV8856_MODULE_REVISION 0x700f
41#define OV8856_OTP_MODE_CTRL 0x3d84
42#define OV8856_OTP_LOAD_CTRL 0x3d81
43#define OV8856_OTP_MODE_AUTO 0x00
44#define OV8856_OTP_LOAD_CTRL_ENABLE BIT(0)
45
46
47#define OV8856_REG_VTS 0x380e
48#define OV8856_VTS_MAX 0x7fff
49
50
51#define OV8856_REG_HTS 0x380c
52
53
54#define OV8856_REG_EXPOSURE 0x3500
55#define OV8856_EXPOSURE_MIN 6
56#define OV8856_EXPOSURE_MAX_MARGIN 6
57#define OV8856_EXPOSURE_STEP 1
58
59
60#define OV8856_REG_ANALOG_GAIN 0x3508
61#define OV8856_ANAL_GAIN_MIN 128
62#define OV8856_ANAL_GAIN_MAX 2047
63#define OV8856_ANAL_GAIN_STEP 1
64
65
66#define OV8856_REG_MWB_R_GAIN 0x5019
67#define OV8856_REG_MWB_G_GAIN 0x501b
68#define OV8856_REG_MWB_B_GAIN 0x501d
69#define OV8856_DGTL_GAIN_MIN 0
70#define OV8856_DGTL_GAIN_MAX 4095
71#define OV8856_DGTL_GAIN_STEP 1
72#define OV8856_DGTL_GAIN_DEFAULT 1024
73
74
75#define OV8856_REG_TEST_PATTERN 0x5e00
76#define OV8856_TEST_PATTERN_ENABLE BIT(7)
77#define OV8856_TEST_PATTERN_BAR_SHIFT 2
78
79#define NUM_REGS 7
80#define NUM_MODE_REGS 187
81#define NUM_MODE_REGS_2 200
82
83
84#define OV8856_REG_FORMAT1 0x3820
85#define OV8856_REG_FORMAT2 0x3821
86#define OV8856_REG_FORMAT1_OP_1 BIT(1)
87#define OV8856_REG_FORMAT1_OP_2 BIT(2)
88#define OV8856_REG_FORMAT1_OP_3 BIT(6)
89#define OV8856_REG_FORMAT2_OP_1 BIT(1)
90#define OV8856_REG_FORMAT2_OP_2 BIT(2)
91#define OV8856_REG_FORMAT2_OP_3 BIT(6)
92#define OV8856_REG_FLIP_OPT_1 0x376b
93#define OV8856_REG_FLIP_OPT_2 0x5001
94#define OV8856_REG_FLIP_OPT_3 0x502e
95#define OV8856_REG_MIRROR_OPT_1 0x5004
96#define OV8856_REG_FLIP_OP_0 BIT(0)
97#define OV8856_REG_FLIP_OP_1 BIT(1)
98#define OV8856_REG_FLIP_OP_2 BIT(2)
99#define OV8856_REG_MIRROR_OP_1 BIT(1)
100#define OV8856_REG_MIRROR_OP_2 BIT(2)
101
102#define to_ov8856(_sd) container_of(_sd, struct ov8856, sd)
103
104static const char * const ov8856_supply_names[] = {
105 "dovdd",
106 "avdd",
107 "dvdd",
108};
109
110struct ov8856_reg {
111 u16 address;
112 u8 val;
113};
114
115struct ov8856_reg_list {
116 u32 num_of_regs;
117 const struct ov8856_reg *regs;
118};
119
120struct ov8856_link_freq_config {
121 const struct ov8856_reg_list reg_list;
122};
123
124struct ov8856_mode {
125
126 u32 width;
127
128
129 u32 height;
130
131
132 u32 hts;
133
134
135 u32 vts_def;
136
137
138 u32 vts_min;
139
140
141 u32 link_freq_index;
142
143
144 const struct ov8856_reg_list reg_list;
145
146
147 u8 data_lanes;
148};
149
150struct ov8856_mipi_data_rates {
151 const struct ov8856_reg regs_0[NUM_REGS];
152 const struct ov8856_reg regs_1[NUM_REGS];
153};
154
155static const struct ov8856_mipi_data_rates mipi_data_rate_lane_2 = {
156
157 {
158 {0x0103, 0x01},
159 {0x0100, 0x00},
160 {0x0302, 0x43},
161 {0x0303, 0x00},
162 {0x030b, 0x02},
163 {0x030d, 0x4b},
164 {0x031e, 0x0c}
165 },
166
167 {
168 {0x0103, 0x01},
169 {0x0100, 0x00},
170 {0x0302, 0x4b},
171 {0x0303, 0x01},
172 {0x030b, 0x02},
173 {0x030d, 0x4b},
174 {0x031e, 0x0c}
175 }
176};
177
178static const struct ov8856_mipi_data_rates mipi_data_rate_lane_4 = {
179
180 {
181 {0x0103, 0x01},
182 {0x0100, 0x00},
183 {0x0302, 0x4b},
184 {0x0303, 0x01},
185 {0x030b, 0x02},
186 {0x030d, 0x4b},
187 {0x031e, 0x0c}
188 },
189
190 {
191 {0x0103, 0x01},
192 {0x0100, 0x00},
193 {0x0302, 0x4b},
194 {0x0303, 0x03},
195 {0x030b, 0x02},
196 {0x030d, 0x4b},
197 {0x031e, 0x0c}
198 }
199};
200
201static const struct ov8856_reg lane_2_mode_3280x2464[] = {
202
203 {0x3000, 0x20},
204 {0x3003, 0x08},
205 {0x300e, 0x20},
206 {0x3010, 0x00},
207 {0x3015, 0x84},
208 {0x3018, 0x32},
209 {0x3021, 0x23},
210 {0x3033, 0x24},
211 {0x3500, 0x00},
212 {0x3501, 0x9a},
213 {0x3502, 0x20},
214 {0x3503, 0x08},
215 {0x3505, 0x83},
216 {0x3508, 0x01},
217 {0x3509, 0x80},
218 {0x350c, 0x00},
219 {0x350d, 0x80},
220 {0x350e, 0x04},
221 {0x350f, 0x00},
222 {0x3510, 0x00},
223 {0x3511, 0x02},
224 {0x3512, 0x00},
225 {0x3600, 0x72},
226 {0x3601, 0x40},
227 {0x3602, 0x30},
228 {0x3610, 0xc5},
229 {0x3611, 0x58},
230 {0x3612, 0x5c},
231 {0x3613, 0xca},
232 {0x3614, 0x50},
233 {0x3628, 0xff},
234 {0x3629, 0xff},
235 {0x362a, 0xff},
236 {0x3633, 0x10},
237 {0x3634, 0x10},
238 {0x3635, 0x10},
239 {0x3636, 0x10},
240 {0x3663, 0x08},
241 {0x3669, 0x34},
242 {0x366e, 0x10},
243 {0x3706, 0x86},
244 {0x370b, 0x7e},
245 {0x3714, 0x23},
246 {0x3730, 0x12},
247 {0x3733, 0x10},
248 {0x3764, 0x00},
249 {0x3765, 0x00},
250 {0x3769, 0x62},
251 {0x376a, 0x2a},
252 {0x376b, 0x30},
253 {0x3780, 0x00},
254 {0x3781, 0x24},
255 {0x3782, 0x00},
256 {0x3783, 0x23},
257 {0x3798, 0x2f},
258 {0x37a1, 0x60},
259 {0x37a8, 0x6a},
260 {0x37ab, 0x3f},
261 {0x37c2, 0x04},
262 {0x37c3, 0xf1},
263 {0x37c9, 0x80},
264 {0x37cb, 0x16},
265 {0x37cc, 0x16},
266 {0x37cd, 0x16},
267 {0x37ce, 0x16},
268 {0x3800, 0x00},
269 {0x3801, 0x00},
270 {0x3802, 0x00},
271 {0x3803, 0x06},
272 {0x3804, 0x0c},
273 {0x3805, 0xdf},
274 {0x3806, 0x09},
275 {0x3807, 0xa7},
276 {0x3808, 0x0c},
277 {0x3809, 0xd0},
278 {0x380a, 0x09},
279 {0x380b, 0xa0},
280 {0x380c, 0x07},
281 {0x380d, 0x88},
282 {0x380e, 0x09},
283 {0x380f, 0xb8},
284 {0x3810, 0x00},
285 {0x3811, 0x00},
286 {0x3812, 0x00},
287 {0x3813, 0x01},
288 {0x3814, 0x01},
289 {0x3815, 0x01},
290 {0x3816, 0x00},
291 {0x3817, 0x00},
292 {0x3818, 0x00},
293 {0x3819, 0x00},
294 {0x3820, 0x80},
295 {0x3821, 0x46},
296 {0x382a, 0x01},
297 {0x382b, 0x01},
298 {0x3830, 0x06},
299 {0x3836, 0x02},
300 {0x3837, 0x10},
301 {0x3862, 0x04},
302 {0x3863, 0x08},
303 {0x3cc0, 0x33},
304 {0x3d85, 0x14},
305 {0x3d8c, 0x73},
306 {0x3d8d, 0xde},
307 {0x4001, 0xe0},
308 {0x4003, 0x40},
309 {0x4008, 0x00},
310 {0x4009, 0x0b},
311 {0x400a, 0x00},
312 {0x400b, 0x84},
313 {0x400f, 0x80},
314 {0x4010, 0xf0},
315 {0x4011, 0xff},
316 {0x4012, 0x02},
317 {0x4013, 0x01},
318 {0x4014, 0x01},
319 {0x4015, 0x01},
320 {0x4042, 0x00},
321 {0x4043, 0x80},
322 {0x4044, 0x00},
323 {0x4045, 0x80},
324 {0x4046, 0x00},
325 {0x4047, 0x80},
326 {0x4048, 0x00},
327 {0x4049, 0x80},
328 {0x4041, 0x03},
329 {0x404c, 0x20},
330 {0x404d, 0x00},
331 {0x404e, 0x20},
332 {0x4203, 0x80},
333 {0x4307, 0x30},
334 {0x4317, 0x00},
335 {0x4503, 0x08},
336 {0x4601, 0x80},
337 {0x4800, 0x44},
338 {0x4816, 0x53},
339 {0x481b, 0x58},
340 {0x481f, 0x27},
341 {0x4837, 0x0c},
342 {0x483c, 0x0f},
343 {0x484b, 0x05},
344 {0x5000, 0x57},
345 {0x5001, 0x0a},
346 {0x5004, 0x04},
347 {0x502e, 0x03},
348 {0x5030, 0x41},
349 {0x5795, 0x02},
350 {0x5796, 0x20},
351 {0x5797, 0x20},
352 {0x5798, 0xd5},
353 {0x5799, 0xd5},
354 {0x579a, 0x00},
355 {0x579b, 0x50},
356 {0x579c, 0x00},
357 {0x579d, 0x2c},
358 {0x579e, 0x0c},
359 {0x579f, 0x40},
360 {0x57a0, 0x09},
361 {0x57a1, 0x40},
362 {0x5780, 0x14},
363 {0x5781, 0x0f},
364 {0x5782, 0x44},
365 {0x5783, 0x02},
366 {0x5784, 0x01},
367 {0x5785, 0x01},
368 {0x5786, 0x00},
369 {0x5787, 0x04},
370 {0x5788, 0x02},
371 {0x5789, 0x0f},
372 {0x578a, 0xfd},
373 {0x578b, 0xf5},
374 {0x578c, 0xf5},
375 {0x578d, 0x03},
376 {0x578e, 0x08},
377 {0x578f, 0x0c},
378 {0x5790, 0x08},
379 {0x5791, 0x04},
380 {0x5792, 0x00},
381 {0x5793, 0x52},
382 {0x5794, 0xa3},
383 {0x59f8, 0x3d},
384 {0x5a08, 0x02},
385 {0x5b00, 0x02},
386 {0x5b01, 0x10},
387 {0x5b02, 0x03},
388 {0x5b03, 0xcf},
389 {0x5b05, 0x6c},
390 {0x5e00, 0x00}
391};
392
393static const struct ov8856_reg lane_2_mode_1640x1232[] = {
394
395 {0x3000, 0x20},
396 {0x3003, 0x08},
397 {0x300e, 0x20},
398 {0x3010, 0x00},
399 {0x3015, 0x84},
400 {0x3018, 0x32},
401 {0x3021, 0x23},
402 {0x3033, 0x24},
403 {0x3500, 0x00},
404 {0x3501, 0x4c},
405 {0x3502, 0xe0},
406 {0x3503, 0x08},
407 {0x3505, 0x83},
408 {0x3508, 0x01},
409 {0x3509, 0x80},
410 {0x350c, 0x00},
411 {0x350d, 0x80},
412 {0x350e, 0x04},
413 {0x350f, 0x00},
414 {0x3510, 0x00},
415 {0x3511, 0x02},
416 {0x3512, 0x00},
417 {0x3600, 0x72},
418 {0x3601, 0x40},
419 {0x3602, 0x30},
420 {0x3610, 0xc5},
421 {0x3611, 0x58},
422 {0x3612, 0x5c},
423 {0x3613, 0xca},
424 {0x3614, 0x50},
425 {0x3628, 0xff},
426 {0x3629, 0xff},
427 {0x362a, 0xff},
428 {0x3633, 0x10},
429 {0x3634, 0x10},
430 {0x3635, 0x10},
431 {0x3636, 0x10},
432 {0x3663, 0x08},
433 {0x3669, 0x34},
434 {0x366e, 0x08},
435 {0x3706, 0x86},
436 {0x370b, 0x7e},
437 {0x3714, 0x27},
438 {0x3730, 0x12},
439 {0x3733, 0x10},
440 {0x3764, 0x00},
441 {0x3765, 0x00},
442 {0x3769, 0x62},
443 {0x376a, 0x2a},
444 {0x376b, 0x30},
445 {0x3780, 0x00},
446 {0x3781, 0x24},
447 {0x3782, 0x00},
448 {0x3783, 0x23},
449 {0x3798, 0x2f},
450 {0x37a1, 0x60},
451 {0x37a8, 0x6a},
452 {0x37ab, 0x3f},
453 {0x37c2, 0x14},
454 {0x37c3, 0xf1},
455 {0x37c9, 0x80},
456 {0x37cb, 0x16},
457 {0x37cc, 0x16},
458 {0x37cd, 0x16},
459 {0x37ce, 0x16},
460 {0x3800, 0x00},
461 {0x3801, 0x00},
462 {0x3802, 0x00},
463 {0x3803, 0x00},
464 {0x3804, 0x0c},
465 {0x3805, 0xdf},
466 {0x3806, 0x09},
467 {0x3807, 0xaf},
468 {0x3808, 0x06},
469 {0x3809, 0x68},
470 {0x380a, 0x04},
471 {0x380b, 0xd0},
472 {0x380c, 0x0c},
473 {0x380d, 0x60},
474 {0x380e, 0x05},
475 {0x380f, 0xea},
476 {0x3810, 0x00},
477 {0x3811, 0x04},
478 {0x3812, 0x00},
479 {0x3813, 0x05},
480 {0x3814, 0x03},
481 {0x3815, 0x01},
482 {0x3816, 0x00},
483 {0x3817, 0x00},
484 {0x3818, 0x00},
485 {0x3819, 0x00},
486 {0x3820, 0x90},
487 {0x3821, 0x67},
488 {0x382a, 0x03},
489 {0x382b, 0x01},
490 {0x3830, 0x06},
491 {0x3836, 0x02},
492 {0x3837, 0x10},
493 {0x3862, 0x04},
494 {0x3863, 0x08},
495 {0x3cc0, 0x33},
496 {0x3d85, 0x14},
497 {0x3d8c, 0x73},
498 {0x3d8d, 0xde},
499 {0x4001, 0xe0},
500 {0x4003, 0x40},
501 {0x4008, 0x00},
502 {0x4009, 0x05},
503 {0x400a, 0x00},
504 {0x400b, 0x84},
505 {0x400f, 0x80},
506 {0x4010, 0xf0},
507 {0x4011, 0xff},
508 {0x4012, 0x02},
509 {0x4013, 0x01},
510 {0x4014, 0x01},
511 {0x4015, 0x01},
512 {0x4042, 0x00},
513 {0x4043, 0x80},
514 {0x4044, 0x00},
515 {0x4045, 0x80},
516 {0x4046, 0x00},
517 {0x4047, 0x80},
518 {0x4048, 0x00},
519 {0x4049, 0x80},
520 {0x4041, 0x03},
521 {0x404c, 0x20},
522 {0x404d, 0x00},
523 {0x404e, 0x20},
524 {0x4203, 0x80},
525 {0x4307, 0x30},
526 {0x4317, 0x00},
527 {0x4503, 0x08},
528 {0x4601, 0x80},
529 {0x4800, 0x44},
530 {0x4816, 0x53},
531 {0x481b, 0x58},
532 {0x481f, 0x27},
533 {0x4837, 0x16},
534 {0x483c, 0x0f},
535 {0x484b, 0x05},
536 {0x5000, 0x57},
537 {0x5001, 0x0a},
538 {0x5004, 0x04},
539 {0x502e, 0x03},
540 {0x5030, 0x41},
541 {0x5795, 0x00},
542 {0x5796, 0x10},
543 {0x5797, 0x10},
544 {0x5798, 0x73},
545 {0x5799, 0x73},
546 {0x579a, 0x00},
547 {0x579b, 0x28},
548 {0x579c, 0x00},
549 {0x579d, 0x16},
550 {0x579e, 0x06},
551 {0x579f, 0x20},
552 {0x57a0, 0x04},
553 {0x57a1, 0xa0},
554 {0x5780, 0x14},
555 {0x5781, 0x0f},
556 {0x5782, 0x44},
557 {0x5783, 0x02},
558 {0x5784, 0x01},
559 {0x5785, 0x01},
560 {0x5786, 0x00},
561 {0x5787, 0x04},
562 {0x5788, 0x02},
563 {0x5789, 0x0f},
564 {0x578a, 0xfd},
565 {0x578b, 0xf5},
566 {0x578c, 0xf5},
567 {0x578d, 0x03},
568 {0x578e, 0x08},
569 {0x578f, 0x0c},
570 {0x5790, 0x08},
571 {0x5791, 0x04},
572 {0x5792, 0x00},
573 {0x5793, 0x52},
574 {0x5794, 0xa3},
575 {0x59f8, 0x3d},
576 {0x5a08, 0x02},
577 {0x5b00, 0x02},
578 {0x5b01, 0x10},
579 {0x5b02, 0x03},
580 {0x5b03, 0xcf},
581 {0x5b05, 0x6c},
582 {0x5e00, 0x00}
583};
584
585static const struct ov8856_reg lane_4_mode_3280x2464[] = {
586
587 {0x3000, 0x20},
588 {0x3003, 0x08},
589 {0x300e, 0x20},
590 {0x3010, 0x00},
591 {0x3015, 0x84},
592 {0x3018, 0x72},
593 {0x3021, 0x23},
594 {0x3033, 0x24},
595 {0x3500, 0x00},
596 {0x3501, 0x9a},
597 {0x3502, 0x20},
598 {0x3503, 0x08},
599 {0x3505, 0x83},
600 {0x3508, 0x01},
601 {0x3509, 0x80},
602 {0x350c, 0x00},
603 {0x350d, 0x80},
604 {0x350e, 0x04},
605 {0x350f, 0x00},
606 {0x3510, 0x00},
607 {0x3511, 0x02},
608 {0x3512, 0x00},
609 {0x3600, 0x72},
610 {0x3601, 0x40},
611 {0x3602, 0x30},
612 {0x3610, 0xc5},
613 {0x3611, 0x58},
614 {0x3612, 0x5c},
615 {0x3613, 0xca},
616 {0x3614, 0x20},
617 {0x3628, 0xff},
618 {0x3629, 0xff},
619 {0x362a, 0xff},
620 {0x3633, 0x10},
621 {0x3634, 0x10},
622 {0x3635, 0x10},
623 {0x3636, 0x10},
624 {0x3663, 0x08},
625 {0x3669, 0x34},
626 {0x366e, 0x10},
627 {0x3706, 0x86},
628 {0x370b, 0x7e},
629 {0x3714, 0x23},
630 {0x3730, 0x12},
631 {0x3733, 0x10},
632 {0x3764, 0x00},
633 {0x3765, 0x00},
634 {0x3769, 0x62},
635 {0x376a, 0x2a},
636 {0x376b, 0x30},
637 {0x3780, 0x00},
638 {0x3781, 0x24},
639 {0x3782, 0x00},
640 {0x3783, 0x23},
641 {0x3798, 0x2f},
642 {0x37a1, 0x60},
643 {0x37a8, 0x6a},
644 {0x37ab, 0x3f},
645 {0x37c2, 0x04},
646 {0x37c3, 0xf1},
647 {0x37c9, 0x80},
648 {0x37cb, 0x16},
649 {0x37cc, 0x16},
650 {0x37cd, 0x16},
651 {0x37ce, 0x16},
652 {0x3800, 0x00},
653 {0x3801, 0x00},
654 {0x3802, 0x00},
655 {0x3803, 0x06},
656 {0x3804, 0x0c},
657 {0x3805, 0xdf},
658 {0x3806, 0x09},
659 {0x3807, 0xa7},
660 {0x3808, 0x0c},
661 {0x3809, 0xd0},
662 {0x380a, 0x09},
663 {0x380b, 0xa0},
664 {0x380c, 0x07},
665 {0x380d, 0x88},
666 {0x380e, 0x09},
667 {0x380f, 0xb8},
668 {0x3810, 0x00},
669 {0x3811, 0x00},
670 {0x3812, 0x00},
671 {0x3813, 0x01},
672 {0x3814, 0x01},
673 {0x3815, 0x01},
674 {0x3816, 0x00},
675 {0x3817, 0x00},
676 {0x3818, 0x00},
677 {0x3819, 0x10},
678 {0x3820, 0x80},
679 {0x3821, 0x46},
680 {0x382a, 0x01},
681 {0x382b, 0x01},
682 {0x3830, 0x06},
683 {0x3836, 0x02},
684 {0x3862, 0x04},
685 {0x3863, 0x08},
686 {0x3cc0, 0x33},
687 {0x3d85, 0x17},
688 {0x3d8c, 0x73},
689 {0x3d8d, 0xde},
690 {0x4001, 0xe0},
691 {0x4003, 0x40},
692 {0x4008, 0x00},
693 {0x4009, 0x0b},
694 {0x400a, 0x00},
695 {0x400b, 0x84},
696 {0x400f, 0x80},
697 {0x4010, 0xf0},
698 {0x4011, 0xff},
699 {0x4012, 0x02},
700 {0x4013, 0x01},
701 {0x4014, 0x01},
702 {0x4015, 0x01},
703 {0x4042, 0x00},
704 {0x4043, 0x80},
705 {0x4044, 0x00},
706 {0x4045, 0x80},
707 {0x4046, 0x00},
708 {0x4047, 0x80},
709 {0x4048, 0x00},
710 {0x4049, 0x80},
711 {0x4041, 0x03},
712 {0x404c, 0x20},
713 {0x404d, 0x00},
714 {0x404e, 0x20},
715 {0x4203, 0x80},
716 {0x4307, 0x30},
717 {0x4317, 0x00},
718 {0x4503, 0x08},
719 {0x4601, 0x80},
720 {0x4800, 0x44},
721 {0x4816, 0x53},
722 {0x481b, 0x58},
723 {0x481f, 0x27},
724 {0x4837, 0x16},
725 {0x483c, 0x0f},
726 {0x484b, 0x05},
727 {0x5000, 0x57},
728 {0x5001, 0x0a},
729 {0x5004, 0x04},
730 {0x502e, 0x03},
731 {0x5030, 0x41},
732 {0x5780, 0x14},
733 {0x5781, 0x0f},
734 {0x5782, 0x44},
735 {0x5783, 0x02},
736 {0x5784, 0x01},
737 {0x5785, 0x01},
738 {0x5786, 0x00},
739 {0x5787, 0x04},
740 {0x5788, 0x02},
741 {0x5789, 0x0f},
742 {0x578a, 0xfd},
743 {0x578b, 0xf5},
744 {0x578c, 0xf5},
745 {0x578d, 0x03},
746 {0x578e, 0x08},
747 {0x578f, 0x0c},
748 {0x5790, 0x08},
749 {0x5791, 0x04},
750 {0x5792, 0x00},
751 {0x5793, 0x52},
752 {0x5794, 0xa3},
753 {0x5795, 0x02},
754 {0x5796, 0x20},
755 {0x5797, 0x20},
756 {0x5798, 0xd5},
757 {0x5799, 0xd5},
758 {0x579a, 0x00},
759 {0x579b, 0x50},
760 {0x579c, 0x00},
761 {0x579d, 0x2c},
762 {0x579e, 0x0c},
763 {0x579f, 0x40},
764 {0x57a0, 0x09},
765 {0x57a1, 0x40},
766 {0x59f8, 0x3d},
767 {0x5a08, 0x02},
768 {0x5b00, 0x02},
769 {0x5b01, 0x10},
770 {0x5b02, 0x03},
771 {0x5b03, 0xcf},
772 {0x5b05, 0x6c},
773 {0x5e00, 0x00}
774};
775
776static const struct ov8856_reg lane_4_mode_1640x1232[] = {
777
778 {0x3000, 0x20},
779 {0x3003, 0x08},
780 {0x300e, 0x20},
781 {0x3010, 0x00},
782 {0x3015, 0x84},
783 {0x3018, 0x72},
784 {0x3021, 0x23},
785 {0x3033, 0x24},
786 {0x3500, 0x00},
787 {0x3501, 0x4c},
788 {0x3502, 0xe0},
789 {0x3503, 0x08},
790 {0x3505, 0x83},
791 {0x3508, 0x01},
792 {0x3509, 0x80},
793 {0x350c, 0x00},
794 {0x350d, 0x80},
795 {0x350e, 0x04},
796 {0x350f, 0x00},
797 {0x3510, 0x00},
798 {0x3511, 0x02},
799 {0x3512, 0x00},
800 {0x3600, 0x72},
801 {0x3601, 0x40},
802 {0x3602, 0x30},
803 {0x3610, 0xc5},
804 {0x3611, 0x58},
805 {0x3612, 0x5c},
806 {0x3613, 0xca},
807 {0x3614, 0x20},
808 {0x3628, 0xff},
809 {0x3629, 0xff},
810 {0x362a, 0xff},
811 {0x3633, 0x10},
812 {0x3634, 0x10},
813 {0x3635, 0x10},
814 {0x3636, 0x10},
815 {0x3663, 0x08},
816 {0x3669, 0x34},
817 {0x366e, 0x08},
818 {0x3706, 0x86},
819 {0x370b, 0x7e},
820 {0x3714, 0x27},
821 {0x3730, 0x12},
822 {0x3733, 0x10},
823 {0x3764, 0x00},
824 {0x3765, 0x00},
825 {0x3769, 0x62},
826 {0x376a, 0x2a},
827 {0x376b, 0x30},
828 {0x3780, 0x00},
829 {0x3781, 0x24},
830 {0x3782, 0x00},
831 {0x3783, 0x23},
832 {0x3798, 0x2f},
833 {0x37a1, 0x60},
834 {0x37a8, 0x6a},
835 {0x37ab, 0x3f},
836 {0x37c2, 0x14},
837 {0x37c3, 0xf1},
838 {0x37c9, 0x80},
839 {0x37cb, 0x16},
840 {0x37cc, 0x16},
841 {0x37cd, 0x16},
842 {0x37ce, 0x16},
843 {0x3800, 0x00},
844 {0x3801, 0x00},
845 {0x3802, 0x00},
846 {0x3803, 0x00},
847 {0x3804, 0x0c},
848 {0x3805, 0xdf},
849 {0x3806, 0x09},
850 {0x3807, 0xaf},
851 {0x3808, 0x06},
852 {0x3809, 0x68},
853 {0x380a, 0x04},
854 {0x380b, 0xd0},
855 {0x380c, 0x0e},
856 {0x380d, 0xec},
857 {0x380e, 0x04},
858 {0x380f, 0xe8},
859 {0x3810, 0x00},
860 {0x3811, 0x04},
861 {0x3812, 0x00},
862 {0x3813, 0x05},
863 {0x3814, 0x03},
864 {0x3815, 0x01},
865 {0x3816, 0x00},
866 {0x3817, 0x00},
867 {0x3818, 0x00},
868 {0x3819, 0x10},
869 {0x3820, 0x90},
870 {0x3821, 0x67},
871 {0x382a, 0x03},
872 {0x382b, 0x01},
873 {0x3830, 0x06},
874 {0x3836, 0x02},
875 {0x3862, 0x04},
876 {0x3863, 0x08},
877 {0x3cc0, 0x33},
878 {0x3d85, 0x17},
879 {0x3d8c, 0x73},
880 {0x3d8d, 0xde},
881 {0x4001, 0xe0},
882 {0x4003, 0x40},
883 {0x4008, 0x00},
884 {0x4009, 0x05},
885 {0x400a, 0x00},
886 {0x400b, 0x84},
887 {0x400f, 0x80},
888 {0x4010, 0xf0},
889 {0x4011, 0xff},
890 {0x4012, 0x02},
891 {0x4013, 0x01},
892 {0x4014, 0x01},
893 {0x4015, 0x01},
894 {0x4042, 0x00},
895 {0x4043, 0x80},
896 {0x4044, 0x00},
897 {0x4045, 0x80},
898 {0x4046, 0x00},
899 {0x4047, 0x80},
900 {0x4048, 0x00},
901 {0x4049, 0x80},
902 {0x4041, 0x03},
903 {0x404c, 0x20},
904 {0x404d, 0x00},
905 {0x404e, 0x20},
906 {0x4203, 0x80},
907 {0x4307, 0x30},
908 {0x4317, 0x00},
909 {0x4503, 0x08},
910 {0x4601, 0x80},
911 {0x4800, 0x44},
912 {0x4816, 0x53},
913 {0x481b, 0x58},
914 {0x481f, 0x27},
915 {0x4837, 0x16},
916 {0x483c, 0x0f},
917 {0x484b, 0x05},
918 {0x5000, 0x57},
919 {0x5001, 0x0a},
920 {0x5004, 0x04},
921 {0x502e, 0x03},
922 {0x5030, 0x41},
923 {0x5780, 0x14},
924 {0x5781, 0x0f},
925 {0x5782, 0x44},
926 {0x5783, 0x02},
927 {0x5784, 0x01},
928 {0x5785, 0x01},
929 {0x5786, 0x00},
930 {0x5787, 0x04},
931 {0x5788, 0x02},
932 {0x5789, 0x0f},
933 {0x578a, 0xfd},
934 {0x578b, 0xf5},
935 {0x578c, 0xf5},
936 {0x578d, 0x03},
937 {0x578e, 0x08},
938 {0x578f, 0x0c},
939 {0x5790, 0x08},
940 {0x5791, 0x04},
941 {0x5792, 0x00},
942 {0x5793, 0x52},
943 {0x5794, 0xa3},
944 {0x5795, 0x00},
945 {0x5796, 0x10},
946 {0x5797, 0x10},
947 {0x5798, 0x73},
948 {0x5799, 0x73},
949 {0x579a, 0x00},
950 {0x579b, 0x28},
951 {0x579c, 0x00},
952 {0x579d, 0x16},
953 {0x579e, 0x06},
954 {0x579f, 0x20},
955 {0x57a0, 0x04},
956 {0x57a1, 0xa0},
957 {0x59f8, 0x3d},
958 {0x5a08, 0x02},
959 {0x5b00, 0x02},
960 {0x5b01, 0x10},
961 {0x5b02, 0x03},
962 {0x5b03, 0xcf},
963 {0x5b05, 0x6c},
964 {0x5e00, 0x00}
965};
966
967static const struct ov8856_reg lane_4_mode_3264x2448[] = {
968
969 {0x0103, 0x01},
970 {0x0302, 0x3c},
971 {0x0303, 0x01},
972 {0x031e, 0x0c},
973 {0x3000, 0x20},
974 {0x3003, 0x08},
975 {0x300e, 0x20},
976 {0x3010, 0x00},
977 {0x3015, 0x84},
978 {0x3018, 0x72},
979 {0x3021, 0x23},
980 {0x3033, 0x24},
981 {0x3500, 0x00},
982 {0x3501, 0x9a},
983 {0x3502, 0x20},
984 {0x3503, 0x08},
985 {0x3505, 0x83},
986 {0x3508, 0x01},
987 {0x3509, 0x80},
988 {0x350c, 0x00},
989 {0x350d, 0x80},
990 {0x350e, 0x04},
991 {0x350f, 0x00},
992 {0x3510, 0x00},
993 {0x3511, 0x02},
994 {0x3512, 0x00},
995 {0x3600, 0x72},
996 {0x3601, 0x40},
997 {0x3602, 0x30},
998 {0x3610, 0xc5},
999 {0x3611, 0x58},
1000 {0x3612, 0x5c},
1001 {0x3613, 0xca},
1002 {0x3614, 0x60},
1003 {0x3628, 0xff},
1004 {0x3629, 0xff},
1005 {0x362a, 0xff},
1006 {0x3633, 0x10},
1007 {0x3634, 0x10},
1008 {0x3635, 0x10},
1009 {0x3636, 0x10},
1010 {0x3663, 0x08},
1011 {0x3669, 0x34},
1012 {0x366d, 0x00},
1013 {0x366e, 0x10},
1014 {0x3706, 0x86},
1015 {0x370b, 0x7e},
1016 {0x3714, 0x23},
1017 {0x3730, 0x12},
1018 {0x3733, 0x10},
1019 {0x3764, 0x00},
1020 {0x3765, 0x00},
1021 {0x3769, 0x62},
1022 {0x376a, 0x2a},
1023 {0x376b, 0x30},
1024 {0x3780, 0x00},
1025 {0x3781, 0x24},
1026 {0x3782, 0x00},
1027 {0x3783, 0x23},
1028 {0x3798, 0x2f},
1029 {0x37a1, 0x60},
1030 {0x37a8, 0x6a},
1031 {0x37ab, 0x3f},
1032 {0x37c2, 0x04},
1033 {0x37c3, 0xf1},
1034 {0x37c9, 0x80},
1035 {0x37cb, 0x16},
1036 {0x37cc, 0x16},
1037 {0x37cd, 0x16},
1038 {0x37ce, 0x16},
1039 {0x3800, 0x00},
1040 {0x3801, 0x00},
1041 {0x3802, 0x00},
1042 {0x3803, 0x0c},
1043 {0x3804, 0x0c},
1044 {0x3805, 0xdf},
1045 {0x3806, 0x09},
1046 {0x3807, 0xa3},
1047 {0x3808, 0x0c},
1048 {0x3809, 0xc0},
1049 {0x380a, 0x09},
1050 {0x380b, 0x90},
1051 {0x380c, 0x07},
1052 {0x380d, 0x8c},
1053 {0x380e, 0x09},
1054 {0x380f, 0xb2},
1055 {0x3810, 0x00},
1056 {0x3811, 0x04},
1057 {0x3812, 0x00},
1058 {0x3813, 0x01},
1059 {0x3814, 0x01},
1060 {0x3815, 0x01},
1061 {0x3816, 0x00},
1062 {0x3817, 0x00},
1063 {0x3818, 0x00},
1064 {0x3819, 0x10},
1065 {0x3820, 0x80},
1066 {0x3821, 0x46},
1067 {0x382a, 0x01},
1068 {0x382b, 0x01},
1069 {0x3830, 0x06},
1070 {0x3836, 0x02},
1071 {0x3862, 0x04},
1072 {0x3863, 0x08},
1073 {0x3cc0, 0x33},
1074 {0x3d85, 0x17},
1075 {0x3d8c, 0x73},
1076 {0x3d8d, 0xde},
1077 {0x4001, 0xe0},
1078 {0x4003, 0x40},
1079 {0x4008, 0x00},
1080 {0x4009, 0x0b},
1081 {0x400a, 0x00},
1082 {0x400b, 0x84},
1083 {0x400f, 0x80},
1084 {0x4010, 0xf0},
1085 {0x4011, 0xff},
1086 {0x4012, 0x02},
1087 {0x4013, 0x01},
1088 {0x4014, 0x01},
1089 {0x4015, 0x01},
1090 {0x4042, 0x00},
1091 {0x4043, 0x80},
1092 {0x4044, 0x00},
1093 {0x4045, 0x80},
1094 {0x4046, 0x00},
1095 {0x4047, 0x80},
1096 {0x4048, 0x00},
1097 {0x4049, 0x80},
1098 {0x4041, 0x03},
1099 {0x404c, 0x20},
1100 {0x404d, 0x00},
1101 {0x404e, 0x20},
1102 {0x4203, 0x80},
1103 {0x4307, 0x30},
1104 {0x4317, 0x00},
1105 {0x4502, 0x50},
1106 {0x4503, 0x08},
1107 {0x4601, 0x80},
1108 {0x4800, 0x44},
1109 {0x4816, 0x53},
1110 {0x481b, 0x50},
1111 {0x481f, 0x27},
1112 {0x4823, 0x3c},
1113 {0x482b, 0x00},
1114 {0x4831, 0x66},
1115 {0x4837, 0x16},
1116 {0x483c, 0x0f},
1117 {0x484b, 0x05},
1118 {0x5000, 0x77},
1119 {0x5001, 0x0a},
1120 {0x5003, 0xc8},
1121 {0x5004, 0x04},
1122 {0x5006, 0x00},
1123 {0x5007, 0x00},
1124 {0x502e, 0x03},
1125 {0x5030, 0x41},
1126 {0x5780, 0x14},
1127 {0x5781, 0x0f},
1128 {0x5782, 0x44},
1129 {0x5783, 0x02},
1130 {0x5784, 0x01},
1131 {0x5785, 0x01},
1132 {0x5786, 0x00},
1133 {0x5787, 0x04},
1134 {0x5788, 0x02},
1135 {0x5789, 0x0f},
1136 {0x578a, 0xfd},
1137 {0x578b, 0xf5},
1138 {0x578c, 0xf5},
1139 {0x578d, 0x03},
1140 {0x578e, 0x08},
1141 {0x578f, 0x0c},
1142 {0x5790, 0x08},
1143 {0x5791, 0x04},
1144 {0x5792, 0x00},
1145 {0x5793, 0x52},
1146 {0x5794, 0xa3},
1147 {0x5795, 0x02},
1148 {0x5796, 0x20},
1149 {0x5797, 0x20},
1150 {0x5798, 0xd5},
1151 {0x5799, 0xd5},
1152 {0x579a, 0x00},
1153 {0x579b, 0x50},
1154 {0x579c, 0x00},
1155 {0x579d, 0x2c},
1156 {0x579e, 0x0c},
1157 {0x579f, 0x40},
1158 {0x57a0, 0x09},
1159 {0x57a1, 0x40},
1160 {0x59f8, 0x3d},
1161 {0x5a08, 0x02},
1162 {0x5b00, 0x02},
1163 {0x5b01, 0x10},
1164 {0x5b02, 0x03},
1165 {0x5b03, 0xcf},
1166 {0x5b05, 0x6c},
1167 {0x5e00, 0x00},
1168 {0x5e10, 0xfc}
1169};
1170
1171static const struct ov8856_reg lane_4_mode_1632x1224[] = {
1172
1173 {0x0103, 0x01},
1174 {0x0302, 0x3c},
1175 {0x0303, 0x01},
1176 {0x031e, 0x0c},
1177 {0x3000, 0x20},
1178 {0x3003, 0x08},
1179 {0x300e, 0x20},
1180 {0x3010, 0x00},
1181 {0x3015, 0x84},
1182 {0x3018, 0x72},
1183 {0x3021, 0x23},
1184 {0x3033, 0x24},
1185 {0x3500, 0x00},
1186 {0x3501, 0x4c},
1187 {0x3502, 0xe0},
1188 {0x3503, 0x08},
1189 {0x3505, 0x83},
1190 {0x3508, 0x01},
1191 {0x3509, 0x80},
1192 {0x350c, 0x00},
1193 {0x350d, 0x80},
1194 {0x350e, 0x04},
1195 {0x350f, 0x00},
1196 {0x3510, 0x00},
1197 {0x3511, 0x02},
1198 {0x3512, 0x00},
1199 {0x3600, 0x72},
1200 {0x3601, 0x40},
1201 {0x3602, 0x30},
1202 {0x3610, 0xc5},
1203 {0x3611, 0x58},
1204 {0x3612, 0x5c},
1205 {0x3613, 0xca},
1206 {0x3614, 0x60},
1207 {0x3628, 0xff},
1208 {0x3629, 0xff},
1209 {0x362a, 0xff},
1210 {0x3633, 0x10},
1211 {0x3634, 0x10},
1212 {0x3635, 0x10},
1213 {0x3636, 0x10},
1214 {0x3663, 0x08},
1215 {0x3669, 0x34},
1216 {0x366d, 0x00},
1217 {0x366e, 0x08},
1218 {0x3706, 0x86},
1219 {0x370b, 0x7e},
1220 {0x3714, 0x27},
1221 {0x3730, 0x12},
1222 {0x3733, 0x10},
1223 {0x3764, 0x00},
1224 {0x3765, 0x00},
1225 {0x3769, 0x62},
1226 {0x376a, 0x2a},
1227 {0x376b, 0x30},
1228 {0x3780, 0x00},
1229 {0x3781, 0x24},
1230 {0x3782, 0x00},
1231 {0x3783, 0x23},
1232 {0x3798, 0x2f},
1233 {0x37a1, 0x60},
1234 {0x37a8, 0x6a},
1235 {0x37ab, 0x3f},
1236 {0x37c2, 0x14},
1237 {0x37c3, 0xf1},
1238 {0x37c9, 0x80},
1239 {0x37cb, 0x16},
1240 {0x37cc, 0x16},
1241 {0x37cd, 0x16},
1242 {0x37ce, 0x16},
1243 {0x3800, 0x00},
1244 {0x3801, 0x00},
1245 {0x3802, 0x00},
1246 {0x3803, 0x0c},
1247 {0x3804, 0x0c},
1248 {0x3805, 0xdf},
1249 {0x3806, 0x09},
1250 {0x3807, 0xa3},
1251 {0x3808, 0x06},
1252 {0x3809, 0x60},
1253 {0x380a, 0x04},
1254 {0x380b, 0xc8},
1255 {0x380c, 0x07},
1256 {0x380d, 0x8c},
1257 {0x380e, 0x09},
1258 {0x380f, 0xb2},
1259 {0x3810, 0x00},
1260 {0x3811, 0x02},
1261 {0x3812, 0x00},
1262 {0x3813, 0x01},
1263 {0x3814, 0x03},
1264 {0x3815, 0x01},
1265 {0x3816, 0x00},
1266 {0x3817, 0x00},
1267 {0x3818, 0x00},
1268 {0x3819, 0x10},
1269 {0x3820, 0x80},
1270 {0x3821, 0x47},
1271 {0x382a, 0x03},
1272 {0x382b, 0x01},
1273 {0x3830, 0x06},
1274 {0x3836, 0x02},
1275 {0x3862, 0x04},
1276 {0x3863, 0x08},
1277 {0x3cc0, 0x33},
1278 {0x3d85, 0x17},
1279 {0x3d8c, 0x73},
1280 {0x3d8d, 0xde},
1281 {0x4001, 0xe0},
1282 {0x4003, 0x40},
1283 {0x4008, 0x00},
1284 {0x4009, 0x05},
1285 {0x400a, 0x00},
1286 {0x400b, 0x84},
1287 {0x400f, 0x80},
1288 {0x4010, 0xf0},
1289 {0x4011, 0xff},
1290 {0x4012, 0x02},
1291 {0x4013, 0x01},
1292 {0x4014, 0x01},
1293 {0x4015, 0x01},
1294 {0x4042, 0x00},
1295 {0x4043, 0x80},
1296 {0x4044, 0x00},
1297 {0x4045, 0x80},
1298 {0x4046, 0x00},
1299 {0x4047, 0x80},
1300 {0x4048, 0x00},
1301 {0x4049, 0x80},
1302 {0x4041, 0x03},
1303 {0x404c, 0x20},
1304 {0x404d, 0x00},
1305 {0x404e, 0x20},
1306 {0x4203, 0x80},
1307 {0x4307, 0x30},
1308 {0x4317, 0x00},
1309 {0x4502, 0x50},
1310 {0x4503, 0x08},
1311 {0x4601, 0x80},
1312 {0x4800, 0x44},
1313 {0x4816, 0x53},
1314 {0x481b, 0x50},
1315 {0x481f, 0x27},
1316 {0x4823, 0x3c},
1317 {0x482b, 0x00},
1318 {0x4831, 0x66},
1319 {0x4837, 0x16},
1320 {0x483c, 0x0f},
1321 {0x484b, 0x05},
1322 {0x5000, 0x77},
1323 {0x5001, 0x0a},
1324 {0x5003, 0xc8},
1325 {0x5004, 0x04},
1326 {0x5006, 0x00},
1327 {0x5007, 0x00},
1328 {0x502e, 0x03},
1329 {0x5030, 0x41},
1330 {0x5795, 0x00},
1331 {0x5796, 0x10},
1332 {0x5797, 0x10},
1333 {0x5798, 0x73},
1334 {0x5799, 0x73},
1335 {0x579a, 0x00},
1336 {0x579b, 0x28},
1337 {0x579c, 0x00},
1338 {0x579d, 0x16},
1339 {0x579e, 0x06},
1340 {0x579f, 0x20},
1341 {0x57a0, 0x04},
1342 {0x57a1, 0xa0},
1343 {0x5780, 0x14},
1344 {0x5781, 0x0f},
1345 {0x5782, 0x44},
1346 {0x5783, 0x02},
1347 {0x5784, 0x01},
1348 {0x5785, 0x01},
1349 {0x5786, 0x00},
1350 {0x5787, 0x04},
1351 {0x5788, 0x02},
1352 {0x5789, 0x0f},
1353 {0x578a, 0xfd},
1354 {0x578b, 0xf5},
1355 {0x578c, 0xf5},
1356 {0x578d, 0x03},
1357 {0x578e, 0x08},
1358 {0x578f, 0x0c},
1359 {0x5790, 0x08},
1360 {0x5791, 0x04},
1361 {0x5792, 0x00},
1362 {0x5793, 0x52},
1363 {0x5794, 0xa3},
1364 {0x59f8, 0x3d},
1365 {0x5a08, 0x02},
1366 {0x5b00, 0x02},
1367 {0x5b01, 0x10},
1368 {0x5b02, 0x03},
1369 {0x5b03, 0xcf},
1370 {0x5b05, 0x6c},
1371 {0x5e00, 0x00},
1372 {0x5e10, 0xfc}
1373};
1374
1375static const char * const ov8856_test_pattern_menu[] = {
1376 "Disabled",
1377 "Standard Color Bar",
1378 "Top-Bottom Darker Color Bar",
1379 "Right-Left Darker Color Bar",
1380 "Bottom-Top Darker Color Bar"
1381};
1382
1383struct ov8856 {
1384 struct v4l2_subdev sd;
1385 struct media_pad pad;
1386 struct v4l2_ctrl_handler ctrl_handler;
1387
1388 struct clk *xvclk;
1389 struct gpio_desc *reset_gpio;
1390 struct regulator_bulk_data supplies[ARRAY_SIZE(ov8856_supply_names)];
1391
1392
1393 struct v4l2_ctrl *link_freq;
1394 struct v4l2_ctrl *pixel_rate;
1395 struct v4l2_ctrl *vblank;
1396 struct v4l2_ctrl *hblank;
1397 struct v4l2_ctrl *exposure;
1398
1399
1400 const struct ov8856_mode *cur_mode;
1401
1402
1403 struct mutex mutex;
1404
1405
1406 bool streaming;
1407
1408
1409 u8 nlanes;
1410
1411 const struct ov8856_lane_cfg *priv_lane;
1412 u8 modes_size;
1413};
1414
1415struct ov8856_lane_cfg {
1416 const s64 link_freq_menu_items[2];
1417 const struct ov8856_link_freq_config link_freq_configs[2];
1418 const struct ov8856_mode supported_modes[4];
1419};
1420
1421static const struct ov8856_lane_cfg lane_cfg_2 = {
1422 {
1423 720000000,
1424 360000000,
1425 },
1426 {{
1427 .reg_list = {
1428 .num_of_regs =
1429 ARRAY_SIZE(mipi_data_rate_lane_2.regs_0),
1430 .regs = mipi_data_rate_lane_2.regs_0,
1431 }
1432 },
1433 {
1434 .reg_list = {
1435 .num_of_regs =
1436 ARRAY_SIZE(mipi_data_rate_lane_2.regs_1),
1437 .regs = mipi_data_rate_lane_2.regs_1,
1438 }
1439 }},
1440 {{
1441 .width = 3280,
1442 .height = 2464,
1443 .hts = 1928,
1444 .vts_def = 2488,
1445 .vts_min = 2488,
1446 .reg_list = {
1447 .num_of_regs =
1448 ARRAY_SIZE(lane_2_mode_3280x2464),
1449 .regs = lane_2_mode_3280x2464,
1450 },
1451 .link_freq_index = 0,
1452 .data_lanes = 2,
1453 },
1454 {
1455 .width = 1640,
1456 .height = 1232,
1457 .hts = 3168,
1458 .vts_def = 1514,
1459 .vts_min = 1514,
1460 .reg_list = {
1461 .num_of_regs =
1462 ARRAY_SIZE(lane_2_mode_1640x1232),
1463 .regs = lane_2_mode_1640x1232,
1464 },
1465 .link_freq_index = 1,
1466 .data_lanes = 2,
1467 }}
1468};
1469
1470static const struct ov8856_lane_cfg lane_cfg_4 = {
1471 {
1472 360000000,
1473 180000000,
1474 },
1475 {{
1476 .reg_list = {
1477 .num_of_regs =
1478 ARRAY_SIZE(mipi_data_rate_lane_4.regs_0),
1479 .regs = mipi_data_rate_lane_4.regs_0,
1480 }
1481 },
1482 {
1483 .reg_list = {
1484 .num_of_regs =
1485 ARRAY_SIZE(mipi_data_rate_lane_4.regs_1),
1486 .regs = mipi_data_rate_lane_4.regs_1,
1487 }
1488 }},
1489 {{
1490 .width = 3280,
1491 .height = 2464,
1492 .hts = 1928,
1493 .vts_def = 2488,
1494 .vts_min = 2488,
1495 .reg_list = {
1496 .num_of_regs =
1497 ARRAY_SIZE(lane_4_mode_3280x2464),
1498 .regs = lane_4_mode_3280x2464,
1499 },
1500 .link_freq_index = 0,
1501 .data_lanes = 4,
1502 },
1503 {
1504 .width = 1640,
1505 .height = 1232,
1506 .hts = 3820,
1507 .vts_def = 1256,
1508 .vts_min = 1256,
1509 .reg_list = {
1510 .num_of_regs =
1511 ARRAY_SIZE(lane_4_mode_1640x1232),
1512 .regs = lane_4_mode_1640x1232,
1513 },
1514 .link_freq_index = 1,
1515 .data_lanes = 4,
1516 },
1517 {
1518 .width = 3264,
1519 .height = 2448,
1520 .hts = 1932,
1521 .vts_def = 2482,
1522 .vts_min = 2482,
1523 .reg_list = {
1524 .num_of_regs =
1525 ARRAY_SIZE(lane_4_mode_3264x2448),
1526 .regs = lane_4_mode_3264x2448,
1527 },
1528 .link_freq_index = 0,
1529 .data_lanes = 4,
1530 },
1531 {
1532 .width = 1632,
1533 .height = 1224,
1534 .hts = 1932,
1535 .vts_def = 2482,
1536 .vts_min = 2482,
1537 .reg_list = {
1538 .num_of_regs =
1539 ARRAY_SIZE(lane_4_mode_1632x1224),
1540 .regs = lane_4_mode_1632x1224,
1541 },
1542 .link_freq_index = 1,
1543 .data_lanes = 4,
1544 }}
1545};
1546
1547static unsigned int ov8856_modes_num(const struct ov8856 *ov8856)
1548{
1549 unsigned int i, count = 0;
1550
1551 for (i = 0; i < ARRAY_SIZE(ov8856->priv_lane->supported_modes); i++) {
1552 if (ov8856->priv_lane->supported_modes[i].width == 0)
1553 break;
1554 count++;
1555 }
1556
1557 return count;
1558}
1559
1560static u64 to_rate(const s64 *link_freq_menu_items,
1561 u32 f_index, u8 nlanes)
1562{
1563 u64 pixel_rate = link_freq_menu_items[f_index] * 2 * nlanes;
1564
1565 do_div(pixel_rate, OV8856_RGB_DEPTH);
1566
1567 return pixel_rate;
1568}
1569
1570static u64 to_pixels_per_line(const s64 *link_freq_menu_items, u32 hts,
1571 u32 f_index, u8 nlanes)
1572{
1573 u64 ppl = hts * to_rate(link_freq_menu_items, f_index, nlanes);
1574
1575 do_div(ppl, OV8856_SCLK);
1576
1577 return ppl;
1578}
1579
1580static int ov8856_read_reg(struct ov8856 *ov8856, u16 reg, u16 len, u32 *val)
1581{
1582 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1583 struct i2c_msg msgs[2];
1584 u8 addr_buf[2];
1585 u8 data_buf[4] = {0};
1586 int ret;
1587
1588 if (len > 4)
1589 return -EINVAL;
1590
1591 put_unaligned_be16(reg, addr_buf);
1592 msgs[0].addr = client->addr;
1593 msgs[0].flags = 0;
1594 msgs[0].len = sizeof(addr_buf);
1595 msgs[0].buf = addr_buf;
1596 msgs[1].addr = client->addr;
1597 msgs[1].flags = I2C_M_RD;
1598 msgs[1].len = len;
1599 msgs[1].buf = &data_buf[4 - len];
1600
1601 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
1602 if (ret != ARRAY_SIZE(msgs))
1603 return -EIO;
1604
1605 *val = get_unaligned_be32(data_buf);
1606
1607 return 0;
1608}
1609
1610static int ov8856_write_reg(struct ov8856 *ov8856, u16 reg, u16 len, u32 val)
1611{
1612 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1613 u8 buf[6];
1614
1615 if (len > 4)
1616 return -EINVAL;
1617
1618 put_unaligned_be16(reg, buf);
1619 put_unaligned_be32(val << 8 * (4 - len), buf + 2);
1620 if (i2c_master_send(client, buf, len + 2) != len + 2)
1621 return -EIO;
1622
1623 return 0;
1624}
1625
1626static int ov8856_write_reg_list(struct ov8856 *ov8856,
1627 const struct ov8856_reg_list *r_list)
1628{
1629 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1630 unsigned int i;
1631 int ret;
1632
1633 for (i = 0; i < r_list->num_of_regs; i++) {
1634 ret = ov8856_write_reg(ov8856, r_list->regs[i].address, 1,
1635 r_list->regs[i].val);
1636 if (ret) {
1637 dev_err_ratelimited(&client->dev,
1638 "failed to write reg 0x%4.4x. error = %d",
1639 r_list->regs[i].address, ret);
1640 return ret;
1641 }
1642 }
1643
1644 return 0;
1645}
1646
1647static int ov8856_update_digital_gain(struct ov8856 *ov8856, u32 d_gain)
1648{
1649 int ret;
1650
1651 ret = ov8856_write_reg(ov8856, OV8856_REG_MWB_R_GAIN,
1652 OV8856_REG_VALUE_16BIT, d_gain);
1653 if (ret)
1654 return ret;
1655
1656 ret = ov8856_write_reg(ov8856, OV8856_REG_MWB_G_GAIN,
1657 OV8856_REG_VALUE_16BIT, d_gain);
1658 if (ret)
1659 return ret;
1660
1661 return ov8856_write_reg(ov8856, OV8856_REG_MWB_B_GAIN,
1662 OV8856_REG_VALUE_16BIT, d_gain);
1663}
1664
1665static int ov8856_test_pattern(struct ov8856 *ov8856, u32 pattern)
1666{
1667 if (pattern)
1668 pattern = (pattern - 1) << OV8856_TEST_PATTERN_BAR_SHIFT |
1669 OV8856_TEST_PATTERN_ENABLE;
1670
1671 return ov8856_write_reg(ov8856, OV8856_REG_TEST_PATTERN,
1672 OV8856_REG_VALUE_08BIT, pattern);
1673}
1674
1675static int ov8856_set_ctrl_hflip(struct ov8856 *ov8856, u32 ctrl_val)
1676{
1677 int ret;
1678 u32 val;
1679
1680 ret = ov8856_read_reg(ov8856, OV8856_REG_MIRROR_OPT_1,
1681 OV8856_REG_VALUE_08BIT, &val);
1682 if (ret)
1683 return ret;
1684
1685 ret = ov8856_write_reg(ov8856, OV8856_REG_MIRROR_OPT_1,
1686 OV8856_REG_VALUE_08BIT,
1687 ctrl_val ? val & ~OV8856_REG_MIRROR_OP_2 :
1688 val | OV8856_REG_MIRROR_OP_2);
1689
1690 if (ret)
1691 return ret;
1692
1693 ret = ov8856_read_reg(ov8856, OV8856_REG_FORMAT2,
1694 OV8856_REG_VALUE_08BIT, &val);
1695 if (ret)
1696 return ret;
1697
1698 return ov8856_write_reg(ov8856, OV8856_REG_FORMAT2,
1699 OV8856_REG_VALUE_08BIT,
1700 ctrl_val ? val & ~OV8856_REG_FORMAT2_OP_1 &
1701 ~OV8856_REG_FORMAT2_OP_2 &
1702 ~OV8856_REG_FORMAT2_OP_3 :
1703 val | OV8856_REG_FORMAT2_OP_1 |
1704 OV8856_REG_FORMAT2_OP_2 |
1705 OV8856_REG_FORMAT2_OP_3);
1706}
1707
1708static int ov8856_set_ctrl_vflip(struct ov8856 *ov8856, u8 ctrl_val)
1709{
1710 int ret;
1711 u32 val;
1712
1713 ret = ov8856_read_reg(ov8856, OV8856_REG_FLIP_OPT_1,
1714 OV8856_REG_VALUE_08BIT, &val);
1715 if (ret)
1716 return ret;
1717
1718 ret = ov8856_write_reg(ov8856, OV8856_REG_FLIP_OPT_1,
1719 OV8856_REG_VALUE_08BIT,
1720 ctrl_val ? val | OV8856_REG_FLIP_OP_1 |
1721 OV8856_REG_FLIP_OP_2 :
1722 val & ~OV8856_REG_FLIP_OP_1 &
1723 ~OV8856_REG_FLIP_OP_2);
1724
1725 ret = ov8856_read_reg(ov8856, OV8856_REG_FLIP_OPT_2,
1726 OV8856_REG_VALUE_08BIT, &val);
1727 if (ret)
1728 return ret;
1729
1730 ret = ov8856_write_reg(ov8856, OV8856_REG_FLIP_OPT_2,
1731 OV8856_REG_VALUE_08BIT,
1732 ctrl_val ? val | OV8856_REG_FLIP_OP_2 :
1733 val & ~OV8856_REG_FLIP_OP_2);
1734
1735 ret = ov8856_read_reg(ov8856, OV8856_REG_FLIP_OPT_3,
1736 OV8856_REG_VALUE_08BIT, &val);
1737 if (ret)
1738 return ret;
1739
1740 ret = ov8856_write_reg(ov8856, OV8856_REG_FLIP_OPT_3,
1741 OV8856_REG_VALUE_08BIT,
1742 ctrl_val ? val & ~OV8856_REG_FLIP_OP_0 &
1743 ~OV8856_REG_FLIP_OP_1 :
1744 val | OV8856_REG_FLIP_OP_0 |
1745 OV8856_REG_FLIP_OP_1);
1746
1747 ret = ov8856_read_reg(ov8856, OV8856_REG_FORMAT1,
1748 OV8856_REG_VALUE_08BIT, &val);
1749 if (ret)
1750 return ret;
1751
1752 return ov8856_write_reg(ov8856, OV8856_REG_FORMAT1,
1753 OV8856_REG_VALUE_08BIT,
1754 ctrl_val ? val | OV8856_REG_FORMAT1_OP_1 |
1755 OV8856_REG_FORMAT1_OP_3 |
1756 OV8856_REG_FORMAT1_OP_2 :
1757 val & ~OV8856_REG_FORMAT1_OP_1 &
1758 ~OV8856_REG_FORMAT1_OP_3 &
1759 ~OV8856_REG_FORMAT1_OP_2);
1760}
1761
1762static int ov8856_set_ctrl(struct v4l2_ctrl *ctrl)
1763{
1764 struct ov8856 *ov8856 = container_of(ctrl->handler,
1765 struct ov8856, ctrl_handler);
1766 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1767 s64 exposure_max;
1768 int ret = 0;
1769
1770
1771 if (ctrl->id == V4L2_CID_VBLANK) {
1772
1773 exposure_max = ov8856->cur_mode->height + ctrl->val -
1774 OV8856_EXPOSURE_MAX_MARGIN;
1775 __v4l2_ctrl_modify_range(ov8856->exposure,
1776 ov8856->exposure->minimum,
1777 exposure_max, ov8856->exposure->step,
1778 exposure_max);
1779 }
1780
1781
1782 if (!pm_runtime_get_if_in_use(&client->dev))
1783 return 0;
1784
1785 switch (ctrl->id) {
1786 case V4L2_CID_ANALOGUE_GAIN:
1787 ret = ov8856_write_reg(ov8856, OV8856_REG_ANALOG_GAIN,
1788 OV8856_REG_VALUE_16BIT, ctrl->val);
1789 break;
1790
1791 case V4L2_CID_DIGITAL_GAIN:
1792 ret = ov8856_update_digital_gain(ov8856, ctrl->val);
1793 break;
1794
1795 case V4L2_CID_EXPOSURE:
1796
1797 ret = ov8856_write_reg(ov8856, OV8856_REG_EXPOSURE,
1798 OV8856_REG_VALUE_24BIT, ctrl->val << 4);
1799 break;
1800
1801 case V4L2_CID_VBLANK:
1802 ret = ov8856_write_reg(ov8856, OV8856_REG_VTS,
1803 OV8856_REG_VALUE_16BIT,
1804 ov8856->cur_mode->height + ctrl->val);
1805 break;
1806
1807 case V4L2_CID_TEST_PATTERN:
1808 ret = ov8856_test_pattern(ov8856, ctrl->val);
1809 break;
1810
1811 case V4L2_CID_HFLIP:
1812 ret = ov8856_set_ctrl_hflip(ov8856, ctrl->val);
1813 break;
1814
1815 case V4L2_CID_VFLIP:
1816 ret = ov8856_set_ctrl_vflip(ov8856, ctrl->val);
1817 break;
1818
1819 default:
1820 ret = -EINVAL;
1821 break;
1822 }
1823
1824 pm_runtime_put(&client->dev);
1825
1826 return ret;
1827}
1828
1829static const struct v4l2_ctrl_ops ov8856_ctrl_ops = {
1830 .s_ctrl = ov8856_set_ctrl,
1831};
1832
1833static int ov8856_init_controls(struct ov8856 *ov8856)
1834{
1835 struct v4l2_ctrl_handler *ctrl_hdlr;
1836 s64 exposure_max, h_blank;
1837 int ret;
1838
1839 ctrl_hdlr = &ov8856->ctrl_handler;
1840 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8);
1841 if (ret)
1842 return ret;
1843
1844 ctrl_hdlr->lock = &ov8856->mutex;
1845 ov8856->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &ov8856_ctrl_ops,
1846 V4L2_CID_LINK_FREQ,
1847 ARRAY_SIZE
1848 (ov8856->priv_lane->link_freq_menu_items)
1849 - 1,
1850 0, ov8856->priv_lane->link_freq_menu_items);
1851 if (ov8856->link_freq)
1852 ov8856->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1853
1854 ov8856->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops,
1855 V4L2_CID_PIXEL_RATE, 0,
1856 to_rate(ov8856->priv_lane->link_freq_menu_items,
1857 0,
1858 ov8856->cur_mode->data_lanes), 1,
1859 to_rate(ov8856->priv_lane->link_freq_menu_items,
1860 0,
1861 ov8856->cur_mode->data_lanes));
1862 ov8856->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops,
1863 V4L2_CID_VBLANK,
1864 ov8856->cur_mode->vts_min - ov8856->cur_mode->height,
1865 OV8856_VTS_MAX - ov8856->cur_mode->height, 1,
1866 ov8856->cur_mode->vts_def -
1867 ov8856->cur_mode->height);
1868 h_blank = to_pixels_per_line(ov8856->priv_lane->link_freq_menu_items,
1869 ov8856->cur_mode->hts,
1870 ov8856->cur_mode->link_freq_index,
1871 ov8856->cur_mode->data_lanes) -
1872 ov8856->cur_mode->width;
1873 ov8856->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops,
1874 V4L2_CID_HBLANK, h_blank, h_blank, 1,
1875 h_blank);
1876 if (ov8856->hblank)
1877 ov8856->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1878
1879 v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
1880 OV8856_ANAL_GAIN_MIN, OV8856_ANAL_GAIN_MAX,
1881 OV8856_ANAL_GAIN_STEP, OV8856_ANAL_GAIN_MIN);
1882 v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
1883 OV8856_DGTL_GAIN_MIN, OV8856_DGTL_GAIN_MAX,
1884 OV8856_DGTL_GAIN_STEP, OV8856_DGTL_GAIN_DEFAULT);
1885 exposure_max = ov8856->cur_mode->vts_def - OV8856_EXPOSURE_MAX_MARGIN;
1886 ov8856->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops,
1887 V4L2_CID_EXPOSURE,
1888 OV8856_EXPOSURE_MIN, exposure_max,
1889 OV8856_EXPOSURE_STEP,
1890 exposure_max);
1891 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov8856_ctrl_ops,
1892 V4L2_CID_TEST_PATTERN,
1893 ARRAY_SIZE(ov8856_test_pattern_menu) - 1,
1894 0, 0, ov8856_test_pattern_menu);
1895 v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops,
1896 V4L2_CID_HFLIP, 0, 1, 1, 0);
1897 v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops,
1898 V4L2_CID_VFLIP, 0, 1, 1, 0);
1899 if (ctrl_hdlr->error)
1900 return ctrl_hdlr->error;
1901
1902 ov8856->sd.ctrl_handler = ctrl_hdlr;
1903
1904 return 0;
1905}
1906
1907static void ov8856_update_pad_format(const struct ov8856_mode *mode,
1908 struct v4l2_mbus_framefmt *fmt)
1909{
1910 fmt->width = mode->width;
1911 fmt->height = mode->height;
1912 fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
1913 fmt->field = V4L2_FIELD_NONE;
1914}
1915
1916static int ov8856_start_streaming(struct ov8856 *ov8856)
1917{
1918 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1919 const struct ov8856_reg_list *reg_list;
1920 int link_freq_index, ret;
1921
1922 link_freq_index = ov8856->cur_mode->link_freq_index;
1923 reg_list = &ov8856->priv_lane->link_freq_configs[link_freq_index].reg_list;
1924
1925 ret = ov8856_write_reg_list(ov8856, reg_list);
1926 if (ret) {
1927 dev_err(&client->dev, "failed to set plls");
1928 return ret;
1929 }
1930
1931 reg_list = &ov8856->cur_mode->reg_list;
1932 ret = ov8856_write_reg_list(ov8856, reg_list);
1933 if (ret) {
1934 dev_err(&client->dev, "failed to set mode");
1935 return ret;
1936 }
1937
1938 ret = __v4l2_ctrl_handler_setup(ov8856->sd.ctrl_handler);
1939 if (ret)
1940 return ret;
1941
1942 ret = ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT,
1943 OV8856_REG_VALUE_08BIT, OV8856_MODE_STREAMING);
1944 if (ret) {
1945 dev_err(&client->dev, "failed to set stream");
1946 return ret;
1947 }
1948
1949 return 0;
1950}
1951
1952static void ov8856_stop_streaming(struct ov8856 *ov8856)
1953{
1954 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1955
1956 if (ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT,
1957 OV8856_REG_VALUE_08BIT, OV8856_MODE_STANDBY))
1958 dev_err(&client->dev, "failed to set stream");
1959}
1960
1961static int ov8856_set_stream(struct v4l2_subdev *sd, int enable)
1962{
1963 struct ov8856 *ov8856 = to_ov8856(sd);
1964 struct i2c_client *client = v4l2_get_subdevdata(sd);
1965 int ret = 0;
1966
1967 if (ov8856->streaming == enable)
1968 return 0;
1969
1970 mutex_lock(&ov8856->mutex);
1971 if (enable) {
1972 ret = pm_runtime_resume_and_get(&client->dev);
1973 if (ret < 0) {
1974 mutex_unlock(&ov8856->mutex);
1975 return ret;
1976 }
1977
1978 ret = ov8856_start_streaming(ov8856);
1979 if (ret) {
1980 enable = 0;
1981 ov8856_stop_streaming(ov8856);
1982 pm_runtime_put(&client->dev);
1983 }
1984 } else {
1985 ov8856_stop_streaming(ov8856);
1986 pm_runtime_put(&client->dev);
1987 }
1988
1989 ov8856->streaming = enable;
1990 mutex_unlock(&ov8856->mutex);
1991
1992 return ret;
1993}
1994
1995static int __ov8856_power_on(struct ov8856 *ov8856)
1996{
1997 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1998 int ret;
1999
2000 if (is_acpi_node(dev_fwnode(&client->dev)))
2001 return 0;
2002
2003 ret = clk_prepare_enable(ov8856->xvclk);
2004 if (ret < 0) {
2005 dev_err(&client->dev, "failed to enable xvclk\n");
2006 return ret;
2007 }
2008
2009 if (ov8856->reset_gpio) {
2010 gpiod_set_value_cansleep(ov8856->reset_gpio, 1);
2011 usleep_range(1000, 2000);
2012 }
2013
2014 ret = regulator_bulk_enable(ARRAY_SIZE(ov8856_supply_names),
2015 ov8856->supplies);
2016 if (ret < 0) {
2017 dev_err(&client->dev, "failed to enable regulators\n");
2018 goto disable_clk;
2019 }
2020
2021 gpiod_set_value_cansleep(ov8856->reset_gpio, 0);
2022 usleep_range(1500, 1800);
2023
2024 return 0;
2025
2026disable_clk:
2027 gpiod_set_value_cansleep(ov8856->reset_gpio, 1);
2028 clk_disable_unprepare(ov8856->xvclk);
2029
2030 return ret;
2031}
2032
2033static void __ov8856_power_off(struct ov8856 *ov8856)
2034{
2035 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
2036
2037 if (is_acpi_node(dev_fwnode(&client->dev)))
2038 return;
2039
2040 gpiod_set_value_cansleep(ov8856->reset_gpio, 1);
2041 regulator_bulk_disable(ARRAY_SIZE(ov8856_supply_names),
2042 ov8856->supplies);
2043 clk_disable_unprepare(ov8856->xvclk);
2044}
2045
2046static int __maybe_unused ov8856_suspend(struct device *dev)
2047{
2048 struct v4l2_subdev *sd = dev_get_drvdata(dev);
2049 struct ov8856 *ov8856 = to_ov8856(sd);
2050
2051 mutex_lock(&ov8856->mutex);
2052 if (ov8856->streaming)
2053 ov8856_stop_streaming(ov8856);
2054
2055 __ov8856_power_off(ov8856);
2056 mutex_unlock(&ov8856->mutex);
2057
2058 return 0;
2059}
2060
2061static int __maybe_unused ov8856_resume(struct device *dev)
2062{
2063 struct v4l2_subdev *sd = dev_get_drvdata(dev);
2064 struct ov8856 *ov8856 = to_ov8856(sd);
2065 int ret;
2066
2067 mutex_lock(&ov8856->mutex);
2068
2069 __ov8856_power_on(ov8856);
2070 if (ov8856->streaming) {
2071 ret = ov8856_start_streaming(ov8856);
2072 if (ret) {
2073 ov8856->streaming = false;
2074 ov8856_stop_streaming(ov8856);
2075 mutex_unlock(&ov8856->mutex);
2076 return ret;
2077 }
2078 }
2079
2080 mutex_unlock(&ov8856->mutex);
2081
2082 return 0;
2083}
2084
2085static int ov8856_set_format(struct v4l2_subdev *sd,
2086 struct v4l2_subdev_state *sd_state,
2087 struct v4l2_subdev_format *fmt)
2088{
2089 struct ov8856 *ov8856 = to_ov8856(sd);
2090 const struct ov8856_mode *mode;
2091 s32 vblank_def, h_blank;
2092
2093 mode = v4l2_find_nearest_size(ov8856->priv_lane->supported_modes,
2094 ov8856->modes_size,
2095 width, height, fmt->format.width,
2096 fmt->format.height);
2097
2098 mutex_lock(&ov8856->mutex);
2099 ov8856_update_pad_format(mode, &fmt->format);
2100 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
2101 *v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format;
2102 } else {
2103 ov8856->cur_mode = mode;
2104 __v4l2_ctrl_s_ctrl(ov8856->link_freq, mode->link_freq_index);
2105 __v4l2_ctrl_s_ctrl_int64(ov8856->pixel_rate,
2106 to_rate(ov8856->priv_lane->link_freq_menu_items,
2107 mode->link_freq_index,
2108 ov8856->cur_mode->data_lanes));
2109
2110
2111 vblank_def = mode->vts_def - mode->height;
2112 __v4l2_ctrl_modify_range(ov8856->vblank,
2113 mode->vts_min - mode->height,
2114 OV8856_VTS_MAX - mode->height, 1,
2115 vblank_def);
2116 __v4l2_ctrl_s_ctrl(ov8856->vblank, vblank_def);
2117 h_blank = to_pixels_per_line(ov8856->priv_lane->link_freq_menu_items,
2118 mode->hts,
2119 mode->link_freq_index,
2120 ov8856->cur_mode->data_lanes)
2121 - mode->width;
2122 __v4l2_ctrl_modify_range(ov8856->hblank, h_blank, h_blank, 1,
2123 h_blank);
2124 }
2125
2126 mutex_unlock(&ov8856->mutex);
2127
2128 return 0;
2129}
2130
2131static int ov8856_get_format(struct v4l2_subdev *sd,
2132 struct v4l2_subdev_state *sd_state,
2133 struct v4l2_subdev_format *fmt)
2134{
2135 struct ov8856 *ov8856 = to_ov8856(sd);
2136
2137 mutex_lock(&ov8856->mutex);
2138 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
2139 fmt->format = *v4l2_subdev_get_try_format(&ov8856->sd,
2140 sd_state,
2141 fmt->pad);
2142 else
2143 ov8856_update_pad_format(ov8856->cur_mode, &fmt->format);
2144
2145 mutex_unlock(&ov8856->mutex);
2146
2147 return 0;
2148}
2149
2150static int ov8856_enum_mbus_code(struct v4l2_subdev *sd,
2151 struct v4l2_subdev_state *sd_state,
2152 struct v4l2_subdev_mbus_code_enum *code)
2153{
2154
2155 if (code->index > 0)
2156 return -EINVAL;
2157
2158 code->code = MEDIA_BUS_FMT_SGRBG10_1X10;
2159
2160 return 0;
2161}
2162
2163static int ov8856_enum_frame_size(struct v4l2_subdev *sd,
2164 struct v4l2_subdev_state *sd_state,
2165 struct v4l2_subdev_frame_size_enum *fse)
2166{
2167 struct ov8856 *ov8856 = to_ov8856(sd);
2168
2169 if (fse->index >= ov8856->modes_size)
2170 return -EINVAL;
2171
2172 if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10)
2173 return -EINVAL;
2174
2175 fse->min_width = ov8856->priv_lane->supported_modes[fse->index].width;
2176 fse->max_width = fse->min_width;
2177 fse->min_height = ov8856->priv_lane->supported_modes[fse->index].height;
2178 fse->max_height = fse->min_height;
2179
2180 return 0;
2181}
2182
2183static int ov8856_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
2184{
2185 struct ov8856 *ov8856 = to_ov8856(sd);
2186
2187 mutex_lock(&ov8856->mutex);
2188 ov8856_update_pad_format(&ov8856->priv_lane->supported_modes[0],
2189 v4l2_subdev_get_try_format(sd, fh->state, 0));
2190 mutex_unlock(&ov8856->mutex);
2191
2192 return 0;
2193}
2194
2195static const struct v4l2_subdev_video_ops ov8856_video_ops = {
2196 .s_stream = ov8856_set_stream,
2197};
2198
2199static const struct v4l2_subdev_pad_ops ov8856_pad_ops = {
2200 .set_fmt = ov8856_set_format,
2201 .get_fmt = ov8856_get_format,
2202 .enum_mbus_code = ov8856_enum_mbus_code,
2203 .enum_frame_size = ov8856_enum_frame_size,
2204};
2205
2206static const struct v4l2_subdev_ops ov8856_subdev_ops = {
2207 .video = &ov8856_video_ops,
2208 .pad = &ov8856_pad_ops,
2209};
2210
2211static const struct media_entity_operations ov8856_subdev_entity_ops = {
2212 .link_validate = v4l2_subdev_link_validate,
2213};
2214
2215static const struct v4l2_subdev_internal_ops ov8856_internal_ops = {
2216 .open = ov8856_open,
2217};
2218
2219static int ov8856_identify_module(struct ov8856 *ov8856)
2220{
2221 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
2222 int ret;
2223 u32 val;
2224
2225 ret = ov8856_read_reg(ov8856, OV8856_REG_CHIP_ID,
2226 OV8856_REG_VALUE_24BIT, &val);
2227 if (ret)
2228 return ret;
2229
2230 if (val != OV8856_CHIP_ID) {
2231 dev_err(&client->dev, "chip id mismatch: %x!=%x",
2232 OV8856_CHIP_ID, val);
2233 return -ENXIO;
2234 }
2235
2236 ret = ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT,
2237 OV8856_REG_VALUE_08BIT, OV8856_MODE_STREAMING);
2238 if (ret)
2239 return ret;
2240
2241 ret = ov8856_write_reg(ov8856, OV8856_OTP_MODE_CTRL,
2242 OV8856_REG_VALUE_08BIT, OV8856_OTP_MODE_AUTO);
2243 if (ret) {
2244 dev_err(&client->dev, "failed to set otp mode");
2245 return ret;
2246 }
2247
2248 ret = ov8856_write_reg(ov8856, OV8856_OTP_LOAD_CTRL,
2249 OV8856_REG_VALUE_08BIT,
2250 OV8856_OTP_LOAD_CTRL_ENABLE);
2251 if (ret) {
2252 dev_err(&client->dev, "failed to enable load control");
2253 return ret;
2254 }
2255
2256 ret = ov8856_read_reg(ov8856, OV8856_MODULE_REVISION,
2257 OV8856_REG_VALUE_08BIT, &val);
2258 if (ret) {
2259 dev_err(&client->dev, "failed to read module revision");
2260 return ret;
2261 }
2262
2263 dev_info(&client->dev, "OV8856 revision %x (%s) at address 0x%02x\n",
2264 val,
2265 val == OV8856_2A_MODULE ? "2A" :
2266 val == OV8856_1B_MODULE ? "1B" : "unknown revision",
2267 client->addr);
2268
2269 ret = ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT,
2270 OV8856_REG_VALUE_08BIT, OV8856_MODE_STANDBY);
2271 if (ret) {
2272 dev_err(&client->dev, "failed to exit streaming mode");
2273 return ret;
2274 }
2275
2276 return 0;
2277}
2278
2279static int ov8856_get_hwcfg(struct ov8856 *ov8856, struct device *dev)
2280{
2281 struct fwnode_handle *ep;
2282 struct fwnode_handle *fwnode = dev_fwnode(dev);
2283 struct v4l2_fwnode_endpoint bus_cfg = {
2284 .bus_type = V4L2_MBUS_CSI2_DPHY
2285 };
2286 u32 xvclk_rate;
2287 int ret;
2288 unsigned int i, j;
2289
2290 if (!fwnode)
2291 return -ENXIO;
2292
2293 ret = fwnode_property_read_u32(fwnode, "clock-frequency", &xvclk_rate);
2294 if (ret)
2295 return ret;
2296
2297 if (!is_acpi_node(fwnode)) {
2298 ov8856->xvclk = devm_clk_get(dev, "xvclk");
2299 if (IS_ERR(ov8856->xvclk)) {
2300 dev_err(dev, "could not get xvclk clock (%pe)\n",
2301 ov8856->xvclk);
2302 return PTR_ERR(ov8856->xvclk);
2303 }
2304
2305 clk_set_rate(ov8856->xvclk, xvclk_rate);
2306 xvclk_rate = clk_get_rate(ov8856->xvclk);
2307
2308 ov8856->reset_gpio = devm_gpiod_get_optional(dev, "reset",
2309 GPIOD_OUT_LOW);
2310 if (IS_ERR(ov8856->reset_gpio))
2311 return PTR_ERR(ov8856->reset_gpio);
2312
2313 for (i = 0; i < ARRAY_SIZE(ov8856_supply_names); i++)
2314 ov8856->supplies[i].supply = ov8856_supply_names[i];
2315
2316 ret = devm_regulator_bulk_get(dev,
2317 ARRAY_SIZE(ov8856_supply_names),
2318 ov8856->supplies);
2319 if (ret)
2320 return ret;
2321 }
2322
2323 if (xvclk_rate != OV8856_XVCLK_19_2)
2324 dev_warn(dev, "external clock rate %u is unsupported",
2325 xvclk_rate);
2326
2327 ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
2328 if (!ep)
2329 return -ENXIO;
2330
2331 ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
2332 fwnode_handle_put(ep);
2333 if (ret)
2334 return ret;
2335
2336
2337 if (bus_cfg.bus.mipi_csi2.num_data_lanes != 2 &&
2338 bus_cfg.bus.mipi_csi2.num_data_lanes != 4) {
2339 dev_err(dev, "number of CSI2 data lanes %d is not supported",
2340 bus_cfg.bus.mipi_csi2.num_data_lanes);
2341 ret = -EINVAL;
2342 goto check_hwcfg_error;
2343 }
2344
2345 dev_dbg(dev, "Using %u data lanes\n", ov8856->cur_mode->data_lanes);
2346
2347 if (bus_cfg.bus.mipi_csi2.num_data_lanes == 2)
2348 ov8856->priv_lane = &lane_cfg_2;
2349 else
2350 ov8856->priv_lane = &lane_cfg_4;
2351
2352 ov8856->modes_size = ov8856_modes_num(ov8856);
2353
2354 if (!bus_cfg.nr_of_link_frequencies) {
2355 dev_err(dev, "no link frequencies defined");
2356 ret = -EINVAL;
2357 goto check_hwcfg_error;
2358 }
2359
2360 for (i = 0; i < ARRAY_SIZE(ov8856->priv_lane->link_freq_menu_items); i++) {
2361 for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) {
2362 if (ov8856->priv_lane->link_freq_menu_items[i] ==
2363 bus_cfg.link_frequencies[j])
2364 break;
2365 }
2366
2367 if (j == bus_cfg.nr_of_link_frequencies) {
2368 dev_err(dev, "no link frequency %lld supported",
2369 ov8856->priv_lane->link_freq_menu_items[i]);
2370 ret = -EINVAL;
2371 goto check_hwcfg_error;
2372 }
2373 }
2374
2375check_hwcfg_error:
2376 v4l2_fwnode_endpoint_free(&bus_cfg);
2377
2378 return ret;
2379}
2380
2381static int ov8856_remove(struct i2c_client *client)
2382{
2383 struct v4l2_subdev *sd = i2c_get_clientdata(client);
2384 struct ov8856 *ov8856 = to_ov8856(sd);
2385
2386 v4l2_async_unregister_subdev(sd);
2387 media_entity_cleanup(&sd->entity);
2388 v4l2_ctrl_handler_free(sd->ctrl_handler);
2389 pm_runtime_disable(&client->dev);
2390 mutex_destroy(&ov8856->mutex);
2391
2392 __ov8856_power_off(ov8856);
2393
2394 return 0;
2395}
2396
2397static int ov8856_probe(struct i2c_client *client)
2398{
2399 struct ov8856 *ov8856;
2400 int ret;
2401
2402 ov8856 = devm_kzalloc(&client->dev, sizeof(*ov8856), GFP_KERNEL);
2403 if (!ov8856)
2404 return -ENOMEM;
2405
2406 ret = ov8856_get_hwcfg(ov8856, &client->dev);
2407 if (ret) {
2408 dev_err(&client->dev, "failed to get HW configuration: %d",
2409 ret);
2410 return ret;
2411 }
2412
2413 v4l2_i2c_subdev_init(&ov8856->sd, client, &ov8856_subdev_ops);
2414
2415 ret = __ov8856_power_on(ov8856);
2416 if (ret) {
2417 dev_err(&client->dev, "failed to power on\n");
2418 return ret;
2419 }
2420
2421 ret = ov8856_identify_module(ov8856);
2422 if (ret) {
2423 dev_err(&client->dev, "failed to find sensor: %d", ret);
2424 goto probe_power_off;
2425 }
2426
2427 mutex_init(&ov8856->mutex);
2428 ov8856->cur_mode = &ov8856->priv_lane->supported_modes[0];
2429 ret = ov8856_init_controls(ov8856);
2430 if (ret) {
2431 dev_err(&client->dev, "failed to init controls: %d", ret);
2432 goto probe_error_v4l2_ctrl_handler_free;
2433 }
2434
2435 ov8856->sd.internal_ops = &ov8856_internal_ops;
2436 ov8856->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
2437 ov8856->sd.entity.ops = &ov8856_subdev_entity_ops;
2438 ov8856->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
2439 ov8856->pad.flags = MEDIA_PAD_FL_SOURCE;
2440 ret = media_entity_pads_init(&ov8856->sd.entity, 1, &ov8856->pad);
2441 if (ret) {
2442 dev_err(&client->dev, "failed to init entity pads: %d", ret);
2443 goto probe_error_v4l2_ctrl_handler_free;
2444 }
2445
2446 ret = v4l2_async_register_subdev_sensor(&ov8856->sd);
2447 if (ret < 0) {
2448 dev_err(&client->dev, "failed to register V4L2 subdev: %d",
2449 ret);
2450 goto probe_error_media_entity_cleanup;
2451 }
2452
2453
2454
2455
2456
2457 pm_runtime_set_active(&client->dev);
2458 pm_runtime_enable(&client->dev);
2459 pm_runtime_idle(&client->dev);
2460
2461 return 0;
2462
2463probe_error_media_entity_cleanup:
2464 media_entity_cleanup(&ov8856->sd.entity);
2465
2466probe_error_v4l2_ctrl_handler_free:
2467 v4l2_ctrl_handler_free(ov8856->sd.ctrl_handler);
2468 mutex_destroy(&ov8856->mutex);
2469
2470probe_power_off:
2471 __ov8856_power_off(ov8856);
2472
2473 return ret;
2474}
2475
2476static const struct dev_pm_ops ov8856_pm_ops = {
2477 SET_SYSTEM_SLEEP_PM_OPS(ov8856_suspend, ov8856_resume)
2478};
2479
2480#ifdef CONFIG_ACPI
2481static const struct acpi_device_id ov8856_acpi_ids[] = {
2482 {"OVTI8856"},
2483 {}
2484};
2485
2486MODULE_DEVICE_TABLE(acpi, ov8856_acpi_ids);
2487#endif
2488
2489static const struct of_device_id ov8856_of_match[] = {
2490 { .compatible = "ovti,ov8856" },
2491 { }
2492};
2493MODULE_DEVICE_TABLE(of, ov8856_of_match);
2494
2495static struct i2c_driver ov8856_i2c_driver = {
2496 .driver = {
2497 .name = "ov8856",
2498 .pm = &ov8856_pm_ops,
2499 .acpi_match_table = ACPI_PTR(ov8856_acpi_ids),
2500 .of_match_table = ov8856_of_match,
2501 },
2502 .probe_new = ov8856_probe,
2503 .remove = ov8856_remove,
2504};
2505
2506module_i2c_driver(ov8856_i2c_driver);
2507
2508MODULE_AUTHOR("Ben Kao <ben.kao@intel.com>");
2509MODULE_DESCRIPTION("OmniVision OV8856 sensor driver");
2510MODULE_LICENSE("GPL v2");
2511