linux/drivers/media/pci/cx18/cx18-gpio.c
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   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 *  cx18 gpio functions
   4 *
   5 *  Derived from ivtv-gpio.c
   6 *
   7 *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
   8 *  Copyright (C) 2008  Andy Walls <awalls@md.metrocast.net>
   9 */
  10
  11#include "cx18-driver.h"
  12#include "cx18-io.h"
  13#include "cx18-cards.h"
  14#include "cx18-gpio.h"
  15#include "tuner-xc2028.h"
  16
  17/********************* GPIO stuffs *********************/
  18
  19/* GPIO registers */
  20#define CX18_REG_GPIO_IN     0xc72010
  21#define CX18_REG_GPIO_OUT1   0xc78100
  22#define CX18_REG_GPIO_DIR1   0xc78108
  23#define CX18_REG_GPIO_OUT2   0xc78104
  24#define CX18_REG_GPIO_DIR2   0xc7810c
  25
  26/*
  27 * HVR-1600 GPIO pins, courtesy of Hauppauge:
  28 *
  29 * gpio0: zilog ir process reset pin
  30 * gpio1: zilog programming pin (you should never use this)
  31 * gpio12: cx24227 reset pin
  32 * gpio13: cs5345 reset pin
  33*/
  34
  35/*
  36 * File scope utility functions
  37 */
  38static void gpio_write(struct cx18 *cx)
  39{
  40        u32 dir_lo = cx->gpio_dir & 0xffff;
  41        u32 val_lo = cx->gpio_val & 0xffff;
  42        u32 dir_hi = cx->gpio_dir >> 16;
  43        u32 val_hi = cx->gpio_val >> 16;
  44
  45        cx18_write_reg_expect(cx, dir_lo << 16,
  46                                        CX18_REG_GPIO_DIR1, ~dir_lo, dir_lo);
  47        cx18_write_reg_expect(cx, (dir_lo << 16) | val_lo,
  48                                        CX18_REG_GPIO_OUT1, val_lo, dir_lo);
  49        cx18_write_reg_expect(cx, dir_hi << 16,
  50                                        CX18_REG_GPIO_DIR2, ~dir_hi, dir_hi);
  51        cx18_write_reg_expect(cx, (dir_hi << 16) | val_hi,
  52                                        CX18_REG_GPIO_OUT2, val_hi, dir_hi);
  53}
  54
  55static void gpio_update(struct cx18 *cx, u32 mask, u32 data)
  56{
  57        if (mask == 0)
  58                return;
  59
  60        mutex_lock(&cx->gpio_lock);
  61        cx->gpio_val = (cx->gpio_val & ~mask) | (data & mask);
  62        gpio_write(cx);
  63        mutex_unlock(&cx->gpio_lock);
  64}
  65
  66static void gpio_reset_seq(struct cx18 *cx, u32 active_lo, u32 active_hi,
  67                           unsigned int assert_msecs,
  68                           unsigned int recovery_msecs)
  69{
  70        u32 mask;
  71
  72        mask = active_lo | active_hi;
  73        if (mask == 0)
  74                return;
  75
  76        /*
  77         * Assuming that active_hi and active_lo are a subsets of the bits in
  78         * gpio_dir.  Also assumes that active_lo and active_hi don't overlap
  79         * in any bit position
  80         */
  81
  82        /* Assert */
  83        gpio_update(cx, mask, ~active_lo);
  84        schedule_timeout_uninterruptible(msecs_to_jiffies(assert_msecs));
  85
  86        /* Deassert */
  87        gpio_update(cx, mask, ~active_hi);
  88        schedule_timeout_uninterruptible(msecs_to_jiffies(recovery_msecs));
  89}
  90
  91/*
  92 * GPIO Multiplexer - logical device
  93 */
  94static int gpiomux_log_status(struct v4l2_subdev *sd)
  95{
  96        struct cx18 *cx = v4l2_get_subdevdata(sd);
  97
  98        mutex_lock(&cx->gpio_lock);
  99        CX18_INFO_DEV(sd, "GPIO:  direction 0x%08x, value 0x%08x\n",
 100                      cx->gpio_dir, cx->gpio_val);
 101        mutex_unlock(&cx->gpio_lock);
 102        return 0;
 103}
 104
 105static int gpiomux_s_radio(struct v4l2_subdev *sd)
 106{
 107        struct cx18 *cx = v4l2_get_subdevdata(sd);
 108
 109        /*
 110         * FIXME - work out the cx->active/audio_input mess - this is
 111         * intended to handle the switch to radio mode and set the
 112         * audio routing, but we need to update the state in cx
 113         */
 114        gpio_update(cx, cx->card->gpio_audio_input.mask,
 115                        cx->card->gpio_audio_input.radio);
 116        return 0;
 117}
 118
 119static int gpiomux_s_std(struct v4l2_subdev *sd, v4l2_std_id norm)
 120{
 121        struct cx18 *cx = v4l2_get_subdevdata(sd);
 122        u32 data;
 123
 124        switch (cx->card->audio_inputs[cx->audio_input].muxer_input) {
 125        case 1:
 126                data = cx->card->gpio_audio_input.linein;
 127                break;
 128        case 0:
 129                data = cx->card->gpio_audio_input.tuner;
 130                break;
 131        default:
 132                /*
 133                 * FIXME - work out the cx->active/audio_input mess - this is
 134                 * intended to handle the switch from radio mode and set the
 135                 * audio routing, but we need to update the state in cx
 136                 */
 137                data = cx->card->gpio_audio_input.tuner;
 138                break;
 139        }
 140        gpio_update(cx, cx->card->gpio_audio_input.mask, data);
 141        return 0;
 142}
 143
 144static int gpiomux_s_audio_routing(struct v4l2_subdev *sd,
 145                                   u32 input, u32 output, u32 config)
 146{
 147        struct cx18 *cx = v4l2_get_subdevdata(sd);
 148        u32 data;
 149
 150        switch (input) {
 151        case 0:
 152                data = cx->card->gpio_audio_input.tuner;
 153                break;
 154        case 1:
 155                data = cx->card->gpio_audio_input.linein;
 156                break;
 157        case 2:
 158                data = cx->card->gpio_audio_input.radio;
 159                break;
 160        default:
 161                return -EINVAL;
 162        }
 163        gpio_update(cx, cx->card->gpio_audio_input.mask, data);
 164        return 0;
 165}
 166
 167static const struct v4l2_subdev_core_ops gpiomux_core_ops = {
 168        .log_status = gpiomux_log_status,
 169};
 170
 171static const struct v4l2_subdev_tuner_ops gpiomux_tuner_ops = {
 172        .s_radio = gpiomux_s_radio,
 173};
 174
 175static const struct v4l2_subdev_audio_ops gpiomux_audio_ops = {
 176        .s_routing = gpiomux_s_audio_routing,
 177};
 178
 179static const struct v4l2_subdev_video_ops gpiomux_video_ops = {
 180        .s_std = gpiomux_s_std,
 181};
 182
 183static const struct v4l2_subdev_ops gpiomux_ops = {
 184        .core = &gpiomux_core_ops,
 185        .tuner = &gpiomux_tuner_ops,
 186        .audio = &gpiomux_audio_ops,
 187        .video = &gpiomux_video_ops,
 188};
 189
 190/*
 191 * GPIO Reset Controller - logical device
 192 */
 193static int resetctrl_log_status(struct v4l2_subdev *sd)
 194{
 195        struct cx18 *cx = v4l2_get_subdevdata(sd);
 196
 197        mutex_lock(&cx->gpio_lock);
 198        CX18_INFO_DEV(sd, "GPIO:  direction 0x%08x, value 0x%08x\n",
 199                      cx->gpio_dir, cx->gpio_val);
 200        mutex_unlock(&cx->gpio_lock);
 201        return 0;
 202}
 203
 204static int resetctrl_reset(struct v4l2_subdev *sd, u32 val)
 205{
 206        struct cx18 *cx = v4l2_get_subdevdata(sd);
 207        const struct cx18_gpio_i2c_slave_reset *p;
 208
 209        p = &cx->card->gpio_i2c_slave_reset;
 210        switch (val) {
 211        case CX18_GPIO_RESET_I2C:
 212                gpio_reset_seq(cx, p->active_lo_mask, p->active_hi_mask,
 213                               p->msecs_asserted, p->msecs_recovery);
 214                break;
 215        case CX18_GPIO_RESET_Z8F0811:
 216                /*
 217                 * Assert timing for the Z8F0811 on HVR-1600 boards:
 218                 * 1. Assert RESET for min of 4 clock cycles at 18.432 MHz to
 219                 *    initiate
 220                 * 2. Reset then takes 66 WDT cycles at 10 kHz + 16 xtal clock
 221                 *    cycles (6,601,085 nanoseconds ~= 7 milliseconds)
 222                 * 3. DBG pin must be high before chip exits reset for normal
 223                 *    operation.  DBG is open drain and hopefully pulled high
 224                 *    since we don't normally drive it (GPIO 1?) for the
 225                 *    HVR-1600
 226                 * 4. Z8F0811 won't exit reset until RESET is deasserted
 227                 * 5. Zilog comes out of reset, loads reset vector address and
 228                 *    executes from there. Required recovery delay unknown.
 229                 */
 230                gpio_reset_seq(cx, p->ir_reset_mask, 0,
 231                               p->msecs_asserted, p->msecs_recovery);
 232                break;
 233        case CX18_GPIO_RESET_XC2028:
 234                if (cx->card->tuners[0].tuner == TUNER_XC2028)
 235                        gpio_reset_seq(cx, (1 << cx->card->xceive_pin), 0,
 236                                       1, 1);
 237                break;
 238        }
 239        return 0;
 240}
 241
 242static const struct v4l2_subdev_core_ops resetctrl_core_ops = {
 243        .log_status = resetctrl_log_status,
 244        .reset = resetctrl_reset,
 245};
 246
 247static const struct v4l2_subdev_ops resetctrl_ops = {
 248        .core = &resetctrl_core_ops,
 249};
 250
 251/*
 252 * External entry points
 253 */
 254void cx18_gpio_init(struct cx18 *cx)
 255{
 256        mutex_lock(&cx->gpio_lock);
 257        cx->gpio_dir = cx->card->gpio_init.direction;
 258        cx->gpio_val = cx->card->gpio_init.initial_value;
 259
 260        if (cx->card->tuners[0].tuner == TUNER_XC2028) {
 261                cx->gpio_dir |= 1 << cx->card->xceive_pin;
 262                cx->gpio_val |= 1 << cx->card->xceive_pin;
 263        }
 264
 265        if (cx->gpio_dir == 0) {
 266                mutex_unlock(&cx->gpio_lock);
 267                return;
 268        }
 269
 270        CX18_DEBUG_INFO("GPIO initial dir: %08x/%08x out: %08x/%08x\n",
 271                        cx18_read_reg(cx, CX18_REG_GPIO_DIR1),
 272                        cx18_read_reg(cx, CX18_REG_GPIO_DIR2),
 273                        cx18_read_reg(cx, CX18_REG_GPIO_OUT1),
 274                        cx18_read_reg(cx, CX18_REG_GPIO_OUT2));
 275
 276        gpio_write(cx);
 277        mutex_unlock(&cx->gpio_lock);
 278}
 279
 280int cx18_gpio_register(struct cx18 *cx, u32 hw)
 281{
 282        struct v4l2_subdev *sd;
 283        const struct v4l2_subdev_ops *ops;
 284        char *str;
 285
 286        switch (hw) {
 287        case CX18_HW_GPIO_MUX:
 288                sd = &cx->sd_gpiomux;
 289                ops = &gpiomux_ops;
 290                str = "gpio-mux";
 291                break;
 292        case CX18_HW_GPIO_RESET_CTRL:
 293                sd = &cx->sd_resetctrl;
 294                ops = &resetctrl_ops;
 295                str = "gpio-reset-ctrl";
 296                break;
 297        default:
 298                return -EINVAL;
 299        }
 300
 301        v4l2_subdev_init(sd, ops);
 302        v4l2_set_subdevdata(sd, cx);
 303        snprintf(sd->name, sizeof(sd->name), "%s %s", cx->v4l2_dev.name, str);
 304        sd->grp_id = hw;
 305        return v4l2_device_register_subdev(&cx->v4l2_dev, sd);
 306}
 307
 308void cx18_reset_ir_gpio(void *data)
 309{
 310        struct cx18 *cx = to_cx18((struct v4l2_device *)data);
 311
 312        if (cx->card->gpio_i2c_slave_reset.ir_reset_mask == 0)
 313                return;
 314
 315        CX18_DEBUG_INFO("Resetting IR microcontroller\n");
 316
 317        v4l2_subdev_call(&cx->sd_resetctrl,
 318                         core, reset, CX18_GPIO_RESET_Z8F0811);
 319}
 320EXPORT_SYMBOL(cx18_reset_ir_gpio);
 321/* This symbol is exported for use by lirc_pvr150 for the IR-blaster */
 322
 323/* Xceive tuner reset function */
 324int cx18_reset_tuner_gpio(void *dev, int component, int cmd, int value)
 325{
 326        struct i2c_algo_bit_data *algo = dev;
 327        struct cx18_i2c_algo_callback_data *cb_data = algo->data;
 328        struct cx18 *cx = cb_data->cx;
 329
 330        if (cmd != XC2028_TUNER_RESET ||
 331            cx->card->tuners[0].tuner != TUNER_XC2028)
 332                return 0;
 333
 334        CX18_DEBUG_INFO("Resetting XCeive tuner\n");
 335        return v4l2_subdev_call(&cx->sd_resetctrl,
 336                                core, reset, CX18_GPIO_RESET_XC2028);
 337}
 338