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8#ifndef CX88_H
9#define CX88_H
10
11#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12
13#include <linux/pci.h>
14#include <linux/i2c.h>
15#include <linux/i2c-algo-bit.h>
16#include <linux/videodev2.h>
17#include <linux/kdev_t.h>
18#include <linux/refcount.h>
19
20#include <media/v4l2-device.h>
21#include <media/v4l2-fh.h>
22#include <media/tuner.h>
23#include <media/tveeprom.h>
24#include <media/videobuf2-dma-sg.h>
25#include <media/drv-intf/cx2341x.h>
26#include <media/videobuf2-dvb.h>
27#include <media/i2c/ir-kbd-i2c.h>
28#include <media/i2c/wm8775.h>
29
30#include "cx88-reg.h"
31#include "tuner-xc2028.h"
32
33#include <linux/mutex.h>
34
35#define CX88_VERSION "1.0.0"
36
37#define UNSET (-1U)
38
39#define CX88_MAXBOARDS 8
40
41
42#define MAX_CX88_INPUT 8
43
44
45
46
47
48#define CX88_NORMS (V4L2_STD_ALL \
49 & ~V4L2_STD_PAL_H \
50 & ~V4L2_STD_NTSC_M_KR \
51 & ~V4L2_STD_SECAM_LC)
52
53#define FORMAT_FLAGS_PACKED 0x01
54#define FORMAT_FLAGS_PLANAR 0x02
55
56#define VBI_LINE_PAL_COUNT 18
57#define VBI_LINE_NTSC_COUNT 12
58#define VBI_LINE_LENGTH 2048
59
60#define AUD_RDS_LINES 4
61
62
63#define SHADOW_AUD_VOL_CTL 1
64#define SHADOW_AUD_BAL_CTL 2
65#define SHADOW_MAX 3
66
67
68enum cx88_deemph_type {
69 FM_NO_DEEMPH = 0,
70 FM_DEEMPH_50,
71 FM_DEEMPH_75
72};
73
74enum cx88_board_type {
75 CX88_BOARD_NONE = 0,
76 CX88_MPEG_DVB,
77 CX88_MPEG_BLACKBIRD
78};
79
80enum cx8802_board_access {
81 CX8802_DRVCTL_SHARED = 1,
82 CX8802_DRVCTL_EXCLUSIVE = 2,
83};
84
85
86
87
88static inline unsigned int norm_maxw(v4l2_std_id norm)
89{
90 return 720;
91}
92
93static inline unsigned int norm_maxh(v4l2_std_id norm)
94{
95 return (norm & V4L2_STD_525_60) ? 480 : 576;
96}
97
98
99
100
101struct cx8800_fmt {
102 u32 fourcc;
103 int depth;
104 int flags;
105 u32 cxformat;
106};
107
108
109
110
111#define SRAM_CH21 0
112#define SRAM_CH22 1
113#define SRAM_CH23 2
114#define SRAM_CH24 3
115#define SRAM_CH25 4
116#define SRAM_CH26 5
117#define SRAM_CH28 6
118#define SRAM_CH27 7
119
120
121struct sram_channel {
122 const char *name;
123 u32 cmds_start;
124 u32 ctrl_start;
125 u32 cdt;
126 u32 fifo_start;
127 u32 fifo_size;
128 u32 ptr1_reg;
129 u32 ptr2_reg;
130 u32 cnt1_reg;
131 u32 cnt2_reg;
132};
133
134extern const struct sram_channel cx88_sram_channels[];
135
136
137
138
139#define CX88_BOARD_NOAUTO UNSET
140#define CX88_BOARD_UNKNOWN 0
141#define CX88_BOARD_HAUPPAUGE 1
142#define CX88_BOARD_GDI 2
143#define CX88_BOARD_PIXELVIEW 3
144#define CX88_BOARD_ATI_WONDER_PRO 4
145#define CX88_BOARD_WINFAST2000XP_EXPERT 5
146#define CX88_BOARD_AVERTV_STUDIO_303 6
147#define CX88_BOARD_MSI_TVANYWHERE_MASTER 7
148#define CX88_BOARD_WINFAST_DV2000 8
149#define CX88_BOARD_LEADTEK_PVR2000 9
150#define CX88_BOARD_IODATA_GVVCP3PCI 10
151#define CX88_BOARD_PROLINK_PLAYTVPVR 11
152#define CX88_BOARD_ASUS_PVR_416 12
153#define CX88_BOARD_MSI_TVANYWHERE 13
154#define CX88_BOARD_KWORLD_DVB_T 14
155#define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1 15
156#define CX88_BOARD_KWORLD_LTV883 16
157#define CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q 17
158#define CX88_BOARD_HAUPPAUGE_DVB_T1 18
159#define CX88_BOARD_CONEXANT_DVB_T1 19
160#define CX88_BOARD_PROVIDEO_PV259 20
161#define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS 21
162#define CX88_BOARD_PCHDTV_HD3000 22
163#define CX88_BOARD_DNTV_LIVE_DVB_T 23
164#define CX88_BOARD_HAUPPAUGE_ROSLYN 24
165#define CX88_BOARD_DIGITALLOGIC_MEC 25
166#define CX88_BOARD_IODATA_GVBCTV7E 26
167#define CX88_BOARD_PIXELVIEW_PLAYTV_ULTRA_PRO 27
168#define CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T 28
169#define CX88_BOARD_ADSTECH_DVB_T_PCI 29
170#define CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1 30
171#define CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD 31
172#define CX88_BOARD_AVERMEDIA_ULTRATV_MC_550 32
173#define CX88_BOARD_KWORLD_VSTREAM_EXPERT_DVD 33
174#define CX88_BOARD_ATI_HDTVWONDER 34
175#define CX88_BOARD_WINFAST_DTV1000 35
176#define CX88_BOARD_AVERTV_303 36
177#define CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1 37
178#define CX88_BOARD_HAUPPAUGE_NOVASE2_S1 38
179#define CX88_BOARD_KWORLD_DVBS_100 39
180#define CX88_BOARD_HAUPPAUGE_HVR1100 40
181#define CX88_BOARD_HAUPPAUGE_HVR1100LP 41
182#define CX88_BOARD_DNTV_LIVE_DVB_T_PRO 42
183#define CX88_BOARD_KWORLD_DVB_T_CX22702 43
184#define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL 44
185#define CX88_BOARD_KWORLD_HARDWARE_MPEG_TV_XPERT 45
186#define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID 46
187#define CX88_BOARD_PCHDTV_HD5500 47
188#define CX88_BOARD_KWORLD_MCE200_DELUXE 48
189#define CX88_BOARD_PIXELVIEW_PLAYTV_P7000 49
190#define CX88_BOARD_NPGTECH_REALTV_TOP10FM 50
191#define CX88_BOARD_WINFAST_DTV2000H 51
192#define CX88_BOARD_GENIATECH_DVBS 52
193#define CX88_BOARD_HAUPPAUGE_HVR3000 53
194#define CX88_BOARD_NORWOOD_MICRO 54
195#define CX88_BOARD_TE_DTV_250_OEM_SWANN 55
196#define CX88_BOARD_HAUPPAUGE_HVR1300 56
197#define CX88_BOARD_ADSTECH_PTV_390 57
198#define CX88_BOARD_PINNACLE_PCTV_HD_800i 58
199#define CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO 59
200#define CX88_BOARD_PINNACLE_HYBRID_PCTV 60
201#define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL 61
202#define CX88_BOARD_POWERCOLOR_REAL_ANGEL 62
203#define CX88_BOARD_GENIATECH_X8000_MT 63
204#define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO 64
205#define CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD 65
206#define CX88_BOARD_PROLINK_PV_8000GT 66
207#define CX88_BOARD_KWORLD_ATSC_120 67
208#define CX88_BOARD_HAUPPAUGE_HVR4000 68
209#define CX88_BOARD_HAUPPAUGE_HVR4000LITE 69
210#define CX88_BOARD_TEVII_S460 70
211#define CX88_BOARD_OMICOM_SS4_PCI 71
212#define CX88_BOARD_TBS_8920 72
213#define CX88_BOARD_TEVII_S420 73
214#define CX88_BOARD_PROLINK_PV_GLOBAL_XTREME 74
215#define CX88_BOARD_PROF_7300 75
216#define CX88_BOARD_SATTRADE_ST4200 76
217#define CX88_BOARD_TBS_8910 77
218#define CX88_BOARD_PROF_6200 78
219#define CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII 79
220#define CX88_BOARD_HAUPPAUGE_IRONLY 80
221#define CX88_BOARD_WINFAST_DTV1800H 81
222#define CX88_BOARD_WINFAST_DTV2000H_J 82
223#define CX88_BOARD_PROF_7301 83
224#define CX88_BOARD_SAMSUNG_SMT_7020 84
225#define CX88_BOARD_TWINHAN_VP1027_DVBS 85
226#define CX88_BOARD_TEVII_S464 86
227#define CX88_BOARD_WINFAST_DTV2000H_PLUS 87
228#define CX88_BOARD_WINFAST_DTV1800H_XC4000 88
229#define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36 89
230#define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43 90
231#define CX88_BOARD_NOTONLYTV_LV3H 91
232
233enum cx88_itype {
234 CX88_VMUX_COMPOSITE1 = 1,
235 CX88_VMUX_COMPOSITE2,
236 CX88_VMUX_COMPOSITE3,
237 CX88_VMUX_COMPOSITE4,
238 CX88_VMUX_SVIDEO,
239 CX88_VMUX_TELEVISION,
240 CX88_VMUX_CABLE,
241 CX88_VMUX_DVB,
242 CX88_VMUX_DEBUG,
243 CX88_RADIO,
244};
245
246struct cx88_input {
247 enum cx88_itype type;
248 u32 gpio0, gpio1, gpio2, gpio3;
249 unsigned int vmux:2;
250 unsigned int audioroute:4;
251};
252
253enum cx88_audio_chip {
254 CX88_AUDIO_WM8775 = 1,
255 CX88_AUDIO_TVAUDIO,
256};
257
258struct cx88_board {
259 const char *name;
260 unsigned int tuner_type;
261 unsigned int radio_type;
262 unsigned char tuner_addr;
263 unsigned char radio_addr;
264 int tda9887_conf;
265 struct cx88_input input[MAX_CX88_INPUT];
266 struct cx88_input radio;
267 enum cx88_board_type mpeg;
268 enum cx88_audio_chip audio_chip;
269 int num_frontends;
270
271
272 int i2sinputcntl;
273};
274
275struct cx88_subid {
276 u16 subvendor;
277 u16 subdevice;
278 u32 card;
279};
280
281enum cx88_tvaudio {
282 WW_NONE = 1,
283 WW_BTSC,
284 WW_BG,
285 WW_DK,
286 WW_I,
287 WW_L,
288 WW_EIAJ,
289 WW_I2SPT,
290 WW_FM,
291 WW_I2SADC,
292 WW_M
293};
294
295#define INPUT(nr) (core->board.input[nr])
296
297
298
299
300#define RESOURCE_OVERLAY 1
301#define RESOURCE_VIDEO 2
302#define RESOURCE_VBI 4
303
304#define BUFFER_TIMEOUT msecs_to_jiffies(2000)
305
306struct cx88_riscmem {
307 unsigned int size;
308 __le32 *cpu;
309 __le32 *jmp;
310 dma_addr_t dma;
311};
312
313
314struct cx88_buffer {
315
316 struct vb2_v4l2_buffer vb;
317 struct list_head list;
318
319
320 unsigned int bpl;
321 struct cx88_riscmem risc;
322};
323
324struct cx88_dmaqueue {
325 struct list_head active;
326 u32 count;
327};
328
329struct cx8800_dev;
330struct cx8802_dev;
331
332struct cx88_core {
333 struct list_head devlist;
334 refcount_t refcount;
335
336
337 int nr;
338 char name[32];
339 u32 model;
340
341
342 int pci_bus;
343 int pci_slot;
344 u32 __iomem *lmmio;
345 u8 __iomem *bmmio;
346 u32 shadow[SHADOW_MAX];
347 int pci_irqmask;
348
349
350 struct i2c_adapter i2c_adap;
351 struct i2c_algo_bit_data i2c_algo;
352 struct i2c_client i2c_client;
353 u32 i2c_state, i2c_rc;
354
355
356 struct v4l2_device v4l2_dev;
357 struct v4l2_ctrl_handler video_hdl;
358 struct v4l2_ctrl *chroma_agc;
359 struct v4l2_ctrl_handler audio_hdl;
360 struct v4l2_subdev *sd_wm8775;
361 struct i2c_client *i2c_rtc;
362 unsigned int boardnr;
363 struct cx88_board board;
364
365
366 unsigned int tuner_formats;
367
368
369#if IS_ENABLED(CONFIG_VIDEO_CX88_DVB)
370 int (*prev_set_voltage)(struct dvb_frontend *fe,
371 enum fe_sec_voltage voltage);
372#endif
373 void (*gate_ctrl)(struct cx88_core *core, int open);
374
375
376 struct task_struct *kthread;
377 v4l2_std_id tvnorm;
378 unsigned int width, height;
379 unsigned int field;
380 enum cx88_tvaudio tvaudio;
381 u32 audiomode_manual;
382 u32 audiomode_current;
383 u32 input;
384 u32 last_analog_input;
385 u32 astat;
386 u32 use_nicam;
387 unsigned long last_change;
388
389
390 struct cx88_IR *ir;
391
392
393 struct IR_i2c_init_data init_data;
394 struct wm8775_platform_data wm8775_data;
395
396 struct mutex lock;
397
398 u32 freq;
399
400
401
402
403
404 struct cx8802_dev *dvbdev;
405
406 struct cx8800_dev *v4ldev;
407 enum cx88_board_type active_type_id;
408 int active_ref;
409 int active_fe_id;
410};
411
412static inline struct cx88_core *to_core(struct v4l2_device *v4l2_dev)
413{
414 return container_of(v4l2_dev, struct cx88_core, v4l2_dev);
415}
416
417#define call_hw(core, grpid, o, f, args...) \
418 do { \
419 if (!core->i2c_rc) { \
420 if (core->gate_ctrl) \
421 core->gate_ctrl(core, 1); \
422 v4l2_device_call_all(&core->v4l2_dev, \
423 grpid, o, f, ##args); \
424 if (core->gate_ctrl) \
425 core->gate_ctrl(core, 0); \
426 } \
427 } while (0)
428
429#define call_all(core, o, f, args...) call_hw(core, 0, o, f, ##args)
430
431#define WM8775_GID (1 << 0)
432
433#define wm8775_s_ctrl(core, id, val) \
434 do { \
435 struct v4l2_ctrl *ctrl_ = \
436 v4l2_ctrl_find(core->sd_wm8775->ctrl_handler, id);\
437 if (ctrl_ && !core->i2c_rc) { \
438 if (core->gate_ctrl) \
439 core->gate_ctrl(core, 1); \
440 v4l2_ctrl_s_ctrl(ctrl_, val); \
441 if (core->gate_ctrl) \
442 core->gate_ctrl(core, 0); \
443 } \
444 } while (0)
445
446#define wm8775_g_ctrl(core, id) \
447 ({ \
448 struct v4l2_ctrl *ctrl_ = \
449 v4l2_ctrl_find(core->sd_wm8775->ctrl_handler, id);\
450 s32 val = 0; \
451 if (ctrl_ && !core->i2c_rc) { \
452 if (core->gate_ctrl) \
453 core->gate_ctrl(core, 1); \
454 val = v4l2_ctrl_g_ctrl(ctrl_); \
455 if (core->gate_ctrl) \
456 core->gate_ctrl(core, 0); \
457 } \
458 val; \
459 })
460
461
462
463
464struct cx8800_suspend_state {
465 int disabled;
466};
467
468struct cx8800_dev {
469 struct cx88_core *core;
470 spinlock_t slock;
471
472
473 unsigned int resources;
474 struct video_device video_dev;
475 struct video_device vbi_dev;
476 struct video_device radio_dev;
477
478
479 struct pci_dev *pci;
480 unsigned char pci_rev, pci_lat;
481
482 const struct cx8800_fmt *fmt;
483
484
485 struct cx88_dmaqueue vidq;
486 struct vb2_queue vb2_vidq;
487 struct cx88_dmaqueue vbiq;
488 struct vb2_queue vb2_vbiq;
489
490
491
492
493 struct cx8800_suspend_state state;
494};
495
496
497
498
499
500
501
502
503struct cx8802_suspend_state {
504 int disabled;
505};
506
507struct cx8802_driver {
508 struct cx88_core *core;
509
510
511 struct list_head drvlist;
512
513
514 enum cx88_board_type type_id;
515 enum cx8802_board_access hw_access;
516
517
518 int (*suspend)(struct pci_dev *pci_dev, pm_message_t state);
519 int (*resume)(struct pci_dev *pci_dev);
520
521
522
523
524 int (*probe)(struct cx8802_driver *drv);
525 int (*remove)(struct cx8802_driver *drv);
526
527
528 int (*advise_acquire)(struct cx8802_driver *drv);
529 int (*advise_release)(struct cx8802_driver *drv);
530
531
532 int (*request_acquire)(struct cx8802_driver *drv);
533 int (*request_release)(struct cx8802_driver *drv);
534};
535
536struct cx8802_dev {
537 struct cx88_core *core;
538 spinlock_t slock;
539
540
541 struct pci_dev *pci;
542 unsigned char pci_rev, pci_lat;
543
544
545 struct cx88_dmaqueue mpegq;
546 struct vb2_queue vb2_mpegq;
547 u32 ts_packet_size;
548 u32 ts_packet_count;
549
550
551 struct cx8802_suspend_state state;
552
553
554 struct list_head devlist;
555#if IS_ENABLED(CONFIG_VIDEO_CX88_BLACKBIRD)
556 struct video_device mpeg_dev;
557 u32 mailbox;
558
559
560 struct cx2341x_handler cxhdl;
561
562#endif
563
564#if IS_ENABLED(CONFIG_VIDEO_CX88_DVB)
565
566 struct vb2_dvb_frontends frontends;
567#endif
568
569#if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
570
571 struct vp3054_i2c_state *vp3054;
572#endif
573
574 unsigned char ts_gen_cntrl;
575
576
577 struct list_head drvlist;
578
579 struct work_struct request_module_wk;
580};
581
582
583
584#define cx_read(reg) readl(core->lmmio + ((reg) >> 2))
585#define cx_write(reg, value) writel((value), core->lmmio + ((reg) >> 2))
586#define cx_writeb(reg, value) writeb((value), core->bmmio + (reg))
587
588#define cx_andor(reg, mask, value) \
589 writel((readl(core->lmmio + ((reg) >> 2)) & ~(mask)) |\
590 ((value) & (mask)), core->lmmio + ((reg) >> 2))
591#define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
592#define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
593
594#define cx_wait(d) { if (need_resched()) schedule(); else udelay(d); }
595
596
597#define cx_sread(sreg) (core->shadow[sreg])
598#define cx_swrite(sreg, reg, value) \
599 (core->shadow[sreg] = value, \
600 writel(core->shadow[sreg], core->lmmio + ((reg) >> 2)))
601#define cx_sandor(sreg, reg, mask, value) \
602 (core->shadow[sreg] = (core->shadow[sreg] & ~(mask)) | \
603 ((value) & (mask)), \
604 writel(core->shadow[sreg], \
605 core->lmmio + ((reg) >> 2)))
606
607
608
609
610extern unsigned int cx88_core_debug;
611
612void cx88_print_irqbits(const char *tag, const char *strings[],
613 int len, u32 bits, u32 mask);
614
615int cx88_core_irq(struct cx88_core *core, u32 status);
616void cx88_wakeup(struct cx88_core *core,
617 struct cx88_dmaqueue *q, u32 count);
618void cx88_shutdown(struct cx88_core *core);
619int cx88_reset(struct cx88_core *core);
620
621extern int
622cx88_risc_buffer(struct pci_dev *pci, struct cx88_riscmem *risc,
623 struct scatterlist *sglist,
624 unsigned int top_offset, unsigned int bottom_offset,
625 unsigned int bpl, unsigned int padding, unsigned int lines);
626extern int
627cx88_risc_databuffer(struct pci_dev *pci, struct cx88_riscmem *risc,
628 struct scatterlist *sglist, unsigned int bpl,
629 unsigned int lines, unsigned int lpi);
630
631void cx88_risc_disasm(struct cx88_core *core,
632 struct cx88_riscmem *risc);
633int cx88_sram_channel_setup(struct cx88_core *core,
634 const struct sram_channel *ch,
635 unsigned int bpl, u32 risc);
636void cx88_sram_channel_dump(struct cx88_core *core,
637 const struct sram_channel *ch);
638
639int cx88_set_scale(struct cx88_core *core, unsigned int width,
640 unsigned int height, enum v4l2_field field);
641int cx88_set_tvnorm(struct cx88_core *core, v4l2_std_id norm);
642
643void cx88_vdev_init(struct cx88_core *core,
644 struct pci_dev *pci,
645 struct video_device *vfd,
646 const struct video_device *template_,
647 const char *type);
648struct cx88_core *cx88_core_get(struct pci_dev *pci);
649void cx88_core_put(struct cx88_core *core,
650 struct pci_dev *pci);
651
652int cx88_start_audio_dma(struct cx88_core *core);
653int cx88_stop_audio_dma(struct cx88_core *core);
654
655
656
657
658
659int cx8800_vbi_fmt(struct file *file, void *priv,
660 struct v4l2_format *f);
661
662void cx8800_stop_vbi_dma(struct cx8800_dev *dev);
663int cx8800_restart_vbi_queue(struct cx8800_dev *dev, struct cx88_dmaqueue *q);
664
665extern const struct vb2_ops cx8800_vbi_qops;
666
667
668
669
670int cx88_i2c_init(struct cx88_core *core, struct pci_dev *pci);
671
672
673
674
675int cx88_tuner_callback(void *dev, int component, int command, int arg);
676int cx88_get_resources(const struct cx88_core *core,
677 struct pci_dev *pci);
678struct cx88_core *cx88_core_create(struct pci_dev *pci, int nr);
679void cx88_setup_xc3028(struct cx88_core *core, struct xc2028_ctrl *ctl);
680
681
682
683
684void cx88_set_tvaudio(struct cx88_core *core);
685void cx88_newstation(struct cx88_core *core);
686void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t);
687void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual);
688int cx88_audio_thread(void *data);
689
690int cx8802_register_driver(struct cx8802_driver *drv);
691int cx8802_unregister_driver(struct cx8802_driver *drv);
692
693
694struct cx8802_driver *cx8802_get_driver(struct cx8802_dev *dev,
695 enum cx88_board_type btype);
696
697
698
699
700s32 cx88_dsp_detect_stereo_sap(struct cx88_core *core);
701
702
703
704
705int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci);
706int cx88_ir_fini(struct cx88_core *core);
707void cx88_ir_irq(struct cx88_core *core);
708int cx88_ir_start(struct cx88_core *core);
709void cx88_ir_stop(struct cx88_core *core);
710void cx88_i2c_init_ir(struct cx88_core *core);
711
712
713
714
715int cx8802_buf_prepare(struct vb2_queue *q, struct cx8802_dev *dev,
716 struct cx88_buffer *buf);
717void cx8802_buf_queue(struct cx8802_dev *dev, struct cx88_buffer *buf);
718void cx8802_cancel_buffers(struct cx8802_dev *dev);
719int cx8802_start_dma(struct cx8802_dev *dev,
720 struct cx88_dmaqueue *q,
721 struct cx88_buffer *buf);
722
723
724
725int cx88_enum_input(struct cx88_core *core, struct v4l2_input *i);
726int cx88_set_freq(struct cx88_core *core, const struct v4l2_frequency *f);
727int cx88_video_mux(struct cx88_core *core, unsigned int input);
728int cx88_querycap(struct file *file, struct cx88_core *core,
729 struct v4l2_capability *cap);
730
731#endif
732
