LXR linux/drivers/media/pci/tw5864/tw5864.h

   1/* SPDX-License-Identifier: GPL-2.0-or-later */
   2/*
   3 *  TW5864 driver  - common header file
   4 *
   5 *  Copyright (C) 2016 Bluecherry, LLC <maintainers@bluecherrydvr.com>
   6 */
   7
   8#include <linux/pci.h>
   9#include <linux/videodev2.h>
  10#include <linux/notifier.h>
  11#include <linux/delay.h>
  12#include <linux/mutex.h>
  13#include <linux/io.h>
  14#include <linux/interrupt.h>
  15
  16#include <media/v4l2-common.h>
  17#include <media/v4l2-ioctl.h>
  18#include <media/v4l2-ctrls.h>
  19#include <media/v4l2-device.h>
  20#include <media/videobuf2-dma-sg.h>
  21
  22#include "tw5864-reg.h"
  23
  24#define PCI_DEVICE_ID_TECHWELL_5864 0x5864
  25
  26#define TW5864_NORMS V4L2_STD_ALL
  27
  28/* ----------------------------------------------------------- */
  29/* card configuration   */
  30
  31#define TW5864_INPUTS 4
  32
  33/* The TW5864 uses 192 (16x12) detection cells in full screen for motion
  34 * detection. Each detection cell is composed of 44 pixels and 20 lines for
  35 * NTSC and 24 lines for PAL.
  36 */
  37#define MD_CELLS_HOR 16
  38#define MD_CELLS_VERT 12
  39#define MD_CELLS (MD_CELLS_HOR * MD_CELLS_VERT)
  40
  41#define H264_VLC_BUF_SIZE 0x80000
  42#define H264_MV_BUF_SIZE 0x2000 /* device writes 5396 bytes */
  43#define QP_VALUE 28
  44#define MAX_GOP_SIZE 255
  45#define GOP_SIZE MAX_GOP_SIZE
  46
  47enum resolution {
  48        D1 = 1,
  49        HD1 = 2, /* half d1 - 360x(240|288) */
  50        CIF = 3,
  51        QCIF = 4,
  52};
  53
  54/* ----------------------------------------------------------- */
  55/* device / file handle status                                 */
  56
  57struct tw5864_dev; /* forward delclaration */
  58
  59/* buffer for one video/vbi/ts frame */
  60struct tw5864_buf {
  61        struct vb2_v4l2_buffer vb;
  62        struct list_head list;
  63
  64        unsigned int size;
  65};
  66
  67struct tw5864_dma_buf {
  68        void *addr;
  69        dma_addr_t dma_addr;
  70};
  71
  72enum tw5864_vid_std {
  73        STD_NTSC = 0, /* NTSC (M) */
  74        STD_PAL = 1, /* PAL (B, D, G, H, I) */
  75        STD_SECAM = 2, /* SECAM */
  76        STD_NTSC443 = 3, /* NTSC4.43 */
  77        STD_PAL_M = 4, /* PAL (M) */
  78        STD_PAL_CN = 5, /* PAL (CN) */
  79        STD_PAL_60 = 6, /* PAL 60 */
  80        STD_INVALID = 7,
  81        STD_AUTO = 7,
  82};
  83
  84struct tw5864_input {
  85        int nr; /* input number */
  86        struct tw5864_dev *root;
  87        struct mutex lock; /* used for vidq and vdev */
  88        spinlock_t slock; /* used for sync between ISR, tasklet & V4L2 API */
  89        struct video_device vdev;
  90        struct v4l2_ctrl_handler hdl;
  91        struct vb2_queue vidq;
  92        struct list_head active;
  93        enum resolution resolution;
  94        unsigned int width, height;
  95        unsigned int frame_seqno;
  96        unsigned int frame_gop_seqno;
  97        unsigned int h264_idr_pic_id;
  98        int enabled;
  99        enum tw5864_vid_std std;
 100        v4l2_std_id v4l2_std;
 101        int tail_nb_bits;
 102        u8 tail;
 103        u8 *buf_cur_ptr;
 104        int buf_cur_space_left;
 105
 106        u32 reg_interlacing;
 107        u32 reg_vlc;
 108        u32 reg_dsp_codec;
 109        u32 reg_dsp;
 110        u32 reg_emu;
 111        u32 reg_dsp_qp;
 112        u32 reg_dsp_ref_mvp_lambda;
 113        u32 reg_dsp_i4x4_weight;
 114        u32 buf_id;
 115
 116        struct tw5864_buf *vb;
 117
 118        struct v4l2_ctrl *md_threshold_grid_ctrl;
 119        u16 md_threshold_grid_values[12 * 16];
 120        int qp;
 121        int gop;
 122
 123        /*
 124         * In (1/MAX_FPS) units.
 125         * For max FPS (default), set to 1.
 126         * For 1 FPS, set to e.g. 32.
 127         */
 128        int frame_interval;
 129        unsigned long new_frame_deadline;
 130};
 131
 132struct tw5864_h264_frame {
 133        struct tw5864_dma_buf vlc;
 134        struct tw5864_dma_buf mv;
 135        int vlc_len;
 136        u32 checksum;
 137        struct tw5864_input *input;
 138        u64 timestamp;
 139        unsigned int seqno;
 140        unsigned int gop_seqno;
 141};
 142
 143/* global device status */
 144struct tw5864_dev {
 145        spinlock_t slock; /* used for sync between ISR, tasklet & V4L2 API */
 146        struct v4l2_device v4l2_dev;
 147        struct tw5864_input inputs[TW5864_INPUTS];
 148#define H264_BUF_CNT 4
 149        struct tw5864_h264_frame h264_buf[H264_BUF_CNT];
 150        int h264_buf_r_index;
 151        int h264_buf_w_index;
 152
 153        struct tasklet_struct tasklet;
 154
 155        int encoder_busy;
 156        /* Input number to check next for ready raw picture (in RR fashion) */
 157        int next_input;
 158
 159        /* pci i/o */
 160        char name[64];
 161        struct pci_dev *pci;
 162        void __iomem *mmio;
 163        u32 irqmask;
 164};
 165
 166#define tw_readl(reg) readl(dev->mmio + reg)
 167#define tw_mask_readl(reg, mask) \
 168        (tw_readl(reg) & (mask))
 169#define tw_mask_shift_readl(reg, mask, shift) \
 170        (tw_mask_readl((reg), ((mask) << (shift))) >> (shift))
 171
 172#define tw_writel(reg, value) writel((value), dev->mmio + reg)
 173#define tw_mask_writel(reg, mask, value) \
 174        tw_writel(reg, (tw_readl(reg) & ~(mask)) | ((value) & (mask)))
 175#define tw_mask_shift_writel(reg, mask, shift, value) \
 176        tw_mask_writel((reg), ((mask) << (shift)), ((value) << (shift)))
 177
 178#define tw_setl(reg, bit) tw_writel((reg), tw_readl(reg) | (bit))
 179#define tw_clearl(reg, bit) tw_writel((reg), tw_readl(reg) & ~(bit))
 180
 181u8 tw5864_indir_readb(struct tw5864_dev *dev, u16 addr);
 182#define tw_indir_readb(addr) tw5864_indir_readb(dev, addr)
 183void tw5864_indir_writeb(struct tw5864_dev *dev, u16 addr, u8 data);
 184#define tw_indir_writeb(addr, data) tw5864_indir_writeb(dev, addr, data)
 185
 186void tw5864_irqmask_apply(struct tw5864_dev *dev);
 187int tw5864_video_init(struct tw5864_dev *dev, int *video_nr);
 188void tw5864_video_fini(struct tw5864_dev *dev);
 189void tw5864_prepare_frame_headers(struct tw5864_input *input);
 190void tw5864_h264_put_stream_header(u8 **buf, size_t *space_left, int qp,
 191                                   int width, int height);
 192void tw5864_h264_put_slice_header(u8 **buf, size_t *space_left,
 193                                  unsigned int idr_pic_id,
 194                                  unsigned int frame_gop_seqno,
 195                                  int *tail_nb_bits, u8 *tail);
 196void tw5864_request_encoded_frame(struct tw5864_input *input);
 197