LXR linux/drivers/media/pci/tw68/tw68.h

   1/* SPDX-License-Identifier: GPL-2.0-or-later */
   2/*
   3 *  tw68 driver common header file
   4 *
   5 *  Much of this code is derived from the cx88 and sa7134 drivers, which
   6 *  were in turn derived from the bt87x driver.  The original work was by
   7 *  Gerd Knorr; more recently the code was enhanced by Mauro Carvalho Chehab,
   8 *  Hans Verkuil, Andy Walls and many others.  Their work is gratefully
   9 *  acknowledged.  Full credit goes to them - any problems within this code
  10 *  are mine.
  11 *
  12 *  Copyright (C) 2009  William M. Brack
  13 *
  14 *  Refactored and updated to the latest v4l core frameworks:
  15 *
  16 *  Copyright (C) 2014 Hans Verkuil <hverkuil@xs4all.nl>
  17 */
  18
  19#include <linux/pci.h>
  20#include <linux/videodev2.h>
  21#include <linux/notifier.h>
  22#include <linux/delay.h>
  23#include <linux/mutex.h>
  24#include <linux/io.h>
  25
  26#include <media/v4l2-common.h>
  27#include <media/v4l2-ioctl.h>
  28#include <media/v4l2-ctrls.h>
  29#include <media/v4l2-device.h>
  30#include <media/videobuf2-v4l2.h>
  31#include <media/videobuf2-dma-sg.h>
  32
  33#include "tw68-reg.h"
  34
  35#define UNSET   (-1U)
  36
  37#define TW68_NORMS ( \
  38        V4L2_STD_NTSC    | V4L2_STD_PAL       | V4L2_STD_SECAM    | \
  39        V4L2_STD_PAL_M   | V4L2_STD_PAL_Nc    | V4L2_STD_PAL_60)
  40
  41#define TW68_VID_INTS   (TW68_FFERR | TW68_PABORT | TW68_DMAPERR | \
  42                         TW68_FFOF   | TW68_DMAPI)
  43/* TW6800 chips have trouble with these, so we don't set them for that chip */
  44#define TW68_VID_INTSX  (TW68_FDMIS | TW68_HLOCK | TW68_VLOCK)
  45
  46#define TW68_I2C_INTS   (TW68_SBERR | TW68_SBDONE | TW68_SBERR2  | \
  47                         TW68_SBDONE2)
  48
  49enum tw68_decoder_type {
  50        TW6800,
  51        TW6801,
  52        TW6804,
  53        TWXXXX,
  54};
  55
  56/* ----------------------------------------------------------- */
  57/* static data                                                 */
  58
  59struct tw68_tvnorm {
  60        char            *name;
  61        v4l2_std_id     id;
  62
  63        /* video decoder */
  64        u32     sync_control;
  65        u32     luma_control;
  66        u32     chroma_ctrl1;
  67        u32     chroma_gain;
  68        u32     chroma_ctrl2;
  69        u32     vgate_misc;
  70
  71        /* video scaler */
  72        u32     h_delay;
  73        u32     h_delay0;       /* for TW6800 */
  74        u32     h_start;
  75        u32     h_stop;
  76        u32     v_delay;
  77        u32     video_v_start;
  78        u32     video_v_stop;
  79        u32     vbi_v_start_0;
  80        u32     vbi_v_stop_0;
  81        u32     vbi_v_start_1;
  82
  83        /* Techwell specific */
  84        u32     format;
  85};
  86
  87struct tw68_format {
  88        u32     fourcc;
  89        u32     depth;
  90        u32     twformat;
  91};
  92
  93/* ----------------------------------------------------------- */
  94/* card configuration                                     */
  95
  96#define TW68_BOARD_NOAUTO               UNSET
  97#define TW68_BOARD_UNKNOWN              0
  98#define TW68_BOARD_GENERIC_6802         1
  99
 100#define TW68_MAXBOARDS                  16
 101#define TW68_INPUT_MAX                  4
 102
 103/* ----------------------------------------------------------- */
 104/* device / file handle status                                 */
 105
 106#define BUFFER_TIMEOUT  msecs_to_jiffies(500)   /* 0.5 seconds */
 107
 108struct tw68_dev;        /* forward delclaration */
 109
 110/* buffer for one video/vbi/ts frame */
 111struct tw68_buf {
 112        struct vb2_v4l2_buffer vb;
 113        struct list_head list;
 114
 115        unsigned int   size;
 116        __le32         *cpu;
 117        __le32         *jmp;
 118        dma_addr_t     dma;
 119};
 120
 121struct tw68_fmt {
 122        char                    *name;
 123        u32                     fourcc; /* v4l2 format id */
 124        int                     depth;
 125        int                     flags;
 126        u32                     twformat;
 127};
 128
 129/* global device status */
 130struct tw68_dev {
 131        struct mutex            lock;
 132        spinlock_t              slock;
 133        u16                     instance;
 134        struct v4l2_device      v4l2_dev;
 135
 136        /* various device info */
 137        enum tw68_decoder_type  vdecoder;
 138        struct video_device     vdev;
 139        struct v4l2_ctrl_handler hdl;
 140
 141        /* pci i/o */
 142        char                    *name;
 143        struct pci_dev          *pci;
 144        unsigned char           pci_rev, pci_lat;
 145        u32                     __iomem *lmmio;
 146        u8                      __iomem *bmmio;
 147        u32                     pci_irqmask;
 148        /* The irq mask to be used will depend upon the chip type */
 149        u32                     board_virqmask;
 150
 151        /* video capture */
 152        const struct tw68_format *fmt;
 153        unsigned                width, height;
 154        unsigned                seqnr;
 155        unsigned                field;
 156        struct vb2_queue        vidq;
 157        struct list_head        active;
 158
 159        /* various v4l controls */
 160        const struct tw68_tvnorm *tvnorm;       /* video */
 161
 162        int                     input;
 163};
 164
 165/* ----------------------------------------------------------- */
 166
 167#define tw_readl(reg)           readl(dev->lmmio + ((reg) >> 2))
 168#define tw_readb(reg)           readb(dev->bmmio + (reg))
 169#define tw_writel(reg, value)   writel((value), dev->lmmio + ((reg) >> 2))
 170#define tw_writeb(reg, value)   writeb((value), dev->bmmio + (reg))
 171
 172#define tw_andorl(reg, mask, value) \
 173                writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
 174                ((value) & (mask)), dev->lmmio+((reg)>>2))
 175#define tw_andorb(reg, mask, value) \
 176                writeb((readb(dev->bmmio + (reg)) & ~(mask)) |\
 177                ((value) & (mask)), dev->bmmio+(reg))
 178#define tw_setl(reg, bit)       tw_andorl((reg), (bit), (bit))
 179#define tw_setb(reg, bit)       tw_andorb((reg), (bit), (bit))
 180#define tw_clearl(reg, bit)     \
 181                writel((readl(dev->lmmio + ((reg) >> 2)) & ~(bit)), \
 182                dev->lmmio + ((reg) >> 2))
 183#define tw_clearb(reg, bit)     \
 184                writeb((readb(dev->bmmio+(reg)) & ~(bit)), \
 185                dev->bmmio + (reg))
 186
 187#define tw_wait(us) { udelay(us); }
 188
 189/* ----------------------------------------------------------- */
 190/* tw68-video.c                                                */
 191
 192void tw68_set_tvnorm_hw(struct tw68_dev *dev);
 193
 194int tw68_video_init1(struct tw68_dev *dev);
 195int tw68_video_init2(struct tw68_dev *dev, int video_nr);
 196void tw68_irq_video_done(struct tw68_dev *dev, unsigned long status);
 197int tw68_video_start_dma(struct tw68_dev *dev, struct tw68_buf *buf);
 198
 199/* ----------------------------------------------------------- */
 200/* tw68-risc.c                                                 */
 201
 202int tw68_risc_buffer(struct pci_dev *pci, struct tw68_buf *buf,
 203        struct scatterlist *sglist, unsigned int top_offset,
 204        unsigned int bottom_offset, unsigned int bpl,
 205        unsigned int padding, unsigned int lines);
 206