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8#ifndef ALLEGRO_MAIL_H
9#define ALLEGRO_MAIL_H
10
11#include <linux/kernel.h>
12
13enum mcu_msg_type {
14 MCU_MSG_TYPE_INIT = 0x0000,
15 MCU_MSG_TYPE_CREATE_CHANNEL = 0x0005,
16 MCU_MSG_TYPE_DESTROY_CHANNEL = 0x0006,
17 MCU_MSG_TYPE_ENCODE_FRAME = 0x0007,
18 MCU_MSG_TYPE_PUT_STREAM_BUFFER = 0x0012,
19 MCU_MSG_TYPE_PUSH_BUFFER_INTERMEDIATE = 0x000e,
20 MCU_MSG_TYPE_PUSH_BUFFER_REFERENCE = 0x000f,
21};
22
23enum mcu_msg_version {
24 MCU_MSG_VERSION_2018_2,
25 MCU_MSG_VERSION_2019_2,
26};
27
28const char *msg_type_name(enum mcu_msg_type type);
29
30struct mcu_msg_header {
31 enum mcu_msg_type type;
32 enum mcu_msg_version version;
33};
34
35struct mcu_msg_init_request {
36 struct mcu_msg_header header;
37 u32 reserved0;
38 u32 suballoc_dma;
39 u32 suballoc_size;
40 s32 l2_cache[3];
41};
42
43struct mcu_msg_init_response {
44 struct mcu_msg_header header;
45 u32 reserved0;
46};
47
48struct create_channel_param {
49 enum mcu_msg_version version;
50 u32 layer_id;
51 u16 width;
52 u16 height;
53 u32 videomode;
54 u32 format;
55 u32 colorspace;
56 u32 src_mode;
57 u32 src_bit_depth;
58 u8 profile;
59 u16 constraint_set_flags;
60 u32 codec;
61 u16 level;
62 u16 tier;
63 u32 log2_max_poc;
64 u32 log2_max_frame_num;
65 u32 temporal_mvp_enable;
66 u32 enable_reordering;
67 u32 dbf_ovr_en;
68 u32 override_lf;
69 u32 num_ref_idx_l0;
70 u32 num_ref_idx_l1;
71 u32 custom_lda;
72 u32 rdo_cost_mode;
73 u32 lf;
74 u32 lf_x_tile;
75 u32 lf_x_slice;
76 s8 beta_offset;
77 s8 tc_offset;
78 u16 reserved10;
79 u32 unknown11;
80 u32 unknown12;
81 u16 num_slices;
82 u16 prefetch_auto;
83 u32 prefetch_mem_offset;
84 u32 prefetch_mem_size;
85 u16 clip_hrz_range;
86 u16 clip_vrt_range;
87 u16 me_range[4];
88 u8 max_cu_size;
89 u8 min_cu_size;
90 u8 max_tu_size;
91 u8 min_tu_size;
92 u8 max_transfo_depth_inter;
93 u8 max_transfo_depth_intra;
94 u16 reserved20;
95 u32 entropy_mode;
96 u32 wp_mode;
97
98
99 u32 rate_control_mode;
100 u32 initial_rem_delay;
101 u32 cpb_size;
102 u16 framerate;
103 u16 clk_ratio;
104 u32 target_bitrate;
105 u32 max_bitrate;
106 u16 initial_qp;
107 u16 min_qp;
108 u16 max_qp;
109 s16 ip_delta;
110 s16 pb_delta;
111 u16 golden_ref;
112 u16 golden_delta;
113 u16 golden_ref_frequency;
114 u32 rate_control_option;
115 u32 num_pixel;
116 u16 max_psnr;
117 u16 max_pixel_value;
118 u32 maxpicturesize[3];
119
120
121 u32 gop_ctrl_mode;
122 u32 freq_idr;
123 u32 freq_lt;
124 u32 gdr_mode;
125 u16 gop_length;
126 u8 num_b;
127 u8 freq_golden_ref;
128 u32 enable_lt;
129 u32 tmpdqp;
130
131 u32 subframe_latency;
132 u32 lda_control_mode;
133 u32 unknown41;
134
135 u32 lda_factors[6];
136
137 u32 max_num_merge_cand;
138};
139
140struct mcu_msg_create_channel {
141 struct mcu_msg_header header;
142 u32 user_id;
143 u32 *blob;
144 size_t blob_size;
145 u32 blob_mcu_addr;
146 u32 ep1_addr;
147};
148
149struct mcu_msg_create_channel_response {
150 struct mcu_msg_header header;
151 u32 channel_id;
152 u32 user_id;
153 u32 options;
154 u32 num_core;
155 u32 num_ref_idx_l0;
156 u32 num_ref_idx_l1;
157 u32 int_buffers_count;
158 u32 int_buffers_size;
159 u32 rec_buffers_count;
160 u32 rec_buffers_size;
161 u32 reserved;
162 u32 error_code;
163};
164
165struct mcu_msg_destroy_channel {
166 struct mcu_msg_header header;
167 u32 channel_id;
168};
169
170struct mcu_msg_destroy_channel_response {
171 struct mcu_msg_header header;
172 u32 channel_id;
173};
174
175struct mcu_msg_push_buffers_internal_buffer {
176 u32 dma_addr;
177 u32 mcu_addr;
178 u32 size;
179};
180
181struct mcu_msg_push_buffers_internal {
182 struct mcu_msg_header header;
183 u32 channel_id;
184 size_t num_buffers;
185 struct mcu_msg_push_buffers_internal_buffer buffer[];
186};
187
188struct mcu_msg_put_stream_buffer {
189 struct mcu_msg_header header;
190 u32 channel_id;
191 u32 dma_addr;
192 u32 mcu_addr;
193 u32 size;
194 u32 offset;
195 u64 dst_handle;
196};
197
198struct mcu_msg_encode_frame {
199 struct mcu_msg_header header;
200 u32 channel_id;
201 u32 reserved;
202
203 u32 encoding_options;
204#define AL_OPT_USE_QP_TABLE BIT(0)
205#define AL_OPT_FORCE_LOAD BIT(1)
206#define AL_OPT_USE_L2 BIT(2)
207#define AL_OPT_DISABLE_INTRA BIT(3)
208#define AL_OPT_DEPENDENT_SLICES BIT(4)
209
210 s16 pps_qp;
211 u16 padding;
212 u64 user_param;
213 u64 src_handle;
214
215 u32 request_options;
216#define AL_OPT_SCENE_CHANGE BIT(0)
217#define AL_OPT_RESTART_GOP BIT(1)
218#define AL_OPT_USE_LONG_TERM BIT(2)
219#define AL_OPT_UPDATE_PARAMS BIT(3)
220
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224
225 u32 src_y;
226 u32 src_uv;
227 u32 is_10_bit;
228 u32 stride;
229 u32 format;
230 u32 ep2;
231 u64 ep2_v;
232};
233
234struct mcu_msg_encode_frame_response {
235 struct mcu_msg_header header;
236 u32 channel_id;
237 u64 dst_handle;
238 u64 user_param;
239 u64 src_handle;
240 u16 skip;
241 u16 is_ref;
242 u32 initial_removal_delay;
243 u32 dpb_output_delay;
244 u32 size;
245 u32 frame_tag_size;
246 s32 stuffing;
247 s32 filler;
248 u16 num_column;
249 u16 num_row;
250 u16 qp;
251 u8 num_ref_idx_l0;
252 u8 num_ref_idx_l1;
253 u32 partition_table_offset;
254 s32 partition_table_size;
255 u32 sum_complex;
256 s32 tile_width[4];
257 s32 tile_height[22];
258 u32 error_code;
259
260 u32 slice_type;
261#define AL_ENC_SLICE_TYPE_B 0
262#define AL_ENC_SLICE_TYPE_P 1
263#define AL_ENC_SLICE_TYPE_I 2
264
265 u32 pic_struct;
266 u8 is_idr;
267 u8 is_first_slice;
268 u8 is_last_slice;
269 u8 reserved;
270 u16 pps_qp;
271 u16 reserved1;
272 u32 reserved2;
273 u32 reserved3;
274 u32 reserved4;
275 u32 reserved5;
276 u32 reserved6;
277};
278
279union mcu_msg_response {
280 struct mcu_msg_header header;
281 struct mcu_msg_init_response init;
282 struct mcu_msg_create_channel_response create_channel;
283 struct mcu_msg_destroy_channel_response destroy_channel;
284 struct mcu_msg_encode_frame_response encode_frame;
285};
286
287ssize_t allegro_encode_config_blob(u32 *dst, struct create_channel_param *param);
288ssize_t allegro_decode_config_blob(struct create_channel_param *param,
289 struct mcu_msg_create_channel_response *msg,
290 u32 *src);
291
292int allegro_decode_mail(void *msg, u32 *src);
293ssize_t allegro_encode_mail(u32 *dst, void *msg);
294
295#endif
296
