LXR linux/drivers/media/platform/omap3isp/ispcsi2.h

   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/*
   3 * ispcsi2.h
   4 *
   5 * TI OMAP3 ISP - CSI2 module
   6 *
   7 * Copyright (C) 2010 Nokia Corporation
   8 * Copyright (C) 2009 Texas Instruments, Inc.
   9 *
  10 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  11 *           Sakari Ailus <sakari.ailus@iki.fi>
  12 */
  13
  14#ifndef OMAP3_ISP_CSI2_H
  15#define OMAP3_ISP_CSI2_H
  16
  17#include <linux/types.h>
  18#include <linux/videodev2.h>
  19
  20struct isp_csiphy;
  21
  22/* This is not an exhaustive list */
  23enum isp_csi2_pix_formats {
  24        CSI2_PIX_FMT_OTHERS = 0,
  25        CSI2_PIX_FMT_YUV422_8BIT = 0x1e,
  26        CSI2_PIX_FMT_YUV422_8BIT_VP = 0x9e,
  27        CSI2_PIX_FMT_RAW10_EXP16 = 0xab,
  28        CSI2_PIX_FMT_RAW10_EXP16_VP = 0x12f,
  29        CSI2_PIX_FMT_RAW8 = 0x2a,
  30        CSI2_PIX_FMT_RAW8_DPCM10_EXP16 = 0x2aa,
  31        CSI2_PIX_FMT_RAW8_DPCM10_VP = 0x32a,
  32        CSI2_PIX_FMT_RAW8_VP = 0x12a,
  33        CSI2_USERDEF_8BIT_DATA1_DPCM10_VP = 0x340,
  34        CSI2_USERDEF_8BIT_DATA1_DPCM10 = 0x2c0,
  35        CSI2_USERDEF_8BIT_DATA1 = 0x40,
  36};
  37
  38enum isp_csi2_irqevents {
  39        OCP_ERR_IRQ = 0x4000,
  40        SHORT_PACKET_IRQ = 0x2000,
  41        ECC_CORRECTION_IRQ = 0x1000,
  42        ECC_NO_CORRECTION_IRQ = 0x800,
  43        COMPLEXIO2_ERR_IRQ = 0x400,
  44        COMPLEXIO1_ERR_IRQ = 0x200,
  45        FIFO_OVF_IRQ = 0x100,
  46        CONTEXT7 = 0x80,
  47        CONTEXT6 = 0x40,
  48        CONTEXT5 = 0x20,
  49        CONTEXT4 = 0x10,
  50        CONTEXT3 = 0x8,
  51        CONTEXT2 = 0x4,
  52        CONTEXT1 = 0x2,
  53        CONTEXT0 = 0x1,
  54};
  55
  56enum isp_csi2_ctx_irqevents {
  57        CTX_ECC_CORRECTION = 0x100,
  58        CTX_LINE_NUMBER = 0x80,
  59        CTX_FRAME_NUMBER = 0x40,
  60        CTX_CS = 0x20,
  61        CTX_LE = 0x8,
  62        CTX_LS = 0x4,
  63        CTX_FE = 0x2,
  64        CTX_FS = 0x1,
  65};
  66
  67enum isp_csi2_frame_mode {
  68        ISP_CSI2_FRAME_IMMEDIATE,
  69        ISP_CSI2_FRAME_AFTERFEC,
  70};
  71
  72#define ISP_CSI2_MAX_CTX_NUM    7
  73
  74struct isp_csi2_ctx_cfg {
  75        u8 ctxnum;              /* context number 0 - 7 */
  76        u8 dpcm_decompress;
  77
  78        /* Fields in CSI2_CTx_CTRL2 - locked by CSI2_CTx_CTRL1.CTX_EN */
  79        u8 virtual_id;
  80        u16 format_id;          /* as in CSI2_CTx_CTRL2[9:0] */
  81        u8 dpcm_predictor;      /* 1: simple, 0: advanced */
  82
  83        /* Fields in CSI2_CTx_CTRL1/3 - Shadowed */
  84        u16 alpha;
  85        u16 data_offset;
  86        u32 ping_addr;
  87        u32 pong_addr;
  88        u8 eof_enabled;
  89        u8 eol_enabled;
  90        u8 checksum_enabled;
  91        u8 enabled;
  92};
  93
  94struct isp_csi2_timing_cfg {
  95        u8 ionum;                       /* IO1 or IO2 as in CSI2_TIMING */
  96        unsigned force_rx_mode:1;
  97        unsigned stop_state_16x:1;
  98        unsigned stop_state_4x:1;
  99        u16 stop_state_counter;
 100};
 101
 102struct isp_csi2_ctrl_cfg {
 103        bool vp_clk_enable;
 104        bool vp_only_enable;
 105        u8 vp_out_ctrl;
 106        enum isp_csi2_frame_mode frame_mode;
 107        bool ecc_enable;
 108        bool if_enable;
 109};
 110
 111#define CSI2_PAD_SINK           0
 112#define CSI2_PAD_SOURCE         1
 113#define CSI2_PADS_NUM           2
 114
 115#define CSI2_OUTPUT_CCDC        (1 << 0)
 116#define CSI2_OUTPUT_MEMORY      (1 << 1)
 117
 118struct isp_csi2_device {
 119        struct v4l2_subdev subdev;
 120        struct media_pad pads[CSI2_PADS_NUM];
 121        struct v4l2_mbus_framefmt formats[CSI2_PADS_NUM];
 122
 123        struct isp_video video_out;
 124        struct isp_device *isp;
 125
 126        u8 available;           /* Is the IP present on the silicon? */
 127
 128        /* mem resources - enums as defined in enum isp_mem_resources */
 129        u8 regs1;
 130        u8 regs2;
 131
 132        u32 output; /* output to CCDC, memory or both? */
 133        bool dpcm_decompress;
 134        unsigned int frame_skip;
 135
 136        struct isp_csiphy *phy;
 137        struct isp_csi2_ctx_cfg contexts[ISP_CSI2_MAX_CTX_NUM + 1];
 138        struct isp_csi2_timing_cfg timing[2];
 139        struct isp_csi2_ctrl_cfg ctrl;
 140        enum isp_pipeline_stream_state state;
 141        wait_queue_head_t wait;
 142        atomic_t stopping;
 143};
 144
 145void omap3isp_csi2_isr(struct isp_csi2_device *csi2);
 146int omap3isp_csi2_reset(struct isp_csi2_device *csi2);
 147int omap3isp_csi2_init(struct isp_device *isp);
 148void omap3isp_csi2_cleanup(struct isp_device *isp);
 149void omap3isp_csi2_unregister_entities(struct isp_csi2_device *csi2);
 150int omap3isp_csi2_register_entities(struct isp_csi2_device *csi2,
 151                                    struct v4l2_device *vdev);
 152#endif  /* OMAP3_ISP_CSI2_H */
 153