LXR linux/drivers/media/platform/qcom/camss/camss.h

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 * camss.h
   4 *
   5 * Qualcomm MSM Camera Subsystem - Core
   6 *
   7 * Copyright (c) 2015, The Linux Foundation. All rights reserved.
   8 * Copyright (C) 2015-2018 Linaro Ltd.
   9 */
  10#ifndef QC_MSM_CAMSS_H
  11#define QC_MSM_CAMSS_H
  12
  13#include <linux/device.h>
  14#include <linux/types.h>
  15#include <media/v4l2-async.h>
  16#include <media/v4l2-device.h>
  17#include <media/v4l2-subdev.h>
  18#include <media/media-device.h>
  19#include <media/media-entity.h>
  20
  21#include "camss-csid.h"
  22#include "camss-csiphy.h"
  23#include "camss-ispif.h"
  24#include "camss-vfe.h"
  25
  26#define to_camss(ptr_module)    \
  27        container_of(ptr_module, struct camss, ptr_module)
  28
  29#define to_device(ptr_module)   \
  30        (to_camss(ptr_module)->dev)
  31
  32#define module_pointer(ptr_module, index)       \
  33        ((const struct ptr_module##_device (*)[]) &(ptr_module[-(index)]))
  34
  35#define to_camss_index(ptr_module, index)       \
  36        container_of(module_pointer(ptr_module, index), \
  37                     struct camss, ptr_module)
  38
  39#define to_device_index(ptr_module, index)      \
  40        (to_camss_index(ptr_module, index)->dev)
  41
  42#define CAMSS_RES_MAX 17
  43
  44struct resources {
  45        char *regulator[CAMSS_RES_MAX];
  46        char *clock[CAMSS_RES_MAX];
  47        u32 clock_rate[CAMSS_RES_MAX][CAMSS_RES_MAX];
  48        char *reg[CAMSS_RES_MAX];
  49        char *interrupt[CAMSS_RES_MAX];
  50};
  51
  52struct resources_ispif {
  53        char *clock[CAMSS_RES_MAX];
  54        char *clock_for_reset[CAMSS_RES_MAX];
  55        char *reg[CAMSS_RES_MAX];
  56        char *interrupt;
  57};
  58
  59enum pm_domain {
  60        PM_DOMAIN_VFE0 = 0,
  61        PM_DOMAIN_VFE1 = 1,
  62        PM_DOMAIN_GEN1_COUNT = 2,       /* CAMSS series of ISPs */
  63        PM_DOMAIN_VFELITE = 2,          /* VFELITE / TOP GDSC */
  64        PM_DOMAIN_GEN2_COUNT = 3,       /* Titan series of ISPs */
  65};
  66
  67enum camss_version {
  68        CAMSS_8x16,
  69        CAMSS_8x96,
  70        CAMSS_660,
  71        CAMSS_845,
  72};
  73
  74struct camss {
  75        enum camss_version version;
  76        struct v4l2_device v4l2_dev;
  77        struct v4l2_async_notifier notifier;
  78        struct media_device media_dev;
  79        struct device *dev;
  80        int csiphy_num;
  81        struct csiphy_device *csiphy;
  82        int csid_num;
  83        struct csid_device *csid;
  84        struct ispif_device *ispif;
  85        int vfe_num;
  86        struct vfe_device *vfe;
  87        atomic_t ref_count;
  88        struct device *genpd[PM_DOMAIN_GEN2_COUNT];
  89        struct device_link *genpd_link[PM_DOMAIN_GEN2_COUNT];
  90};
  91
  92struct camss_camera_interface {
  93        u8 csiphy_id;
  94        struct csiphy_csi2_cfg csi2;
  95};
  96
  97struct camss_async_subdev {
  98        struct v4l2_async_subdev asd; /* must be first */
  99        struct camss_camera_interface interface;
 100};
 101
 102struct camss_clock {
 103        struct clk *clk;
 104        const char *name;
 105        u32 *freq;
 106        u32 nfreqs;
 107};
 108
 109void camss_add_clock_margin(u64 *rate);
 110int camss_enable_clocks(int nclocks, struct camss_clock *clock,
 111                        struct device *dev);
 112void camss_disable_clocks(int nclocks, struct camss_clock *clock);
 113struct media_entity *camss_find_sensor(struct media_entity *entity);
 114s64 camss_get_link_freq(struct media_entity *entity, unsigned int bpp,
 115                        unsigned int lanes);
 116int camss_get_pixel_clock(struct media_entity *entity, u64 *pixel_clock);
 117int camss_pm_domain_on(struct camss *camss, int id);
 118void camss_pm_domain_off(struct camss *camss, int id);
 119void camss_delete(struct camss *camss);
 120
 121#endif /* QC_MSM_CAMSS_H */
 122