1
2
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4
5
6#ifndef BCM_VK_H
7#define BCM_VK_H
8
9#include <linux/atomic.h>
10#include <linux/firmware.h>
11#include <linux/irq.h>
12#include <linux/kref.h>
13#include <linux/miscdevice.h>
14#include <linux/mutex.h>
15#include <linux/pci.h>
16#include <linux/poll.h>
17#include <linux/sched/signal.h>
18#include <linux/tty.h>
19#include <linux/uaccess.h>
20#include <uapi/linux/misc/bcm_vk.h>
21
22#include "bcm_vk_msg.h"
23
24#define DRV_MODULE_NAME "bcm-vk"
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43#define BAR_CODEPUSH_SBL 0x400
44
45#define CODEPUSH_BOOT1_ENTRY 0x00400000
46#define CODEPUSH_MASK 0xfffff000
47#define CODEPUSH_BOOTSTART BIT(0)
48
49
50#define BAR_BOOT_STATUS 0x404
51
52#define SRAM_OPEN BIT(16)
53#define DDR_OPEN BIT(17)
54
55
56#define FW_LOADER_ACK_SEND_MORE_DATA BIT(18)
57#define FW_LOADER_ACK_IN_PROGRESS BIT(19)
58#define FW_LOADER_ACK_RCVD_ALL_DATA BIT(20)
59
60
61#define BOOT_STDALONE_RUNNING BIT(21)
62
63
64#define BOOT_STATE_MASK (0xffffffff & \
65 ~(FW_LOADER_ACK_SEND_MORE_DATA | \
66 FW_LOADER_ACK_IN_PROGRESS | \
67 BOOT_STDALONE_RUNNING))
68
69#define BOOT_ERR_SHIFT 4
70#define BOOT_ERR_MASK (0xf << BOOT_ERR_SHIFT)
71#define BOOT_PROG_MASK 0xf
72
73#define BROM_STATUS_NOT_RUN 0x2
74#define BROM_NOT_RUN (SRAM_OPEN | BROM_STATUS_NOT_RUN)
75#define BROM_STATUS_COMPLETE 0x6
76#define BROM_RUNNING (SRAM_OPEN | BROM_STATUS_COMPLETE)
77#define BOOT1_STATUS_COMPLETE 0x6
78#define BOOT1_RUNNING (DDR_OPEN | BOOT1_STATUS_COMPLETE)
79#define BOOT2_STATUS_COMPLETE 0x6
80#define BOOT2_RUNNING (FW_LOADER_ACK_RCVD_ALL_DATA | \
81 BOOT2_STATUS_COMPLETE)
82
83
84#define BAR_CODEPUSH_SBI 0x408
85
86#define CODEPUSH_BOOT2_ENTRY 0x60000000
87
88#define BAR_CARD_STATUS 0x410
89
90#define CARD_STATUS_TTYVK0_READY BIT(0)
91#define CARD_STATUS_TTYVK1_READY BIT(1)
92
93#define BAR_BOOT1_STDALONE_PROGRESS 0x420
94#define BOOT1_STDALONE_SUCCESS (BIT(13) | BIT(14))
95#define BOOT1_STDALONE_PROGRESS_MASK BOOT1_STDALONE_SUCCESS
96
97#define BAR_METADATA_VERSION 0x440
98#define BAR_OS_UPTIME 0x444
99#define BAR_CHIP_ID 0x448
100#define MAJOR_SOC_REV(_chip_id) (((_chip_id) >> 20) & 0xf)
101
102#define BAR_CARD_TEMPERATURE 0x45c
103
104#define BCM_VK_TEMP_FIELD_MASK 0xff
105#define BCM_VK_CPU_TEMP_SHIFT 0
106#define BCM_VK_DDR0_TEMP_SHIFT 8
107#define BCM_VK_DDR1_TEMP_SHIFT 16
108
109#define BAR_CARD_VOLTAGE 0x460
110
111#define BCM_VK_VOLT_RAIL_MASK 0xffff
112#define BCM_VK_3P3_VOLT_REG_SHIFT 16
113
114#define BAR_CARD_ERR_LOG 0x464
115
116#define ERR_LOG_UECC BIT(0)
117#define ERR_LOG_SSIM_BUSY BIT(1)
118#define ERR_LOG_AFBC_BUSY BIT(2)
119#define ERR_LOG_HIGH_TEMP_ERR BIT(3)
120#define ERR_LOG_WDOG_TIMEOUT BIT(4)
121#define ERR_LOG_SYS_FAULT BIT(5)
122#define ERR_LOG_RAMDUMP BIT(6)
123#define ERR_LOG_COP_WDOG_TIMEOUT BIT(7)
124
125#define ERR_LOG_MEM_ALLOC_FAIL BIT(8)
126#define ERR_LOG_LOW_TEMP_WARN BIT(9)
127#define ERR_LOG_ECC BIT(10)
128#define ERR_LOG_IPC_DWN BIT(11)
129
130
131#define ERR_LOG_HOST_INTF_V_FAIL BIT(13)
132#define ERR_LOG_HOST_HB_FAIL BIT(14)
133#define ERR_LOG_HOST_PCIE_DWN BIT(15)
134
135#define BAR_CARD_ERR_MEM 0x468
136
137#define BCM_VK_MEM_ERR_FIELD_MASK 0xff
138#define BCM_VK_ECC_MEM_ERR_SHIFT 0
139#define BCM_VK_UECC_MEM_ERR_SHIFT 8
140
141#define BCM_VK_ECC_THRESHOLD 10
142#define BCM_VK_UECC_THRESHOLD 1
143
144#define BAR_CARD_PWR_AND_THRE 0x46c
145
146#define BCM_VK_PWR_AND_THRE_FIELD_MASK 0xff
147#define BCM_VK_LOW_TEMP_THRE_SHIFT 0
148#define BCM_VK_HIGH_TEMP_THRE_SHIFT 8
149#define BCM_VK_PWR_STATE_SHIFT 16
150
151#define BAR_CARD_STATIC_INFO 0x470
152
153#define BAR_INTF_VER 0x47c
154#define BAR_INTF_VER_MAJOR_SHIFT 16
155#define BAR_INTF_VER_MASK 0xffff
156
157
158
159
160#define SEMANTIC_MAJOR 1
161#define SEMANTIC_MINOR 0
162
163
164
165
166
167#define VK_BAR0_REGSEG_DB_BASE 0x484
168#define VK_BAR0_REGSEG_DB_REG_GAP 8
169
170
171
172
173
174#define VK_BAR0_RESET_DB_NUM 3
175#define VK_BAR0_RESET_DB_SOFT 0xffffffff
176#define VK_BAR0_RESET_DB_HARD 0xfffffffd
177#define VK_BAR0_RESET_RAMPDUMP 0xa0000000
178
179#define VK_BAR0_Q_DB_BASE(q_num) (VK_BAR0_REGSEG_DB_BASE + \
180 ((q_num) * VK_BAR0_REGSEG_DB_REG_GAP))
181#define VK_BAR0_RESET_DB_BASE (VK_BAR0_REGSEG_DB_BASE + \
182 (VK_BAR0_RESET_DB_NUM * VK_BAR0_REGSEG_DB_REG_GAP))
183
184#define BAR_BOOTSRC_SELECT 0xc78
185
186#define BOOTSRC_SOFT_ENABLE BIT(14)
187
188
189#define BAR_FIRMWARE_TAG_SIZE 50
190#define FIRMWARE_STATUS_PRE_INIT_DONE 0x1f
191
192
193#define VK_MSG_ID_BITMAP_SIZE 4096
194#define VK_MSG_ID_BITMAP_MASK (VK_MSG_ID_BITMAP_SIZE - 1)
195#define VK_MSG_ID_OVERFLOW 0xffff
196
197
198
199
200
201
202
203
204#define VK_BAR1_MSGQ_DEF_RDY 0x60c0
205
206#define VK_BAR1_MSGQ_RDY_MARKER 0xbeefcafe
207
208#define VK_BAR1_DIAG_RDY_MARKER 0xdeadcafe
209
210#define VK_BAR1_MSGQ_NR 0x60c4
211
212#define VK_BAR1_MSGQ_CTRL_OFF 0x60c8
213
214
215#define VK_BAR1_UCODE_VER_TAG 0x6170
216#define VK_BAR1_BOOT1_VER_TAG 0x61b0
217#define VK_BAR1_VER_TAG_SIZE 64
218
219
220#define VK_BAR1_DMA_BUF_OFF_HI 0x61e0
221#define VK_BAR1_DMA_BUF_OFF_LO (VK_BAR1_DMA_BUF_OFF_HI + 4)
222#define VK_BAR1_DMA_BUF_SZ (VK_BAR1_DMA_BUF_OFF_HI + 8)
223
224
225#define VK_BAR1_SCRATCH_OFF_HI 0x61f0
226#define VK_BAR1_SCRATCH_OFF_LO (VK_BAR1_SCRATCH_OFF_HI + 4)
227#define VK_BAR1_SCRATCH_SZ_ADDR (VK_BAR1_SCRATCH_OFF_HI + 8)
228#define VK_BAR1_SCRATCH_DEF_NR_PAGES 32
229
230
231#define VK_BAR1_DAUTH_BASE_ADDR 0x6200
232#define VK_BAR1_DAUTH_STORE_SIZE 0x48
233#define VK_BAR1_DAUTH_VALID_SIZE 0x8
234#define VK_BAR1_DAUTH_MAX 4
235#define VK_BAR1_DAUTH_STORE_ADDR(x) \
236 (VK_BAR1_DAUTH_BASE_ADDR + \
237 (x) * (VK_BAR1_DAUTH_STORE_SIZE + VK_BAR1_DAUTH_VALID_SIZE))
238#define VK_BAR1_DAUTH_VALID_ADDR(x) \
239 (VK_BAR1_DAUTH_STORE_ADDR(x) + VK_BAR1_DAUTH_STORE_SIZE)
240
241
242#define VK_BAR1_SOTP_REVID_BASE_ADDR 0x6340
243#define VK_BAR1_SOTP_REVID_SIZE 0x10
244#define VK_BAR1_SOTP_REVID_MAX 2
245#define VK_BAR1_SOTP_REVID_ADDR(x) \
246 (VK_BAR1_SOTP_REVID_BASE_ADDR + (x) * VK_BAR1_SOTP_REVID_SIZE)
247
248
249#define MAX_BAR 3
250
251
252#define BCM_VK_DEF_IB_SGL_BLK_LEN 16
253#define BCM_VK_IB_SGL_BLK_MAX 24
254
255enum pci_barno {
256 BAR_0 = 0,
257 BAR_1,
258 BAR_2
259};
260
261#ifdef CONFIG_BCM_VK_TTY
262#define BCM_VK_NUM_TTY 2
263#else
264#define BCM_VK_NUM_TTY 0
265#endif
266
267struct bcm_vk_tty {
268 struct tty_port port;
269 u32 to_offset;
270 u32 to_size;
271 u32 wr;
272 u32 from_offset;
273 u32 from_size;
274 u32 rd;
275 pid_t pid;
276 bool irq_enabled;
277 bool is_opened;
278};
279
280
281#define MAX_OPP 3
282#define MAX_CARD_INFO_TAG_SIZE 64
283
284struct bcm_vk_card_info {
285 u32 version;
286 char os_tag[MAX_CARD_INFO_TAG_SIZE];
287 char cmpt_tag[MAX_CARD_INFO_TAG_SIZE];
288 u32 cpu_freq_mhz;
289 u32 cpu_scale[MAX_OPP];
290 u32 ddr_freq_mhz;
291 u32 ddr_size_MB;
292 u32 video_core_freq_mhz;
293};
294
295
296struct bcm_vk_dauth_key {
297 char store[VK_BAR1_DAUTH_STORE_SIZE];
298 char valid[VK_BAR1_DAUTH_VALID_SIZE];
299};
300
301struct bcm_vk_dauth_info {
302 struct bcm_vk_dauth_key keys[VK_BAR1_DAUTH_MAX];
303};
304
305
306
307
308
309struct bcm_vk_peer_log {
310 u32 rd_idx;
311 u32 wr_idx;
312 u32 buf_size;
313 u32 mask;
314 char data[0];
315};
316
317
318#define BCM_VK_PEER_LOG_BUF_MAX SZ_16K
319
320#define BCM_VK_PEER_LOG_LINE_MAX 256
321
322
323
324
325#define BCM_VK_PROC_TYPE_TAG_LEN 8
326struct bcm_vk_proc_mon_entry_t {
327 char tag[BCM_VK_PROC_TYPE_TAG_LEN];
328 u32 used;
329 u32 max;
330};
331
332
333
334
335#define BCM_VK_PROC_MON_MAX 8
336struct bcm_vk_proc_mon_info {
337 u32 num;
338 u32 entry_size;
339 struct bcm_vk_proc_mon_entry_t entries[BCM_VK_PROC_MON_MAX];
340};
341
342struct bcm_vk_hb_ctrl {
343 struct timer_list timer;
344 u32 last_uptime;
345 u32 lost_cnt;
346};
347
348struct bcm_vk_alert {
349 u16 flags;
350 u16 notfs;
351};
352
353
354struct bcm_vk_alert_cnts {
355 u16 ecc;
356 u16 uecc;
357};
358
359struct bcm_vk {
360 struct pci_dev *pdev;
361 void __iomem *bar[MAX_BAR];
362 int num_irqs;
363
364 struct bcm_vk_card_info card_info;
365 struct bcm_vk_proc_mon_info proc_mon_info;
366 struct bcm_vk_dauth_info dauth_info;
367
368
369 struct mutex mutex;
370 struct miscdevice miscdev;
371 int devid;
372
373#ifdef CONFIG_BCM_VK_TTY
374 struct tty_driver *tty_drv;
375 struct timer_list serial_timer;
376 struct bcm_vk_tty tty[BCM_VK_NUM_TTY];
377 struct workqueue_struct *tty_wq_thread;
378 struct work_struct tty_wq_work;
379#endif
380
381
382 struct kref kref;
383
384 spinlock_t msg_id_lock;
385 u16 msg_id;
386 DECLARE_BITMAP(bmap, VK_MSG_ID_BITMAP_SIZE);
387 spinlock_t ctx_lock;
388 struct bcm_vk_ctx ctx[VK_CMPT_CTX_MAX];
389 struct bcm_vk_ht_entry pid_ht[VK_PID_HT_SZ];
390 pid_t reset_pid;
391
392 atomic_t msgq_inited;
393 struct bcm_vk_msg_chan to_v_msg_chan;
394 struct bcm_vk_msg_chan to_h_msg_chan;
395
396 struct workqueue_struct *wq_thread;
397 struct work_struct wq_work;
398 unsigned long wq_offload[1];
399 void *tdma_vaddr;
400 dma_addr_t tdma_addr;
401
402 struct notifier_block panic_nb;
403 u32 ib_sgl_size;
404
405
406 struct bcm_vk_hb_ctrl hb_ctrl;
407
408 spinlock_t host_alert_lock;
409 struct bcm_vk_alert host_alert;
410 struct bcm_vk_alert peer_alert;
411 struct bcm_vk_alert_cnts alert_cnts;
412
413
414 u32 peerlog_off;
415 struct bcm_vk_peer_log peerlog_info;
416
417 u32 proc_mon_off;
418};
419
420
421enum bcm_vk_wq_offload_flags {
422 BCM_VK_WQ_DWNLD_PEND = 0,
423 BCM_VK_WQ_DWNLD_AUTO = 1,
424 BCM_VK_WQ_NOTF_PEND = 2,
425};
426
427
428#define BCM_VK_EXTRACT_FIELD(_field, _reg, _mask, _shift) \
429 (_field = (((_reg) >> (_shift)) & (_mask)))
430
431struct bcm_vk_entry {
432 const u32 mask;
433 const u32 exp_val;
434 const char *str;
435};
436
437
438#define BCM_VK_PEER_ERR_NUM 12
439extern struct bcm_vk_entry const bcm_vk_peer_err[BCM_VK_PEER_ERR_NUM];
440
441#define BCM_VK_HOST_ERR_NUM 3
442extern struct bcm_vk_entry const bcm_vk_host_err[BCM_VK_HOST_ERR_NUM];
443
444
445
446
447
448#define BCM_VK_INTF_IS_DOWN(val) ((val) == 0xffffffff)
449
450static inline u32 vkread32(struct bcm_vk *vk, enum pci_barno bar, u64 offset)
451{
452 return readl(vk->bar[bar] + offset);
453}
454
455static inline void vkwrite32(struct bcm_vk *vk,
456 u32 value,
457 enum pci_barno bar,
458 u64 offset)
459{
460 writel(value, vk->bar[bar] + offset);
461}
462
463static inline u8 vkread8(struct bcm_vk *vk, enum pci_barno bar, u64 offset)
464{
465 return readb(vk->bar[bar] + offset);
466}
467
468static inline void vkwrite8(struct bcm_vk *vk,
469 u8 value,
470 enum pci_barno bar,
471 u64 offset)
472{
473 writeb(value, vk->bar[bar] + offset);
474}
475
476static inline bool bcm_vk_msgq_marker_valid(struct bcm_vk *vk)
477{
478 u32 rdy_marker = 0;
479 u32 fw_status;
480
481 fw_status = vkread32(vk, BAR_0, VK_BAR_FWSTS);
482
483 if ((fw_status & VK_FWSTS_READY) == VK_FWSTS_READY)
484 rdy_marker = vkread32(vk, BAR_1, VK_BAR1_MSGQ_DEF_RDY);
485
486 return (rdy_marker == VK_BAR1_MSGQ_RDY_MARKER);
487}
488
489int bcm_vk_open(struct inode *inode, struct file *p_file);
490ssize_t bcm_vk_read(struct file *p_file, char __user *buf, size_t count,
491 loff_t *f_pos);
492ssize_t bcm_vk_write(struct file *p_file, const char __user *buf,
493 size_t count, loff_t *f_pos);
494__poll_t bcm_vk_poll(struct file *p_file, struct poll_table_struct *wait);
495int bcm_vk_release(struct inode *inode, struct file *p_file);
496void bcm_vk_release_data(struct kref *kref);
497irqreturn_t bcm_vk_msgq_irqhandler(int irq, void *dev_id);
498irqreturn_t bcm_vk_notf_irqhandler(int irq, void *dev_id);
499irqreturn_t bcm_vk_tty_irqhandler(int irq, void *dev_id);
500int bcm_vk_msg_init(struct bcm_vk *vk);
501void bcm_vk_msg_remove(struct bcm_vk *vk);
502void bcm_vk_drain_msg_on_reset(struct bcm_vk *vk);
503int bcm_vk_sync_msgq(struct bcm_vk *vk, bool force_sync);
504void bcm_vk_blk_drv_access(struct bcm_vk *vk);
505s32 bcm_to_h_msg_dequeue(struct bcm_vk *vk);
506int bcm_vk_send_shutdown_msg(struct bcm_vk *vk, u32 shut_type,
507 const pid_t pid, const u32 q_num);
508void bcm_to_v_q_doorbell(struct bcm_vk *vk, u32 q_num, u32 db_val);
509int bcm_vk_auto_load_all_images(struct bcm_vk *vk);
510void bcm_vk_hb_init(struct bcm_vk *vk);
511void bcm_vk_hb_deinit(struct bcm_vk *vk);
512void bcm_vk_handle_notf(struct bcm_vk *vk);
513bool bcm_vk_drv_access_ok(struct bcm_vk *vk);
514void bcm_vk_set_host_alert(struct bcm_vk *vk, u32 bit_mask);
515
516#ifdef CONFIG_BCM_VK_TTY
517int bcm_vk_tty_init(struct bcm_vk *vk, char *name);
518void bcm_vk_tty_exit(struct bcm_vk *vk);
519void bcm_vk_tty_terminate_tty_user(struct bcm_vk *vk);
520void bcm_vk_tty_wq_exit(struct bcm_vk *vk);
521
522static inline void bcm_vk_tty_set_irq_enabled(struct bcm_vk *vk, int index)
523{
524 vk->tty[index].irq_enabled = true;
525}
526#else
527static inline int bcm_vk_tty_init(struct bcm_vk *vk, char *name)
528{
529 return 0;
530}
531
532static inline void bcm_vk_tty_exit(struct bcm_vk *vk)
533{
534}
535
536static inline void bcm_vk_tty_terminate_tty_user(struct bcm_vk *vk)
537{
538}
539
540static inline void bcm_vk_tty_wq_exit(struct bcm_vk *vk)
541{
542}
543
544static inline void bcm_vk_tty_set_irq_enabled(struct bcm_vk *vk, int index)
545{
546}
547#endif
548
549#endif
550