1
2
3
4
5
6
7
8
9
10
11
12
13#include <linux/sched.h>
14#include <linux/delay.h>
15#include <linux/slab.h>
16#include <linux/module.h>
17#include <linux/bio.h>
18#include <linux/dma-mapping.h>
19#include <linux/crc7.h>
20#include <linux/crc-itu-t.h>
21#include <linux/scatterlist.h>
22
23#include <linux/mmc/host.h>
24#include <linux/mmc/mmc.h>
25#include <linux/mmc/slot-gpio.h>
26
27#include <linux/spi/spi.h>
28#include <linux/spi/mmc_spi.h>
29
30#include <asm/unaligned.h>
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66#define SPI_MMC_RESPONSE_CODE(x) ((x) & 0x1f)
67#define SPI_RESPONSE_ACCEPTED ((2 << 1)|1)
68#define SPI_RESPONSE_CRC_ERR ((5 << 1)|1)
69#define SPI_RESPONSE_WRITE_ERR ((6 << 1)|1)
70
71
72
73
74#define SPI_TOKEN_SINGLE 0xfe
75#define SPI_TOKEN_MULTI_WRITE 0xfc
76#define SPI_TOKEN_STOP_TRAN 0xfd
77
78#define MMC_SPI_BLOCKSIZE 512
79
80#define MMC_SPI_R1B_TIMEOUT_MS 3000
81#define MMC_SPI_INIT_TIMEOUT_MS 3000
82
83
84
85
86
87
88
89
90#define MMC_SPI_BLOCKSATONCE 128
91
92
93
94
95
96
97
98
99struct scratch {
100 u8 status[29];
101 u8 data_token;
102 __be16 crc_val;
103};
104
105struct mmc_spi_host {
106 struct mmc_host *mmc;
107 struct spi_device *spi;
108
109 unsigned char power_mode;
110 u16 powerup_msecs;
111
112 struct mmc_spi_platform_data *pdata;
113
114
115 struct spi_transfer token, t, crc, early_status;
116 struct spi_message m;
117
118
119 struct spi_transfer status;
120 struct spi_message readback;
121
122
123 struct device *dma_dev;
124
125
126 struct scratch *data;
127 dma_addr_t data_dma;
128
129
130
131
132
133 void *ones;
134 dma_addr_t ones_dma;
135};
136
137
138
139
140
141
142
143
144static inline int mmc_cs_off(struct mmc_spi_host *host)
145{
146
147 return spi_setup(host->spi);
148}
149
150static int
151mmc_spi_readbytes(struct mmc_spi_host *host, unsigned len)
152{
153 int status;
154
155 if (len > sizeof(*host->data)) {
156 WARN_ON(1);
157 return -EIO;
158 }
159
160 host->status.len = len;
161
162 if (host->dma_dev)
163 dma_sync_single_for_device(host->dma_dev,
164 host->data_dma, sizeof(*host->data),
165 DMA_FROM_DEVICE);
166
167 status = spi_sync_locked(host->spi, &host->readback);
168
169 if (host->dma_dev)
170 dma_sync_single_for_cpu(host->dma_dev,
171 host->data_dma, sizeof(*host->data),
172 DMA_FROM_DEVICE);
173
174 return status;
175}
176
177static int mmc_spi_skip(struct mmc_spi_host *host, unsigned long timeout,
178 unsigned n, u8 byte)
179{
180 u8 *cp = host->data->status;
181 unsigned long start = jiffies;
182
183 do {
184 int status;
185 unsigned i;
186
187 status = mmc_spi_readbytes(host, n);
188 if (status < 0)
189 return status;
190
191 for (i = 0; i < n; i++) {
192 if (cp[i] != byte)
193 return cp[i];
194 }
195
196
197 cond_resched();
198 } while (time_is_after_jiffies(start + timeout));
199 return -ETIMEDOUT;
200}
201
202static inline int
203mmc_spi_wait_unbusy(struct mmc_spi_host *host, unsigned long timeout)
204{
205 return mmc_spi_skip(host, timeout, sizeof(host->data->status), 0);
206}
207
208static int mmc_spi_readtoken(struct mmc_spi_host *host, unsigned long timeout)
209{
210 return mmc_spi_skip(host, timeout, 1, 0xff);
211}
212
213
214
215
216
217
218
219
220
221
222
223static char *maptype(struct mmc_command *cmd)
224{
225 switch (mmc_spi_resp_type(cmd)) {
226 case MMC_RSP_SPI_R1: return "R1";
227 case MMC_RSP_SPI_R1B: return "R1B";
228 case MMC_RSP_SPI_R2: return "R2/R5";
229 case MMC_RSP_SPI_R3: return "R3/R4/R7";
230 default: return "?";
231 }
232}
233
234
235static int mmc_spi_response_get(struct mmc_spi_host *host,
236 struct mmc_command *cmd, int cs_on)
237{
238 unsigned long timeout_ms;
239 u8 *cp = host->data->status;
240 u8 *end = cp + host->t.len;
241 int value = 0;
242 int bitshift;
243 u8 leftover = 0;
244 unsigned short rotator;
245 int i;
246 char tag[32];
247
248 snprintf(tag, sizeof(tag), " ... CMD%d response SPI_%s",
249 cmd->opcode, maptype(cmd));
250
251
252
253
254
255
256
257 cp += 8;
258 while (cp < end && *cp == 0xff)
259 cp++;
260
261
262 if (cp == end) {
263 cp = host->data->status;
264 end = cp+1;
265
266
267
268
269
270
271
272
273
274
275
276
277 for (i = 2; i < 16; i++) {
278 value = mmc_spi_readbytes(host, 1);
279 if (value < 0)
280 goto done;
281 if (*cp != 0xff)
282 goto checkstatus;
283 }
284 value = -ETIMEDOUT;
285 goto done;
286 }
287
288checkstatus:
289 bitshift = 0;
290 if (*cp & 0x80) {
291
292 rotator = *cp++ << 8;
293
294 if (cp == end) {
295 value = mmc_spi_readbytes(host, 1);
296 if (value < 0)
297 goto done;
298 cp = host->data->status;
299 end = cp+1;
300 }
301 rotator |= *cp++;
302 while (rotator & 0x8000) {
303 bitshift++;
304 rotator <<= 1;
305 }
306 cmd->resp[0] = rotator >> 8;
307 leftover = rotator;
308 } else {
309 cmd->resp[0] = *cp++;
310 }
311 cmd->error = 0;
312
313
314 if (cmd->resp[0] != 0) {
315 if ((R1_SPI_PARAMETER | R1_SPI_ADDRESS)
316 & cmd->resp[0])
317 value = -EFAULT;
318 else if (R1_SPI_ILLEGAL_COMMAND & cmd->resp[0])
319 value = -ENOSYS;
320 else if (R1_SPI_COM_CRC & cmd->resp[0])
321 value = -EILSEQ;
322 else if ((R1_SPI_ERASE_SEQ | R1_SPI_ERASE_RESET)
323 & cmd->resp[0])
324 value = -EIO;
325
326 }
327
328 switch (mmc_spi_resp_type(cmd)) {
329
330
331
332
333 case MMC_RSP_SPI_R1B:
334
335 while (cp < end && *cp == 0)
336 cp++;
337 if (cp == end) {
338 timeout_ms = cmd->busy_timeout ? cmd->busy_timeout :
339 MMC_SPI_R1B_TIMEOUT_MS;
340 mmc_spi_wait_unbusy(host, msecs_to_jiffies(timeout_ms));
341 }
342 break;
343
344
345
346
347 case MMC_RSP_SPI_R2:
348
349 if (cp == end) {
350 value = mmc_spi_readbytes(host, 1);
351 if (value < 0)
352 goto done;
353 cp = host->data->status;
354 end = cp+1;
355 }
356 if (bitshift) {
357 rotator = leftover << 8;
358 rotator |= *cp << bitshift;
359 cmd->resp[0] |= (rotator & 0xFF00);
360 } else {
361 cmd->resp[0] |= *cp << 8;
362 }
363 break;
364
365
366 case MMC_RSP_SPI_R3:
367 rotator = leftover << 8;
368 cmd->resp[1] = 0;
369 for (i = 0; i < 4; i++) {
370 cmd->resp[1] <<= 8;
371
372 if (cp == end) {
373 value = mmc_spi_readbytes(host, 1);
374 if (value < 0)
375 goto done;
376 cp = host->data->status;
377 end = cp+1;
378 }
379 if (bitshift) {
380 rotator |= *cp++ << bitshift;
381 cmd->resp[1] |= (rotator >> 8);
382 rotator <<= 8;
383 } else {
384 cmd->resp[1] |= *cp++;
385 }
386 }
387 break;
388
389
390 case MMC_RSP_SPI_R1:
391 break;
392
393 default:
394 dev_dbg(&host->spi->dev, "bad response type %04x\n",
395 mmc_spi_resp_type(cmd));
396 if (value >= 0)
397 value = -EINVAL;
398 goto done;
399 }
400
401 if (value < 0)
402 dev_dbg(&host->spi->dev, "%s: resp %04x %08x\n",
403 tag, cmd->resp[0], cmd->resp[1]);
404
405
406 if (value >= 0 && cs_on)
407 return value;
408done:
409 if (value < 0)
410 cmd->error = value;
411 mmc_cs_off(host);
412 return value;
413}
414
415
416
417
418
419
420
421static int
422mmc_spi_command_send(struct mmc_spi_host *host,
423 struct mmc_request *mrq,
424 struct mmc_command *cmd, int cs_on)
425{
426 struct scratch *data = host->data;
427 u8 *cp = data->status;
428 int status;
429 struct spi_transfer *t;
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444 memset(cp, 0xff, sizeof(data->status));
445
446 cp[1] = 0x40 | cmd->opcode;
447 put_unaligned_be32(cmd->arg, cp + 2);
448 cp[6] = crc7_be(0, cp + 1, 5) | 0x01;
449 cp += 7;
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486 if (cs_on && (mrq->data->flags & MMC_DATA_READ)) {
487 cp += 2;
488
489 } else {
490 cp += 10;
491 if (cmd->flags & MMC_RSP_SPI_S2)
492 cp++;
493 else if (cmd->flags & MMC_RSP_SPI_B4)
494 cp += 4;
495 else if (cmd->flags & MMC_RSP_BUSY)
496 cp = data->status + sizeof(data->status);
497
498 }
499
500 dev_dbg(&host->spi->dev, " CMD%d, resp %s\n",
501 cmd->opcode, maptype(cmd));
502
503
504 spi_message_init(&host->m);
505
506 t = &host->t;
507 memset(t, 0, sizeof(*t));
508 t->tx_buf = t->rx_buf = data->status;
509 t->tx_dma = t->rx_dma = host->data_dma;
510 t->len = cp - data->status;
511 t->cs_change = 1;
512 spi_message_add_tail(t, &host->m);
513
514 if (host->dma_dev) {
515 host->m.is_dma_mapped = 1;
516 dma_sync_single_for_device(host->dma_dev,
517 host->data_dma, sizeof(*host->data),
518 DMA_BIDIRECTIONAL);
519 }
520 status = spi_sync_locked(host->spi, &host->m);
521
522 if (host->dma_dev)
523 dma_sync_single_for_cpu(host->dma_dev,
524 host->data_dma, sizeof(*host->data),
525 DMA_BIDIRECTIONAL);
526 if (status < 0) {
527 dev_dbg(&host->spi->dev, " ... write returned %d\n", status);
528 cmd->error = status;
529 return status;
530 }
531
532
533 return mmc_spi_response_get(host, cmd, cs_on);
534}
535
536
537
538
539
540
541
542
543
544
545
546
547static void
548mmc_spi_setup_data_message(
549 struct mmc_spi_host *host,
550 int multiple,
551 enum dma_data_direction direction)
552{
553 struct spi_transfer *t;
554 struct scratch *scratch = host->data;
555 dma_addr_t dma = host->data_dma;
556
557 spi_message_init(&host->m);
558 if (dma)
559 host->m.is_dma_mapped = 1;
560
561
562
563
564 if (direction == DMA_TO_DEVICE) {
565 t = &host->token;
566 memset(t, 0, sizeof(*t));
567 t->len = 1;
568 if (multiple)
569 scratch->data_token = SPI_TOKEN_MULTI_WRITE;
570 else
571 scratch->data_token = SPI_TOKEN_SINGLE;
572 t->tx_buf = &scratch->data_token;
573 if (dma)
574 t->tx_dma = dma + offsetof(struct scratch, data_token);
575 spi_message_add_tail(t, &host->m);
576 }
577
578
579
580
581 t = &host->t;
582 memset(t, 0, sizeof(*t));
583 t->tx_buf = host->ones;
584 t->tx_dma = host->ones_dma;
585
586 spi_message_add_tail(t, &host->m);
587
588 t = &host->crc;
589 memset(t, 0, sizeof(*t));
590 t->len = 2;
591 if (direction == DMA_TO_DEVICE) {
592
593 t->tx_buf = &scratch->crc_val;
594 if (dma)
595 t->tx_dma = dma + offsetof(struct scratch, crc_val);
596 } else {
597 t->tx_buf = host->ones;
598 t->tx_dma = host->ones_dma;
599 t->rx_buf = &scratch->crc_val;
600 if (dma)
601 t->rx_dma = dma + offsetof(struct scratch, crc_val);
602 }
603 spi_message_add_tail(t, &host->m);
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619 if (multiple || direction == DMA_TO_DEVICE) {
620 t = &host->early_status;
621 memset(t, 0, sizeof(*t));
622 t->len = (direction == DMA_TO_DEVICE) ? sizeof(scratch->status) : 1;
623 t->tx_buf = host->ones;
624 t->tx_dma = host->ones_dma;
625 t->rx_buf = scratch->status;
626 if (dma)
627 t->rx_dma = dma + offsetof(struct scratch, status);
628 t->cs_change = 1;
629 spi_message_add_tail(t, &host->m);
630 }
631}
632
633
634
635
636
637
638
639
640
641
642
643
644
645static int
646mmc_spi_writeblock(struct mmc_spi_host *host, struct spi_transfer *t,
647 unsigned long timeout)
648{
649 struct spi_device *spi = host->spi;
650 int status, i;
651 struct scratch *scratch = host->data;
652 u32 pattern;
653
654 if (host->mmc->use_spi_crc)
655 scratch->crc_val = cpu_to_be16(crc_itu_t(0, t->tx_buf, t->len));
656 if (host->dma_dev)
657 dma_sync_single_for_device(host->dma_dev,
658 host->data_dma, sizeof(*scratch),
659 DMA_BIDIRECTIONAL);
660
661 status = spi_sync_locked(spi, &host->m);
662
663 if (status != 0) {
664 dev_dbg(&spi->dev, "write error (%d)\n", status);
665 return status;
666 }
667
668 if (host->dma_dev)
669 dma_sync_single_for_cpu(host->dma_dev,
670 host->data_dma, sizeof(*scratch),
671 DMA_BIDIRECTIONAL);
672
673
674
675
676
677
678
679
680
681
682
683
684
685 pattern = get_unaligned_be32(scratch->status);
686
687
688 pattern |= 0xE0000000;
689
690
691 while (pattern & 0x80000000)
692 pattern <<= 1;
693
694 pattern >>= 27;
695
696 switch (pattern) {
697 case SPI_RESPONSE_ACCEPTED:
698 status = 0;
699 break;
700 case SPI_RESPONSE_CRC_ERR:
701
702 status = -EILSEQ;
703 break;
704 case SPI_RESPONSE_WRITE_ERR:
705
706
707
708 status = -EIO;
709 break;
710 default:
711 status = -EPROTO;
712 break;
713 }
714 if (status != 0) {
715 dev_dbg(&spi->dev, "write error %02x (%d)\n",
716 scratch->status[0], status);
717 return status;
718 }
719
720 t->tx_buf += t->len;
721 if (host->dma_dev)
722 t->tx_dma += t->len;
723
724
725
726
727 for (i = 4; i < sizeof(scratch->status); i++) {
728
729 if (scratch->status[i] & 0x01)
730 return 0;
731 }
732 return mmc_spi_wait_unbusy(host, timeout);
733}
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751static int
752mmc_spi_readblock(struct mmc_spi_host *host, struct spi_transfer *t,
753 unsigned long timeout)
754{
755 struct spi_device *spi = host->spi;
756 int status;
757 struct scratch *scratch = host->data;
758 unsigned int bitshift;
759 u8 leftover;
760
761
762
763
764 status = mmc_spi_readbytes(host, 1);
765 if (status < 0)
766 return status;
767 status = scratch->status[0];
768 if (status == 0xff || status == 0)
769 status = mmc_spi_readtoken(host, timeout);
770
771 if (status < 0) {
772 dev_dbg(&spi->dev, "read error %02x (%d)\n", status, status);
773 return status;
774 }
775
776
777
778
779 bitshift = 7;
780 while (status & 0x80) {
781 status <<= 1;
782 bitshift--;
783 }
784 leftover = status << 1;
785
786 if (host->dma_dev) {
787 dma_sync_single_for_device(host->dma_dev,
788 host->data_dma, sizeof(*scratch),
789 DMA_BIDIRECTIONAL);
790 dma_sync_single_for_device(host->dma_dev,
791 t->rx_dma, t->len,
792 DMA_FROM_DEVICE);
793 }
794
795 status = spi_sync_locked(spi, &host->m);
796 if (status < 0) {
797 dev_dbg(&spi->dev, "read error %d\n", status);
798 return status;
799 }
800
801 if (host->dma_dev) {
802 dma_sync_single_for_cpu(host->dma_dev,
803 host->data_dma, sizeof(*scratch),
804 DMA_BIDIRECTIONAL);
805 dma_sync_single_for_cpu(host->dma_dev,
806 t->rx_dma, t->len,
807 DMA_FROM_DEVICE);
808 }
809
810 if (bitshift) {
811
812
813
814 u8 *cp = t->rx_buf;
815 unsigned int len;
816 unsigned int bitright = 8 - bitshift;
817 u8 temp;
818 for (len = t->len; len; len--) {
819 temp = *cp;
820 *cp++ = leftover | (temp >> bitshift);
821 leftover = temp << bitright;
822 }
823 cp = (u8 *) &scratch->crc_val;
824 temp = *cp;
825 *cp++ = leftover | (temp >> bitshift);
826 leftover = temp << bitright;
827 temp = *cp;
828 *cp = leftover | (temp >> bitshift);
829 }
830
831 if (host->mmc->use_spi_crc) {
832 u16 crc = crc_itu_t(0, t->rx_buf, t->len);
833
834 be16_to_cpus(&scratch->crc_val);
835 if (scratch->crc_val != crc) {
836 dev_dbg(&spi->dev,
837 "read - crc error: crc_val=0x%04x, computed=0x%04x len=%d\n",
838 scratch->crc_val, crc, t->len);
839 return -EILSEQ;
840 }
841 }
842
843 t->rx_buf += t->len;
844 if (host->dma_dev)
845 t->rx_dma += t->len;
846
847 return 0;
848}
849
850
851
852
853
854
855static void
856mmc_spi_data_do(struct mmc_spi_host *host, struct mmc_command *cmd,
857 struct mmc_data *data, u32 blk_size)
858{
859 struct spi_device *spi = host->spi;
860 struct device *dma_dev = host->dma_dev;
861 struct spi_transfer *t;
862 enum dma_data_direction direction;
863 struct scatterlist *sg;
864 unsigned n_sg;
865 int multiple = (data->blocks > 1);
866 u32 clock_rate;
867 unsigned long timeout;
868
869 direction = mmc_get_dma_dir(data);
870 mmc_spi_setup_data_message(host, multiple, direction);
871 t = &host->t;
872
873 if (t->speed_hz)
874 clock_rate = t->speed_hz;
875 else
876 clock_rate = spi->max_speed_hz;
877
878 timeout = data->timeout_ns / 1000 +
879 data->timeout_clks * 1000000 / clock_rate;
880 timeout = usecs_to_jiffies((unsigned int)timeout) + 1;
881
882
883
884
885 for_each_sg(data->sg, sg, data->sg_len, n_sg) {
886 int status = 0;
887 dma_addr_t dma_addr = 0;
888 void *kmap_addr;
889 unsigned length = sg->length;
890 enum dma_data_direction dir = direction;
891
892
893
894
895 if (dma_dev) {
896
897 if ((sg->offset != 0 || length != PAGE_SIZE)
898 && dir == DMA_FROM_DEVICE)
899 dir = DMA_BIDIRECTIONAL;
900
901 dma_addr = dma_map_page(dma_dev, sg_page(sg), 0,
902 PAGE_SIZE, dir);
903 if (dma_mapping_error(dma_dev, dma_addr)) {
904 data->error = -EFAULT;
905 break;
906 }
907 if (direction == DMA_TO_DEVICE)
908 t->tx_dma = dma_addr + sg->offset;
909 else
910 t->rx_dma = dma_addr + sg->offset;
911 }
912
913
914 kmap_addr = kmap(sg_page(sg));
915 if (direction == DMA_TO_DEVICE)
916 t->tx_buf = kmap_addr + sg->offset;
917 else
918 t->rx_buf = kmap_addr + sg->offset;
919
920
921 while (length) {
922 t->len = min(length, blk_size);
923
924 dev_dbg(&host->spi->dev, " %s block, %d bytes\n",
925 (direction == DMA_TO_DEVICE) ? "write" : "read",
926 t->len);
927
928 if (direction == DMA_TO_DEVICE)
929 status = mmc_spi_writeblock(host, t, timeout);
930 else
931 status = mmc_spi_readblock(host, t, timeout);
932 if (status < 0)
933 break;
934
935 data->bytes_xfered += t->len;
936 length -= t->len;
937
938 if (!multiple)
939 break;
940 }
941
942
943 if (direction == DMA_FROM_DEVICE)
944 flush_dcache_page(sg_page(sg));
945 kunmap(sg_page(sg));
946 if (dma_dev)
947 dma_unmap_page(dma_dev, dma_addr, PAGE_SIZE, dir);
948
949 if (status < 0) {
950 data->error = status;
951 dev_dbg(&spi->dev, "%s status %d\n",
952 (direction == DMA_TO_DEVICE) ? "write" : "read",
953 status);
954 break;
955 }
956 }
957
958
959
960
961
962
963
964 if (direction == DMA_TO_DEVICE && multiple) {
965 struct scratch *scratch = host->data;
966 int tmp;
967 const unsigned statlen = sizeof(scratch->status);
968
969 dev_dbg(&spi->dev, " STOP_TRAN\n");
970
971
972
973
974
975
976 INIT_LIST_HEAD(&host->m.transfers);
977 list_add(&host->early_status.transfer_list,
978 &host->m.transfers);
979
980 memset(scratch->status, 0xff, statlen);
981 scratch->status[0] = SPI_TOKEN_STOP_TRAN;
982
983 host->early_status.tx_buf = host->early_status.rx_buf;
984 host->early_status.tx_dma = host->early_status.rx_dma;
985 host->early_status.len = statlen;
986
987 if (host->dma_dev)
988 dma_sync_single_for_device(host->dma_dev,
989 host->data_dma, sizeof(*scratch),
990 DMA_BIDIRECTIONAL);
991
992 tmp = spi_sync_locked(spi, &host->m);
993
994 if (host->dma_dev)
995 dma_sync_single_for_cpu(host->dma_dev,
996 host->data_dma, sizeof(*scratch),
997 DMA_BIDIRECTIONAL);
998
999 if (tmp < 0) {
1000 if (!data->error)
1001 data->error = tmp;
1002 return;
1003 }
1004
1005
1006
1007
1008
1009 for (tmp = 2; tmp < statlen; tmp++) {
1010 if (scratch->status[tmp] != 0)
1011 return;
1012 }
1013 tmp = mmc_spi_wait_unbusy(host, timeout);
1014 if (tmp < 0 && !data->error)
1015 data->error = tmp;
1016 }
1017}
1018
1019
1020
1021
1022
1023
1024
1025static void mmc_spi_request(struct mmc_host *mmc, struct mmc_request *mrq)
1026{
1027 struct mmc_spi_host *host = mmc_priv(mmc);
1028 int status = -EINVAL;
1029 int crc_retry = 5;
1030 struct mmc_command stop;
1031
1032#ifdef DEBUG
1033
1034 {
1035 struct mmc_command *cmd;
1036 int invalid = 0;
1037
1038 cmd = mrq->cmd;
1039 if (!mmc_spi_resp_type(cmd)) {
1040 dev_dbg(&host->spi->dev, "bogus command\n");
1041 cmd->error = -EINVAL;
1042 invalid = 1;
1043 }
1044
1045 cmd = mrq->stop;
1046 if (cmd && !mmc_spi_resp_type(cmd)) {
1047 dev_dbg(&host->spi->dev, "bogus STOP command\n");
1048 cmd->error = -EINVAL;
1049 invalid = 1;
1050 }
1051
1052 if (invalid) {
1053 dump_stack();
1054 mmc_request_done(host->mmc, mrq);
1055 return;
1056 }
1057 }
1058#endif
1059
1060
1061 spi_bus_lock(host->spi->master);
1062
1063crc_recover:
1064
1065 status = mmc_spi_command_send(host, mrq, mrq->cmd, mrq->data != NULL);
1066 if (status == 0 && mrq->data) {
1067 mmc_spi_data_do(host, mrq->cmd, mrq->data, mrq->data->blksz);
1068
1069
1070
1071
1072
1073
1074
1075
1076 if (mrq->data->error == -EILSEQ && crc_retry) {
1077 stop.opcode = MMC_STOP_TRANSMISSION;
1078 stop.arg = 0;
1079 stop.flags = MMC_RSP_SPI_R1B | MMC_RSP_R1B | MMC_CMD_AC;
1080 status = mmc_spi_command_send(host, mrq, &stop, 0);
1081 crc_retry--;
1082 mrq->data->error = 0;
1083 goto crc_recover;
1084 }
1085
1086 if (mrq->stop)
1087 status = mmc_spi_command_send(host, mrq, mrq->stop, 0);
1088 else
1089 mmc_cs_off(host);
1090 }
1091
1092
1093 spi_bus_unlock(host->spi->master);
1094
1095 mmc_request_done(host->mmc, mrq);
1096}
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106static void mmc_spi_initsequence(struct mmc_spi_host *host)
1107{
1108
1109
1110
1111 mmc_spi_wait_unbusy(host, msecs_to_jiffies(MMC_SPI_INIT_TIMEOUT_MS));
1112 mmc_spi_readbytes(host, 10);
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133 host->spi->mode ^= SPI_CS_HIGH;
1134 if (spi_setup(host->spi) != 0) {
1135
1136 dev_warn(&host->spi->dev,
1137 "can't change chip-select polarity\n");
1138 host->spi->mode ^= SPI_CS_HIGH;
1139 } else {
1140 mmc_spi_readbytes(host, 18);
1141
1142 host->spi->mode ^= SPI_CS_HIGH;
1143 if (spi_setup(host->spi) != 0) {
1144
1145 dev_err(&host->spi->dev,
1146 "can't restore chip-select polarity\n");
1147 }
1148 }
1149}
1150
1151static char *mmc_powerstring(u8 power_mode)
1152{
1153 switch (power_mode) {
1154 case MMC_POWER_OFF: return "off";
1155 case MMC_POWER_UP: return "up";
1156 case MMC_POWER_ON: return "on";
1157 }
1158 return "?";
1159}
1160
1161static void mmc_spi_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1162{
1163 struct mmc_spi_host *host = mmc_priv(mmc);
1164
1165 if (host->power_mode != ios->power_mode) {
1166 int canpower;
1167
1168 canpower = host->pdata && host->pdata->setpower;
1169
1170 dev_dbg(&host->spi->dev, "power %s (%d)%s\n",
1171 mmc_powerstring(ios->power_mode),
1172 ios->vdd,
1173 canpower ? ", can switch" : "");
1174
1175
1176
1177
1178 if (canpower) {
1179 switch (ios->power_mode) {
1180 case MMC_POWER_OFF:
1181 case MMC_POWER_UP:
1182 host->pdata->setpower(&host->spi->dev,
1183 ios->vdd);
1184 if (ios->power_mode == MMC_POWER_UP)
1185 msleep(host->powerup_msecs);
1186 }
1187 }
1188
1189
1190 if (ios->power_mode == MMC_POWER_ON)
1191 mmc_spi_initsequence(host);
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202 if (canpower && ios->power_mode == MMC_POWER_OFF) {
1203 int mres;
1204 u8 nullbyte = 0;
1205
1206 host->spi->mode &= ~(SPI_CPOL|SPI_CPHA);
1207 mres = spi_setup(host->spi);
1208 if (mres < 0)
1209 dev_dbg(&host->spi->dev,
1210 "switch to SPI mode 0 failed\n");
1211
1212 if (spi_write(host->spi, &nullbyte, 1) < 0)
1213 dev_dbg(&host->spi->dev,
1214 "put spi signals to low failed\n");
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225 msleep(10);
1226 if (mres == 0) {
1227 host->spi->mode |= (SPI_CPOL|SPI_CPHA);
1228 mres = spi_setup(host->spi);
1229 if (mres < 0)
1230 dev_dbg(&host->spi->dev,
1231 "switch back to SPI mode 3 failed\n");
1232 }
1233 }
1234
1235 host->power_mode = ios->power_mode;
1236 }
1237
1238 if (host->spi->max_speed_hz != ios->clock && ios->clock != 0) {
1239 int status;
1240
1241 host->spi->max_speed_hz = ios->clock;
1242 status = spi_setup(host->spi);
1243 dev_dbg(&host->spi->dev, " clock to %d Hz, %d\n",
1244 host->spi->max_speed_hz, status);
1245 }
1246}
1247
1248static const struct mmc_host_ops mmc_spi_ops = {
1249 .request = mmc_spi_request,
1250 .set_ios = mmc_spi_set_ios,
1251 .get_ro = mmc_gpio_get_ro,
1252 .get_cd = mmc_gpio_get_cd,
1253};
1254
1255
1256
1257
1258
1259
1260
1261
1262static irqreturn_t
1263mmc_spi_detect_irq(int irq, void *mmc)
1264{
1265 struct mmc_spi_host *host = mmc_priv(mmc);
1266 u16 delay_msec = max(host->pdata->detect_delay, (u16)100);
1267
1268 mmc_detect_change(mmc, msecs_to_jiffies(delay_msec));
1269 return IRQ_HANDLED;
1270}
1271
1272#ifdef CONFIG_HAS_DMA
1273static int mmc_spi_dma_alloc(struct mmc_spi_host *host)
1274{
1275 struct spi_device *spi = host->spi;
1276 struct device *dev;
1277
1278 if (!spi->master->dev.parent->dma_mask)
1279 return 0;
1280
1281 dev = spi->master->dev.parent;
1282
1283 host->ones_dma = dma_map_single(dev, host->ones, MMC_SPI_BLOCKSIZE,
1284 DMA_TO_DEVICE);
1285 if (dma_mapping_error(dev, host->ones_dma))
1286 return -ENOMEM;
1287
1288 host->data_dma = dma_map_single(dev, host->data, sizeof(*host->data),
1289 DMA_BIDIRECTIONAL);
1290 if (dma_mapping_error(dev, host->data_dma)) {
1291 dma_unmap_single(dev, host->ones_dma, MMC_SPI_BLOCKSIZE,
1292 DMA_TO_DEVICE);
1293 return -ENOMEM;
1294 }
1295
1296 dma_sync_single_for_cpu(dev, host->data_dma, sizeof(*host->data),
1297 DMA_BIDIRECTIONAL);
1298
1299 host->dma_dev = dev;
1300 return 0;
1301}
1302
1303static void mmc_spi_dma_free(struct mmc_spi_host *host)
1304{
1305 if (!host->dma_dev)
1306 return;
1307
1308 dma_unmap_single(host->dma_dev, host->ones_dma, MMC_SPI_BLOCKSIZE,
1309 DMA_TO_DEVICE);
1310 dma_unmap_single(host->dma_dev, host->data_dma, sizeof(*host->data),
1311 DMA_BIDIRECTIONAL);
1312}
1313#else
1314static inline int mmc_spi_dma_alloc(struct mmc_spi_host *host) { return 0; }
1315static inline void mmc_spi_dma_free(struct mmc_spi_host *host) {}
1316#endif
1317
1318static int mmc_spi_probe(struct spi_device *spi)
1319{
1320 void *ones;
1321 struct mmc_host *mmc;
1322 struct mmc_spi_host *host;
1323 int status;
1324 bool has_ro = false;
1325
1326
1327
1328
1329 if (spi->master->flags & SPI_MASTER_HALF_DUPLEX)
1330 return -EINVAL;
1331
1332
1333
1334
1335
1336
1337
1338 if (spi->mode != SPI_MODE_3)
1339 spi->mode = SPI_MODE_0;
1340 spi->bits_per_word = 8;
1341
1342 status = spi_setup(spi);
1343 if (status < 0) {
1344 dev_dbg(&spi->dev, "needs SPI mode %02x, %d KHz; %d\n",
1345 spi->mode, spi->max_speed_hz / 1000,
1346 status);
1347 return status;
1348 }
1349
1350
1351
1352
1353
1354
1355
1356 status = -ENOMEM;
1357 ones = kmalloc(MMC_SPI_BLOCKSIZE, GFP_KERNEL);
1358 if (!ones)
1359 goto nomem;
1360 memset(ones, 0xff, MMC_SPI_BLOCKSIZE);
1361
1362 mmc = mmc_alloc_host(sizeof(*host), &spi->dev);
1363 if (!mmc)
1364 goto nomem;
1365
1366 mmc->ops = &mmc_spi_ops;
1367 mmc->max_blk_size = MMC_SPI_BLOCKSIZE;
1368 mmc->max_segs = MMC_SPI_BLOCKSATONCE;
1369 mmc->max_req_size = MMC_SPI_BLOCKSATONCE * MMC_SPI_BLOCKSIZE;
1370 mmc->max_blk_count = MMC_SPI_BLOCKSATONCE;
1371
1372 mmc->caps = MMC_CAP_SPI;
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382 mmc->f_min = 400000;
1383 mmc->f_max = spi->max_speed_hz;
1384
1385 host = mmc_priv(mmc);
1386 host->mmc = mmc;
1387 host->spi = spi;
1388
1389 host->ones = ones;
1390
1391 dev_set_drvdata(&spi->dev, mmc);
1392
1393
1394
1395
1396 host->pdata = mmc_spi_get_pdata(spi);
1397 if (host->pdata)
1398 mmc->ocr_avail = host->pdata->ocr_mask;
1399 if (!mmc->ocr_avail) {
1400 dev_warn(&spi->dev, "ASSUMING 3.2-3.4 V slot power\n");
1401 mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34;
1402 }
1403 if (host->pdata && host->pdata->setpower) {
1404 host->powerup_msecs = host->pdata->powerup_msecs;
1405 if (!host->powerup_msecs || host->powerup_msecs > 250)
1406 host->powerup_msecs = 250;
1407 }
1408
1409
1410 host->data = kmalloc(sizeof(*host->data), GFP_KERNEL);
1411 if (!host->data)
1412 goto fail_nobuf1;
1413
1414 status = mmc_spi_dma_alloc(host);
1415 if (status)
1416 goto fail_dma;
1417
1418
1419 spi_message_init(&host->readback);
1420 host->readback.is_dma_mapped = (host->dma_dev != NULL);
1421
1422 spi_message_add_tail(&host->status, &host->readback);
1423 host->status.tx_buf = host->ones;
1424 host->status.tx_dma = host->ones_dma;
1425 host->status.rx_buf = &host->data->status;
1426 host->status.rx_dma = host->data_dma + offsetof(struct scratch, status);
1427 host->status.cs_change = 1;
1428
1429
1430 if (host->pdata && host->pdata->init) {
1431 status = host->pdata->init(&spi->dev, mmc_spi_detect_irq, mmc);
1432 if (status != 0)
1433 goto fail_glue_init;
1434 }
1435
1436
1437 if (host->pdata) {
1438 mmc->caps |= host->pdata->caps;
1439 mmc->caps2 |= host->pdata->caps2;
1440 }
1441
1442 status = mmc_add_host(mmc);
1443 if (status != 0)
1444 goto fail_add_host;
1445
1446
1447
1448
1449
1450 status = mmc_gpiod_request_cd(mmc, NULL, 0, false, 1000);
1451 if (status == -EPROBE_DEFER)
1452 goto fail_add_host;
1453 if (!status) {
1454
1455
1456
1457
1458
1459 mmc->caps &= ~MMC_CAP_NEEDS_POLL;
1460 mmc_gpiod_request_cd_irq(mmc);
1461 }
1462 mmc_detect_change(mmc, 0);
1463
1464
1465 status = mmc_gpiod_request_ro(mmc, NULL, 1, 0);
1466 if (status == -EPROBE_DEFER)
1467 goto fail_add_host;
1468 if (!status)
1469 has_ro = true;
1470
1471 dev_info(&spi->dev, "SD/MMC host %s%s%s%s%s\n",
1472 dev_name(&mmc->class_dev),
1473 host->dma_dev ? "" : ", no DMA",
1474 has_ro ? "" : ", no WP",
1475 (host->pdata && host->pdata->setpower)
1476 ? "" : ", no poweroff",
1477 (mmc->caps & MMC_CAP_NEEDS_POLL)
1478 ? ", cd polling" : "");
1479 return 0;
1480
1481fail_add_host:
1482 mmc_remove_host(mmc);
1483fail_glue_init:
1484 mmc_spi_dma_free(host);
1485fail_dma:
1486 kfree(host->data);
1487fail_nobuf1:
1488 mmc_spi_put_pdata(spi);
1489 mmc_free_host(mmc);
1490nomem:
1491 kfree(ones);
1492 return status;
1493}
1494
1495
1496static int mmc_spi_remove(struct spi_device *spi)
1497{
1498 struct mmc_host *mmc = dev_get_drvdata(&spi->dev);
1499 struct mmc_spi_host *host = mmc_priv(mmc);
1500
1501
1502 if (host->pdata && host->pdata->exit)
1503 host->pdata->exit(&spi->dev, mmc);
1504
1505 mmc_remove_host(mmc);
1506
1507 mmc_spi_dma_free(host);
1508 kfree(host->data);
1509 kfree(host->ones);
1510
1511 spi->max_speed_hz = mmc->f_max;
1512 mmc_spi_put_pdata(spi);
1513 mmc_free_host(mmc);
1514 return 0;
1515}
1516
1517static const struct of_device_id mmc_spi_of_match_table[] = {
1518 { .compatible = "mmc-spi-slot", },
1519 {},
1520};
1521MODULE_DEVICE_TABLE(of, mmc_spi_of_match_table);
1522
1523static struct spi_driver mmc_spi_driver = {
1524 .driver = {
1525 .name = "mmc_spi",
1526 .of_match_table = mmc_spi_of_match_table,
1527 },
1528 .probe = mmc_spi_probe,
1529 .remove = mmc_spi_remove,
1530};
1531
1532module_spi_driver(mmc_spi_driver);
1533
1534MODULE_AUTHOR("Mike Lavender, David Brownell, Hans-Peter Nilsson, Jan Nikitenko");
1535MODULE_DESCRIPTION("SPI SD/MMC host driver");
1536MODULE_LICENSE("GPL");
1537MODULE_ALIAS("spi:mmc_spi");
1538