1
2
3
4
5
6
7
8
9
10
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/interrupt.h>
14#include <linux/platform_device.h>
15#include <linux/netdevice.h>
16#include <linux/can/dev.h>
17#include <linux/of_platform.h>
18#include <sysdev/fsl_soc.h>
19#include <linux/clk.h>
20#include <linux/io.h>
21#include <asm/mpc52xx.h>
22
23#include "mscan.h"
24
25#define DRV_NAME "mpc5xxx_can"
26
27struct mpc5xxx_can_data {
28 unsigned int type;
29 u32 (*get_clock)(struct platform_device *ofdev, const char *clock_name,
30 int *mscan_clksrc);
31 void (*put_clock)(struct platform_device *ofdev);
32};
33
34#ifdef CONFIG_PPC_MPC52xx
35static const struct of_device_id mpc52xx_cdm_ids[] = {
36 { .compatible = "fsl,mpc5200-cdm", },
37 {}
38};
39
40static u32 mpc52xx_can_get_clock(struct platform_device *ofdev,
41 const char *clock_name, int *mscan_clksrc)
42{
43 unsigned int pvr;
44 struct mpc52xx_cdm __iomem *cdm;
45 struct device_node *np_cdm;
46 unsigned int freq;
47 u32 val;
48
49 pvr = mfspr(SPRN_PVR);
50
51
52
53
54
55
56
57
58
59 if (clock_name && strcmp(clock_name, "ip") == 0)
60 *mscan_clksrc = MSCAN_CLKSRC_BUS;
61 else
62 *mscan_clksrc = MSCAN_CLKSRC_XTAL;
63
64 freq = mpc5xxx_get_bus_frequency(ofdev->dev.of_node);
65 if (!freq)
66 return 0;
67
68 if (*mscan_clksrc == MSCAN_CLKSRC_BUS || pvr == 0x80822011)
69 return freq;
70
71
72 np_cdm = of_find_matching_node(NULL, mpc52xx_cdm_ids);
73 if (!np_cdm) {
74 dev_err(&ofdev->dev, "can't get clock node!\n");
75 return 0;
76 }
77 cdm = of_iomap(np_cdm, 0);
78 if (!cdm) {
79 of_node_put(np_cdm);
80 dev_err(&ofdev->dev, "can't map clock node!\n");
81 return 0;
82 }
83
84 if (in_8(&cdm->ipb_clk_sel) & 0x1)
85 freq *= 2;
86 val = in_be32(&cdm->rstcfg);
87
88 freq *= (val & (1 << 5)) ? 8 : 4;
89 freq /= (val & (1 << 6)) ? 12 : 16;
90
91 of_node_put(np_cdm);
92 iounmap(cdm);
93
94 return freq;
95}
96#else
97static u32 mpc52xx_can_get_clock(struct platform_device *ofdev,
98 const char *clock_name, int *mscan_clksrc)
99{
100 return 0;
101}
102#endif
103
104#ifdef CONFIG_PPC_MPC512x
105static u32 mpc512x_can_get_clock(struct platform_device *ofdev,
106 const char *clock_source, int *mscan_clksrc)
107{
108 struct device_node *np;
109 u32 clockdiv;
110 enum {
111 CLK_FROM_AUTO,
112 CLK_FROM_IPS,
113 CLK_FROM_SYS,
114 CLK_FROM_REF,
115 } clk_from;
116 struct clk *clk_in, *clk_can;
117 unsigned long freq_calc;
118 struct mscan_priv *priv;
119 struct clk *clk_ipg;
120
121
122
123
124 np = ofdev->dev.of_node;
125 clockdiv = 1;
126 of_property_read_u32(np, "fsl,mscan-clock-divider", &clockdiv);
127 dev_dbg(&ofdev->dev, "device tree specs: clk src[%s] div[%d]\n",
128 clock_source ? clock_source : "<NULL>", clockdiv);
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143 clk_from = CLK_FROM_AUTO;
144 if (clock_source) {
145
146 if (!strcmp(clock_source, "ip"))
147 clk_from = CLK_FROM_IPS;
148 else if (!strcmp(clock_source, "sys"))
149 clk_from = CLK_FROM_SYS;
150 else if (!strcmp(clock_source, "ref"))
151 clk_from = CLK_FROM_REF;
152 else
153 goto err_invalid;
154 dev_dbg(&ofdev->dev, "got a clk source spec[%d]\n", clk_from);
155 }
156 if (clk_from == CLK_FROM_AUTO) {
157
158
159
160 dev_dbg(&ofdev->dev, "no clk source spec, trying SYS\n");
161 clk_in = devm_clk_get(&ofdev->dev, "sys");
162 if (IS_ERR(clk_in))
163 goto err_notavail;
164 freq_calc = clk_get_rate(clk_in);
165 freq_calc += 499999;
166 freq_calc /= 1000000;
167 freq_calc *= 1000000;
168 if ((freq_calc % 16000000) == 0) {
169 clk_from = CLK_FROM_SYS;
170 clockdiv = freq_calc / 16000000;
171 dev_dbg(&ofdev->dev,
172 "clk fit, sys[%lu] div[%d] freq[%lu]\n",
173 freq_calc, clockdiv, freq_calc / clockdiv);
174 }
175 }
176 if (clk_from == CLK_FROM_AUTO) {
177
178 dev_dbg(&ofdev->dev, "no clk source spec, trying REF\n");
179 clk_in = devm_clk_get(&ofdev->dev, "ref");
180 if (IS_ERR(clk_in))
181 goto err_notavail;
182 clk_from = CLK_FROM_REF;
183 freq_calc = clk_get_rate(clk_in);
184 dev_dbg(&ofdev->dev,
185 "clk fit, ref[%lu] (no div) freq[%lu]\n",
186 freq_calc, freq_calc);
187 }
188
189
190
191
192
193
194 switch (clk_from) {
195 case CLK_FROM_IPS:
196 clk_can = devm_clk_get(&ofdev->dev, "ips");
197 if (IS_ERR(clk_can))
198 goto err_notavail;
199 priv = netdev_priv(dev_get_drvdata(&ofdev->dev));
200 priv->clk_can = clk_can;
201 freq_calc = clk_get_rate(clk_can);
202 *mscan_clksrc = MSCAN_CLKSRC_IPS;
203 dev_dbg(&ofdev->dev, "clk from IPS, clksrc[%d] freq[%lu]\n",
204 *mscan_clksrc, freq_calc);
205 break;
206 case CLK_FROM_SYS:
207 case CLK_FROM_REF:
208 clk_can = devm_clk_get(&ofdev->dev, "mclk");
209 if (IS_ERR(clk_can))
210 goto err_notavail;
211 priv = netdev_priv(dev_get_drvdata(&ofdev->dev));
212 priv->clk_can = clk_can;
213 if (clk_from == CLK_FROM_SYS)
214 clk_in = devm_clk_get(&ofdev->dev, "sys");
215 if (clk_from == CLK_FROM_REF)
216 clk_in = devm_clk_get(&ofdev->dev, "ref");
217 if (IS_ERR(clk_in))
218 goto err_notavail;
219 clk_set_parent(clk_can, clk_in);
220 freq_calc = clk_get_rate(clk_in);
221 freq_calc /= clockdiv;
222 clk_set_rate(clk_can, freq_calc);
223 freq_calc = clk_get_rate(clk_can);
224 *mscan_clksrc = MSCAN_CLKSRC_BUS;
225 dev_dbg(&ofdev->dev, "clk from MCLK, clksrc[%d] freq[%lu]\n",
226 *mscan_clksrc, freq_calc);
227 break;
228 default:
229 goto err_invalid;
230 }
231
232
233
234
235 clk_ipg = devm_clk_get(&ofdev->dev, "ipg");
236 if (IS_ERR(clk_ipg))
237 goto err_notavail_ipg;
238 if (clk_prepare_enable(clk_ipg))
239 goto err_notavail_ipg;
240 priv = netdev_priv(dev_get_drvdata(&ofdev->dev));
241 priv->clk_ipg = clk_ipg;
242
243
244 return freq_calc;
245
246err_invalid:
247 dev_err(&ofdev->dev, "invalid clock source specification\n");
248
249 return 0;
250
251err_notavail:
252 dev_err(&ofdev->dev, "cannot acquire or setup bitrate clock source\n");
253
254 return 0;
255
256err_notavail_ipg:
257 dev_err(&ofdev->dev, "cannot acquire or setup register clock\n");
258
259 return 0;
260}
261
262static void mpc512x_can_put_clock(struct platform_device *ofdev)
263{
264 struct mscan_priv *priv;
265
266 priv = netdev_priv(dev_get_drvdata(&ofdev->dev));
267 if (priv->clk_ipg)
268 clk_disable_unprepare(priv->clk_ipg);
269}
270#else
271static u32 mpc512x_can_get_clock(struct platform_device *ofdev,
272 const char *clock_name, int *mscan_clksrc)
273{
274 return 0;
275}
276#define mpc512x_can_put_clock NULL
277#endif
278
279static const struct of_device_id mpc5xxx_can_table[];
280static int mpc5xxx_can_probe(struct platform_device *ofdev)
281{
282 const struct mpc5xxx_can_data *data;
283 struct device_node *np = ofdev->dev.of_node;
284 struct net_device *dev;
285 struct mscan_priv *priv;
286 void __iomem *base;
287 const char *clock_name = NULL;
288 int irq, mscan_clksrc = 0;
289 int err = -ENOMEM;
290
291 data = of_device_get_match_data(&ofdev->dev);
292 if (!data)
293 return -EINVAL;
294
295 base = of_iomap(np, 0);
296 if (!base) {
297 dev_err(&ofdev->dev, "couldn't ioremap\n");
298 return err;
299 }
300
301 irq = irq_of_parse_and_map(np, 0);
302 if (!irq) {
303 dev_err(&ofdev->dev, "no irq found\n");
304 err = -ENODEV;
305 goto exit_unmap_mem;
306 }
307
308 dev = alloc_mscandev();
309 if (!dev)
310 goto exit_dispose_irq;
311 platform_set_drvdata(ofdev, dev);
312 SET_NETDEV_DEV(dev, &ofdev->dev);
313
314 priv = netdev_priv(dev);
315 priv->reg_base = base;
316 dev->irq = irq;
317
318 clock_name = of_get_property(np, "fsl,mscan-clock-source", NULL);
319
320 priv->type = data->type;
321 priv->can.clock.freq = data->get_clock(ofdev, clock_name,
322 &mscan_clksrc);
323 if (!priv->can.clock.freq) {
324 dev_err(&ofdev->dev, "couldn't get MSCAN clock properties\n");
325 goto exit_free_mscan;
326 }
327
328 err = register_mscandev(dev, mscan_clksrc);
329 if (err) {
330 dev_err(&ofdev->dev, "registering %s failed (err=%d)\n",
331 DRV_NAME, err);
332 goto exit_free_mscan;
333 }
334
335 dev_info(&ofdev->dev, "MSCAN at 0x%p, irq %d, clock %d Hz\n",
336 priv->reg_base, dev->irq, priv->can.clock.freq);
337
338 return 0;
339
340exit_free_mscan:
341 free_candev(dev);
342exit_dispose_irq:
343 irq_dispose_mapping(irq);
344exit_unmap_mem:
345 iounmap(base);
346
347 return err;
348}
349
350static int mpc5xxx_can_remove(struct platform_device *ofdev)
351{
352 const struct of_device_id *match;
353 const struct mpc5xxx_can_data *data;
354 struct net_device *dev = platform_get_drvdata(ofdev);
355 struct mscan_priv *priv = netdev_priv(dev);
356
357 match = of_match_device(mpc5xxx_can_table, &ofdev->dev);
358 data = match ? match->data : NULL;
359
360 unregister_mscandev(dev);
361 if (data && data->put_clock)
362 data->put_clock(ofdev);
363 iounmap(priv->reg_base);
364 irq_dispose_mapping(dev->irq);
365 free_candev(dev);
366
367 return 0;
368}
369
370#ifdef CONFIG_PM
371static struct mscan_regs saved_regs;
372static int mpc5xxx_can_suspend(struct platform_device *ofdev, pm_message_t state)
373{
374 struct net_device *dev = platform_get_drvdata(ofdev);
375 struct mscan_priv *priv = netdev_priv(dev);
376 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
377
378 _memcpy_fromio(&saved_regs, regs, sizeof(*regs));
379
380 return 0;
381}
382
383static int mpc5xxx_can_resume(struct platform_device *ofdev)
384{
385 struct net_device *dev = platform_get_drvdata(ofdev);
386 struct mscan_priv *priv = netdev_priv(dev);
387 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
388
389 regs->canctl0 |= MSCAN_INITRQ;
390 while (!(regs->canctl1 & MSCAN_INITAK))
391 udelay(10);
392
393 regs->canctl1 = saved_regs.canctl1;
394 regs->canbtr0 = saved_regs.canbtr0;
395 regs->canbtr1 = saved_regs.canbtr1;
396 regs->canidac = saved_regs.canidac;
397
398
399 _memcpy_toio(®s->canidar1_0, (void *)&saved_regs.canidar1_0,
400 sizeof(*regs) - offsetof(struct mscan_regs, canidar1_0));
401
402 regs->canctl0 &= ~MSCAN_INITRQ;
403 regs->cantbsel = saved_regs.cantbsel;
404 regs->canrier = saved_regs.canrier;
405 regs->cantier = saved_regs.cantier;
406 regs->canctl0 = saved_regs.canctl0;
407
408 return 0;
409}
410#endif
411
412static const struct mpc5xxx_can_data mpc5200_can_data = {
413 .type = MSCAN_TYPE_MPC5200,
414 .get_clock = mpc52xx_can_get_clock,
415
416};
417
418static const struct mpc5xxx_can_data mpc5121_can_data = {
419 .type = MSCAN_TYPE_MPC5121,
420 .get_clock = mpc512x_can_get_clock,
421 .put_clock = mpc512x_can_put_clock,
422};
423
424static const struct of_device_id mpc5xxx_can_table[] = {
425 { .compatible = "fsl,mpc5200-mscan", .data = &mpc5200_can_data, },
426
427 { .compatible = "fsl,mpc5121-mscan", .data = &mpc5121_can_data, },
428 {},
429};
430MODULE_DEVICE_TABLE(of, mpc5xxx_can_table);
431
432static struct platform_driver mpc5xxx_can_driver = {
433 .driver = {
434 .name = "mpc5xxx_can",
435 .of_match_table = mpc5xxx_can_table,
436 },
437 .probe = mpc5xxx_can_probe,
438 .remove = mpc5xxx_can_remove,
439#ifdef CONFIG_PM
440 .suspend = mpc5xxx_can_suspend,
441 .resume = mpc5xxx_can_resume,
442#endif
443};
444
445module_platform_driver(mpc5xxx_can_driver);
446
447MODULE_AUTHOR("Wolfgang Grandegger <wg@grandegger.com>");
448MODULE_DESCRIPTION("Freescale MPC5xxx CAN driver");
449MODULE_LICENSE("GPL v2");
450