1
2
3
4
5
6#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
7
8#ifdef CONFIG_RFS_ACCEL
9#include <linux/cpu_rmap.h>
10#endif
11#include <linux/ethtool.h>
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/numa.h>
15#include <linux/pci.h>
16#include <linux/utsname.h>
17#include <linux/version.h>
18#include <linux/vmalloc.h>
19#include <net/ip.h>
20
21#include "ena_netdev.h"
22#include <linux/bpf_trace.h>
23#include "ena_pci_id_tbl.h"
24
25MODULE_AUTHOR("Amazon.com, Inc. or its affiliates");
26MODULE_DESCRIPTION(DEVICE_NAME);
27MODULE_LICENSE("GPL");
28
29
30#define TX_TIMEOUT (5 * HZ)
31
32#define ENA_MAX_RINGS min_t(unsigned int, ENA_MAX_NUM_IO_QUEUES, num_possible_cpus())
33
34#define ENA_NAPI_BUDGET 64
35
36#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \
37 NETIF_MSG_TX_DONE | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR)
38
39static struct ena_aenq_handlers aenq_handlers;
40
41static struct workqueue_struct *ena_wq;
42
43MODULE_DEVICE_TABLE(pci, ena_pci_tbl);
44
45static int ena_rss_init_default(struct ena_adapter *adapter);
46static void check_for_admin_com_state(struct ena_adapter *adapter);
47static void ena_destroy_device(struct ena_adapter *adapter, bool graceful);
48static int ena_restore_device(struct ena_adapter *adapter);
49
50static void ena_init_io_rings(struct ena_adapter *adapter,
51 int first_index, int count);
52static void ena_init_napi_in_range(struct ena_adapter *adapter, int first_index,
53 int count);
54static void ena_del_napi_in_range(struct ena_adapter *adapter, int first_index,
55 int count);
56static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid);
57static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter,
58 int first_index,
59 int count);
60static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid);
61static void ena_free_tx_resources(struct ena_adapter *adapter, int qid);
62static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget);
63static void ena_destroy_all_tx_queues(struct ena_adapter *adapter);
64static void ena_free_all_io_tx_resources(struct ena_adapter *adapter);
65static void ena_napi_disable_in_range(struct ena_adapter *adapter,
66 int first_index, int count);
67static void ena_napi_enable_in_range(struct ena_adapter *adapter,
68 int first_index, int count);
69static int ena_up(struct ena_adapter *adapter);
70static void ena_down(struct ena_adapter *adapter);
71static void ena_unmask_interrupt(struct ena_ring *tx_ring,
72 struct ena_ring *rx_ring);
73static void ena_update_ring_numa_node(struct ena_ring *tx_ring,
74 struct ena_ring *rx_ring);
75static void ena_unmap_tx_buff(struct ena_ring *tx_ring,
76 struct ena_tx_buffer *tx_info);
77static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter,
78 int first_index, int count);
79
80
81static void ena_increase_stat(u64 *statp, u64 cnt,
82 struct u64_stats_sync *syncp)
83{
84 u64_stats_update_begin(syncp);
85 (*statp) += cnt;
86 u64_stats_update_end(syncp);
87}
88
89static void ena_ring_tx_doorbell(struct ena_ring *tx_ring)
90{
91 ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq);
92 ena_increase_stat(&tx_ring->tx_stats.doorbells, 1, &tx_ring->syncp);
93}
94
95static void ena_tx_timeout(struct net_device *dev, unsigned int txqueue)
96{
97 struct ena_adapter *adapter = netdev_priv(dev);
98
99
100
101
102
103 if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
104 return;
105
106 adapter->reset_reason = ENA_REGS_RESET_OS_NETDEV_WD;
107 ena_increase_stat(&adapter->dev_stats.tx_timeout, 1, &adapter->syncp);
108
109 netif_err(adapter, tx_err, dev, "Transmit time out\n");
110}
111
112static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu)
113{
114 int i;
115
116 for (i = 0; i < adapter->num_io_queues; i++)
117 adapter->rx_ring[i].mtu = mtu;
118}
119
120static int ena_change_mtu(struct net_device *dev, int new_mtu)
121{
122 struct ena_adapter *adapter = netdev_priv(dev);
123 int ret;
124
125 ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu);
126 if (!ret) {
127 netif_dbg(adapter, drv, dev, "Set MTU to %d\n", new_mtu);
128 update_rx_ring_mtu(adapter, new_mtu);
129 dev->mtu = new_mtu;
130 } else {
131 netif_err(adapter, drv, dev, "Failed to set MTU to %d\n",
132 new_mtu);
133 }
134
135 return ret;
136}
137
138static int ena_xmit_common(struct net_device *dev,
139 struct ena_ring *ring,
140 struct ena_tx_buffer *tx_info,
141 struct ena_com_tx_ctx *ena_tx_ctx,
142 u16 next_to_use,
143 u32 bytes)
144{
145 struct ena_adapter *adapter = netdev_priv(dev);
146 int rc, nb_hw_desc;
147
148 if (unlikely(ena_com_is_doorbell_needed(ring->ena_com_io_sq,
149 ena_tx_ctx))) {
150 netif_dbg(adapter, tx_queued, dev,
151 "llq tx max burst size of queue %d achieved, writing doorbell to send burst\n",
152 ring->qid);
153 ena_ring_tx_doorbell(ring);
154 }
155
156
157 rc = ena_com_prepare_tx(ring->ena_com_io_sq, ena_tx_ctx,
158 &nb_hw_desc);
159
160
161
162
163
164 if (unlikely(rc)) {
165 netif_err(adapter, tx_queued, dev,
166 "Failed to prepare tx bufs\n");
167 ena_increase_stat(&ring->tx_stats.prepare_ctx_err, 1,
168 &ring->syncp);
169 if (rc != -ENOMEM) {
170 adapter->reset_reason =
171 ENA_REGS_RESET_DRIVER_INVALID_STATE;
172 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
173 }
174 return rc;
175 }
176
177 u64_stats_update_begin(&ring->syncp);
178 ring->tx_stats.cnt++;
179 ring->tx_stats.bytes += bytes;
180 u64_stats_update_end(&ring->syncp);
181
182 tx_info->tx_descs = nb_hw_desc;
183 tx_info->last_jiffies = jiffies;
184 tx_info->print_once = 0;
185
186 ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use,
187 ring->ring_size);
188 return 0;
189}
190
191
192
193
194static int ena_xdp_io_poll(struct napi_struct *napi, int budget)
195{
196 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi);
197 u32 xdp_work_done, xdp_budget;
198 struct ena_ring *xdp_ring;
199 int napi_comp_call = 0;
200 int ret;
201
202 xdp_ring = ena_napi->xdp_ring;
203
204 xdp_budget = budget;
205
206 if (!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags) ||
207 test_bit(ENA_FLAG_TRIGGER_RESET, &xdp_ring->adapter->flags)) {
208 napi_complete_done(napi, 0);
209 return 0;
210 }
211
212 xdp_work_done = ena_clean_xdp_irq(xdp_ring, xdp_budget);
213
214
215
216
217 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags))) {
218 napi_complete_done(napi, 0);
219 ret = 0;
220 } else if (xdp_budget > xdp_work_done) {
221 napi_comp_call = 1;
222 if (napi_complete_done(napi, xdp_work_done))
223 ena_unmask_interrupt(xdp_ring, NULL);
224 ena_update_ring_numa_node(xdp_ring, NULL);
225 ret = xdp_work_done;
226 } else {
227 ret = xdp_budget;
228 }
229
230 u64_stats_update_begin(&xdp_ring->syncp);
231 xdp_ring->tx_stats.napi_comp += napi_comp_call;
232 xdp_ring->tx_stats.tx_poll++;
233 u64_stats_update_end(&xdp_ring->syncp);
234 xdp_ring->tx_stats.last_napi_jiffies = jiffies;
235
236 return ret;
237}
238
239static int ena_xdp_tx_map_frame(struct ena_ring *xdp_ring,
240 struct ena_tx_buffer *tx_info,
241 struct xdp_frame *xdpf,
242 struct ena_com_tx_ctx *ena_tx_ctx)
243{
244 struct ena_adapter *adapter = xdp_ring->adapter;
245 struct ena_com_buf *ena_buf;
246 int push_len = 0;
247 dma_addr_t dma;
248 void *data;
249 u32 size;
250
251 tx_info->xdpf = xdpf;
252 data = tx_info->xdpf->data;
253 size = tx_info->xdpf->len;
254
255 if (xdp_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
256
257 push_len = min_t(u32, size, xdp_ring->tx_max_header_size);
258
259 ena_tx_ctx->push_header = data;
260
261 size -= push_len;
262 data += push_len;
263 }
264
265 ena_tx_ctx->header_len = push_len;
266
267 if (size > 0) {
268 dma = dma_map_single(xdp_ring->dev,
269 data,
270 size,
271 DMA_TO_DEVICE);
272 if (unlikely(dma_mapping_error(xdp_ring->dev, dma)))
273 goto error_report_dma_error;
274
275 tx_info->map_linear_data = 0;
276
277 ena_buf = tx_info->bufs;
278 ena_buf->paddr = dma;
279 ena_buf->len = size;
280
281 ena_tx_ctx->ena_bufs = ena_buf;
282 ena_tx_ctx->num_bufs = tx_info->num_of_bufs = 1;
283 }
284
285 return 0;
286
287error_report_dma_error:
288 ena_increase_stat(&xdp_ring->tx_stats.dma_mapping_err, 1,
289 &xdp_ring->syncp);
290 netif_warn(adapter, tx_queued, adapter->netdev, "Failed to map xdp buff\n");
291
292 return -EINVAL;
293}
294
295static int ena_xdp_xmit_frame(struct ena_ring *xdp_ring,
296 struct net_device *dev,
297 struct xdp_frame *xdpf,
298 int flags)
299{
300 struct ena_com_tx_ctx ena_tx_ctx = {};
301 struct ena_tx_buffer *tx_info;
302 u16 next_to_use, req_id;
303 int rc;
304
305 next_to_use = xdp_ring->next_to_use;
306 req_id = xdp_ring->free_ids[next_to_use];
307 tx_info = &xdp_ring->tx_buffer_info[req_id];
308 tx_info->num_of_bufs = 0;
309
310 rc = ena_xdp_tx_map_frame(xdp_ring, tx_info, xdpf, &ena_tx_ctx);
311 if (unlikely(rc))
312 return rc;
313
314 ena_tx_ctx.req_id = req_id;
315
316 rc = ena_xmit_common(dev,
317 xdp_ring,
318 tx_info,
319 &ena_tx_ctx,
320 next_to_use,
321 xdpf->len);
322 if (rc)
323 goto error_unmap_dma;
324
325
326
327
328 if (flags & XDP_XMIT_FLUSH)
329 ena_ring_tx_doorbell(xdp_ring);
330
331 return rc;
332
333error_unmap_dma:
334 ena_unmap_tx_buff(xdp_ring, tx_info);
335 tx_info->xdpf = NULL;
336 return rc;
337}
338
339static int ena_xdp_xmit(struct net_device *dev, int n,
340 struct xdp_frame **frames, u32 flags)
341{
342 struct ena_adapter *adapter = netdev_priv(dev);
343 struct ena_ring *xdp_ring;
344 int qid, i, nxmit = 0;
345
346 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
347 return -EINVAL;
348
349 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
350 return -ENETDOWN;
351
352
353 if (!READ_ONCE(adapter->rx_ring->xdp_bpf_prog))
354 return -ENXIO;
355
356 qid = smp_processor_id() % adapter->xdp_num_queues;
357 qid += adapter->xdp_first_ring;
358 xdp_ring = &adapter->tx_ring[qid];
359
360
361 spin_lock(&xdp_ring->xdp_tx_lock);
362
363 for (i = 0; i < n; i++) {
364 if (ena_xdp_xmit_frame(xdp_ring, dev, frames[i], 0))
365 break;
366 nxmit++;
367 }
368
369
370 if (flags & XDP_XMIT_FLUSH)
371 ena_ring_tx_doorbell(xdp_ring);
372
373 spin_unlock(&xdp_ring->xdp_tx_lock);
374
375
376 return nxmit;
377}
378
379static int ena_xdp_execute(struct ena_ring *rx_ring, struct xdp_buff *xdp)
380{
381 struct bpf_prog *xdp_prog;
382 struct ena_ring *xdp_ring;
383 u32 verdict = XDP_PASS;
384 struct xdp_frame *xdpf;
385 u64 *xdp_stat;
386
387 xdp_prog = READ_ONCE(rx_ring->xdp_bpf_prog);
388
389 if (!xdp_prog)
390 goto out;
391
392 verdict = bpf_prog_run_xdp(xdp_prog, xdp);
393
394 switch (verdict) {
395 case XDP_TX:
396 xdpf = xdp_convert_buff_to_frame(xdp);
397 if (unlikely(!xdpf)) {
398 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict);
399 xdp_stat = &rx_ring->rx_stats.xdp_aborted;
400 verdict = XDP_ABORTED;
401 break;
402 }
403
404
405 xdp_ring = rx_ring->xdp_ring;
406
407
408 spin_lock(&xdp_ring->xdp_tx_lock);
409
410 if (ena_xdp_xmit_frame(xdp_ring, rx_ring->netdev, xdpf,
411 XDP_XMIT_FLUSH))
412 xdp_return_frame(xdpf);
413
414 spin_unlock(&xdp_ring->xdp_tx_lock);
415 xdp_stat = &rx_ring->rx_stats.xdp_tx;
416 break;
417 case XDP_REDIRECT:
418 if (likely(!xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog))) {
419 xdp_stat = &rx_ring->rx_stats.xdp_redirect;
420 break;
421 }
422 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict);
423 xdp_stat = &rx_ring->rx_stats.xdp_aborted;
424 verdict = XDP_ABORTED;
425 break;
426 case XDP_ABORTED:
427 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict);
428 xdp_stat = &rx_ring->rx_stats.xdp_aborted;
429 break;
430 case XDP_DROP:
431 xdp_stat = &rx_ring->rx_stats.xdp_drop;
432 break;
433 case XDP_PASS:
434 xdp_stat = &rx_ring->rx_stats.xdp_pass;
435 break;
436 default:
437 bpf_warn_invalid_xdp_action(verdict);
438 xdp_stat = &rx_ring->rx_stats.xdp_invalid;
439 }
440
441 ena_increase_stat(xdp_stat, 1, &rx_ring->syncp);
442out:
443 return verdict;
444}
445
446static void ena_init_all_xdp_queues(struct ena_adapter *adapter)
447{
448 adapter->xdp_first_ring = adapter->num_io_queues;
449 adapter->xdp_num_queues = adapter->num_io_queues;
450
451 ena_init_io_rings(adapter,
452 adapter->xdp_first_ring,
453 adapter->xdp_num_queues);
454}
455
456static int ena_setup_and_create_all_xdp_queues(struct ena_adapter *adapter)
457{
458 int rc = 0;
459
460 rc = ena_setup_tx_resources_in_range(adapter, adapter->xdp_first_ring,
461 adapter->xdp_num_queues);
462 if (rc)
463 goto setup_err;
464
465 rc = ena_create_io_tx_queues_in_range(adapter,
466 adapter->xdp_first_ring,
467 adapter->xdp_num_queues);
468 if (rc)
469 goto create_err;
470
471 return 0;
472
473create_err:
474 ena_free_all_io_tx_resources(adapter);
475setup_err:
476 return rc;
477}
478
479
480
481
482static int ena_xdp_register_rxq_info(struct ena_ring *rx_ring)
483{
484 int rc;
485
486 rc = xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev, rx_ring->qid, 0);
487
488 if (rc) {
489 netif_err(rx_ring->adapter, ifup, rx_ring->netdev,
490 "Failed to register xdp rx queue info. RX queue num %d rc: %d\n",
491 rx_ring->qid, rc);
492 goto err;
493 }
494
495 rc = xdp_rxq_info_reg_mem_model(&rx_ring->xdp_rxq, MEM_TYPE_PAGE_SHARED,
496 NULL);
497
498 if (rc) {
499 netif_err(rx_ring->adapter, ifup, rx_ring->netdev,
500 "Failed to register xdp rx queue info memory model. RX queue num %d rc: %d\n",
501 rx_ring->qid, rc);
502 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
503 }
504
505err:
506 return rc;
507}
508
509static void ena_xdp_unregister_rxq_info(struct ena_ring *rx_ring)
510{
511 xdp_rxq_info_unreg_mem_model(&rx_ring->xdp_rxq);
512 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
513}
514
515static void ena_xdp_exchange_program_rx_in_range(struct ena_adapter *adapter,
516 struct bpf_prog *prog,
517 int first, int count)
518{
519 struct ena_ring *rx_ring;
520 int i = 0;
521
522 for (i = first; i < count; i++) {
523 rx_ring = &adapter->rx_ring[i];
524 xchg(&rx_ring->xdp_bpf_prog, prog);
525 if (prog) {
526 ena_xdp_register_rxq_info(rx_ring);
527 rx_ring->rx_headroom = XDP_PACKET_HEADROOM;
528 } else {
529 ena_xdp_unregister_rxq_info(rx_ring);
530 rx_ring->rx_headroom = NET_SKB_PAD;
531 }
532 }
533}
534
535static void ena_xdp_exchange_program(struct ena_adapter *adapter,
536 struct bpf_prog *prog)
537{
538 struct bpf_prog *old_bpf_prog = xchg(&adapter->xdp_bpf_prog, prog);
539
540 ena_xdp_exchange_program_rx_in_range(adapter,
541 prog,
542 0,
543 adapter->num_io_queues);
544
545 if (old_bpf_prog)
546 bpf_prog_put(old_bpf_prog);
547}
548
549static int ena_destroy_and_free_all_xdp_queues(struct ena_adapter *adapter)
550{
551 bool was_up;
552 int rc;
553
554 was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
555
556 if (was_up)
557 ena_down(adapter);
558
559 adapter->xdp_first_ring = 0;
560 adapter->xdp_num_queues = 0;
561 ena_xdp_exchange_program(adapter, NULL);
562 if (was_up) {
563 rc = ena_up(adapter);
564 if (rc)
565 return rc;
566 }
567 return 0;
568}
569
570static int ena_xdp_set(struct net_device *netdev, struct netdev_bpf *bpf)
571{
572 struct ena_adapter *adapter = netdev_priv(netdev);
573 struct bpf_prog *prog = bpf->prog;
574 struct bpf_prog *old_bpf_prog;
575 int rc, prev_mtu;
576 bool is_up;
577
578 is_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
579 rc = ena_xdp_allowed(adapter);
580 if (rc == ENA_XDP_ALLOWED) {
581 old_bpf_prog = adapter->xdp_bpf_prog;
582 if (prog) {
583 if (!is_up) {
584 ena_init_all_xdp_queues(adapter);
585 } else if (!old_bpf_prog) {
586 ena_down(adapter);
587 ena_init_all_xdp_queues(adapter);
588 }
589 ena_xdp_exchange_program(adapter, prog);
590
591 if (is_up && !old_bpf_prog) {
592 rc = ena_up(adapter);
593 if (rc)
594 return rc;
595 }
596 } else if (old_bpf_prog) {
597 rc = ena_destroy_and_free_all_xdp_queues(adapter);
598 if (rc)
599 return rc;
600 }
601
602 prev_mtu = netdev->max_mtu;
603 netdev->max_mtu = prog ? ENA_XDP_MAX_MTU : adapter->max_mtu;
604
605 if (!old_bpf_prog)
606 netif_info(adapter, drv, adapter->netdev,
607 "XDP program is set, changing the max_mtu from %d to %d",
608 prev_mtu, netdev->max_mtu);
609
610 } else if (rc == ENA_XDP_CURRENT_MTU_TOO_LARGE) {
611 netif_err(adapter, drv, adapter->netdev,
612 "Failed to set xdp program, the current MTU (%d) is larger than the maximum allowed MTU (%lu) while xdp is on",
613 netdev->mtu, ENA_XDP_MAX_MTU);
614 NL_SET_ERR_MSG_MOD(bpf->extack,
615 "Failed to set xdp program, the current MTU is larger than the maximum allowed MTU. Check the dmesg for more info");
616 return -EINVAL;
617 } else if (rc == ENA_XDP_NO_ENOUGH_QUEUES) {
618 netif_err(adapter, drv, adapter->netdev,
619 "Failed to set xdp program, the Rx/Tx channel count should be at most half of the maximum allowed channel count. The current queue count (%d), the maximal queue count (%d)\n",
620 adapter->num_io_queues, adapter->max_num_io_queues);
621 NL_SET_ERR_MSG_MOD(bpf->extack,
622 "Failed to set xdp program, there is no enough space for allocating XDP queues, Check the dmesg for more info");
623 return -EINVAL;
624 }
625
626 return 0;
627}
628
629
630
631
632static int ena_xdp(struct net_device *netdev, struct netdev_bpf *bpf)
633{
634 switch (bpf->command) {
635 case XDP_SETUP_PROG:
636 return ena_xdp_set(netdev, bpf);
637 default:
638 return -EINVAL;
639 }
640 return 0;
641}
642
643static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter)
644{
645#ifdef CONFIG_RFS_ACCEL
646 u32 i;
647 int rc;
648
649 adapter->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(adapter->num_io_queues);
650 if (!adapter->netdev->rx_cpu_rmap)
651 return -ENOMEM;
652 for (i = 0; i < adapter->num_io_queues; i++) {
653 int irq_idx = ENA_IO_IRQ_IDX(i);
654
655 rc = irq_cpu_rmap_add(adapter->netdev->rx_cpu_rmap,
656 pci_irq_vector(adapter->pdev, irq_idx));
657 if (rc) {
658 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
659 adapter->netdev->rx_cpu_rmap = NULL;
660 return rc;
661 }
662 }
663#endif
664 return 0;
665}
666
667static void ena_init_io_rings_common(struct ena_adapter *adapter,
668 struct ena_ring *ring, u16 qid)
669{
670 ring->qid = qid;
671 ring->pdev = adapter->pdev;
672 ring->dev = &adapter->pdev->dev;
673 ring->netdev = adapter->netdev;
674 ring->napi = &adapter->ena_napi[qid].napi;
675 ring->adapter = adapter;
676 ring->ena_dev = adapter->ena_dev;
677 ring->per_napi_packets = 0;
678 ring->cpu = 0;
679 ring->no_interrupt_event_cnt = 0;
680 u64_stats_init(&ring->syncp);
681}
682
683static void ena_init_io_rings(struct ena_adapter *adapter,
684 int first_index, int count)
685{
686 struct ena_com_dev *ena_dev;
687 struct ena_ring *txr, *rxr;
688 int i;
689
690 ena_dev = adapter->ena_dev;
691
692 for (i = first_index; i < first_index + count; i++) {
693 txr = &adapter->tx_ring[i];
694 rxr = &adapter->rx_ring[i];
695
696
697 ena_init_io_rings_common(adapter, txr, i);
698
699
700 txr->ring_size = adapter->requested_tx_ring_size;
701 txr->tx_max_header_size = ena_dev->tx_max_header_size;
702 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type;
703 txr->sgl_size = adapter->max_tx_sgl_size;
704 txr->smoothed_interval =
705 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev);
706 txr->disable_meta_caching = adapter->disable_meta_caching;
707 spin_lock_init(&txr->xdp_tx_lock);
708
709
710 if (!ENA_IS_XDP_INDEX(adapter, i)) {
711
712 ena_init_io_rings_common(adapter, rxr, i);
713
714
715 rxr->ring_size = adapter->requested_rx_ring_size;
716 rxr->rx_copybreak = adapter->rx_copybreak;
717 rxr->sgl_size = adapter->max_rx_sgl_size;
718 rxr->smoothed_interval =
719 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev);
720 rxr->empty_rx_queue = 0;
721 rxr->rx_headroom = NET_SKB_PAD;
722 adapter->ena_napi[i].dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
723 rxr->xdp_ring = &adapter->tx_ring[i + adapter->num_io_queues];
724 }
725 }
726}
727
728
729
730
731
732
733
734static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid)
735{
736 struct ena_ring *tx_ring = &adapter->tx_ring[qid];
737 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
738 int size, i, node;
739
740 if (tx_ring->tx_buffer_info) {
741 netif_err(adapter, ifup,
742 adapter->netdev, "tx_buffer_info info is not NULL");
743 return -EEXIST;
744 }
745
746 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size;
747 node = cpu_to_node(ena_irq->cpu);
748
749 tx_ring->tx_buffer_info = vzalloc_node(size, node);
750 if (!tx_ring->tx_buffer_info) {
751 tx_ring->tx_buffer_info = vzalloc(size);
752 if (!tx_ring->tx_buffer_info)
753 goto err_tx_buffer_info;
754 }
755
756 size = sizeof(u16) * tx_ring->ring_size;
757 tx_ring->free_ids = vzalloc_node(size, node);
758 if (!tx_ring->free_ids) {
759 tx_ring->free_ids = vzalloc(size);
760 if (!tx_ring->free_ids)
761 goto err_tx_free_ids;
762 }
763
764 size = tx_ring->tx_max_header_size;
765 tx_ring->push_buf_intermediate_buf = vzalloc_node(size, node);
766 if (!tx_ring->push_buf_intermediate_buf) {
767 tx_ring->push_buf_intermediate_buf = vzalloc(size);
768 if (!tx_ring->push_buf_intermediate_buf)
769 goto err_push_buf_intermediate_buf;
770 }
771
772
773 for (i = 0; i < tx_ring->ring_size; i++)
774 tx_ring->free_ids[i] = i;
775
776
777 memset(&tx_ring->tx_stats, 0x0, sizeof(tx_ring->tx_stats));
778
779 tx_ring->next_to_use = 0;
780 tx_ring->next_to_clean = 0;
781 tx_ring->cpu = ena_irq->cpu;
782 return 0;
783
784err_push_buf_intermediate_buf:
785 vfree(tx_ring->free_ids);
786 tx_ring->free_ids = NULL;
787err_tx_free_ids:
788 vfree(tx_ring->tx_buffer_info);
789 tx_ring->tx_buffer_info = NULL;
790err_tx_buffer_info:
791 return -ENOMEM;
792}
793
794
795
796
797
798
799
800static void ena_free_tx_resources(struct ena_adapter *adapter, int qid)
801{
802 struct ena_ring *tx_ring = &adapter->tx_ring[qid];
803
804 vfree(tx_ring->tx_buffer_info);
805 tx_ring->tx_buffer_info = NULL;
806
807 vfree(tx_ring->free_ids);
808 tx_ring->free_ids = NULL;
809
810 vfree(tx_ring->push_buf_intermediate_buf);
811 tx_ring->push_buf_intermediate_buf = NULL;
812}
813
814static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter,
815 int first_index,
816 int count)
817{
818 int i, rc = 0;
819
820 for (i = first_index; i < first_index + count; i++) {
821 rc = ena_setup_tx_resources(adapter, i);
822 if (rc)
823 goto err_setup_tx;
824 }
825
826 return 0;
827
828err_setup_tx:
829
830 netif_err(adapter, ifup, adapter->netdev,
831 "Tx queue %d: allocation failed\n", i);
832
833
834 while (first_index < i--)
835 ena_free_tx_resources(adapter, i);
836 return rc;
837}
838
839static void ena_free_all_io_tx_resources_in_range(struct ena_adapter *adapter,
840 int first_index, int count)
841{
842 int i;
843
844 for (i = first_index; i < first_index + count; i++)
845 ena_free_tx_resources(adapter, i);
846}
847
848
849
850
851
852
853static void ena_free_all_io_tx_resources(struct ena_adapter *adapter)
854{
855 ena_free_all_io_tx_resources_in_range(adapter,
856 0,
857 adapter->xdp_num_queues +
858 adapter->num_io_queues);
859}
860
861
862
863
864
865
866
867static int ena_setup_rx_resources(struct ena_adapter *adapter,
868 u32 qid)
869{
870 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
871 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
872 int size, node, i;
873
874 if (rx_ring->rx_buffer_info) {
875 netif_err(adapter, ifup, adapter->netdev,
876 "rx_buffer_info is not NULL");
877 return -EEXIST;
878 }
879
880
881
882
883 size = sizeof(struct ena_rx_buffer) * (rx_ring->ring_size + 1);
884 node = cpu_to_node(ena_irq->cpu);
885
886 rx_ring->rx_buffer_info = vzalloc_node(size, node);
887 if (!rx_ring->rx_buffer_info) {
888 rx_ring->rx_buffer_info = vzalloc(size);
889 if (!rx_ring->rx_buffer_info)
890 return -ENOMEM;
891 }
892
893 size = sizeof(u16) * rx_ring->ring_size;
894 rx_ring->free_ids = vzalloc_node(size, node);
895 if (!rx_ring->free_ids) {
896 rx_ring->free_ids = vzalloc(size);
897 if (!rx_ring->free_ids) {
898 vfree(rx_ring->rx_buffer_info);
899 rx_ring->rx_buffer_info = NULL;
900 return -ENOMEM;
901 }
902 }
903
904
905 for (i = 0; i < rx_ring->ring_size; i++)
906 rx_ring->free_ids[i] = i;
907
908
909 memset(&rx_ring->rx_stats, 0x0, sizeof(rx_ring->rx_stats));
910
911 rx_ring->next_to_clean = 0;
912 rx_ring->next_to_use = 0;
913 rx_ring->cpu = ena_irq->cpu;
914
915 return 0;
916}
917
918
919
920
921
922
923
924static void ena_free_rx_resources(struct ena_adapter *adapter,
925 u32 qid)
926{
927 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
928
929 vfree(rx_ring->rx_buffer_info);
930 rx_ring->rx_buffer_info = NULL;
931
932 vfree(rx_ring->free_ids);
933 rx_ring->free_ids = NULL;
934}
935
936
937
938
939
940
941static int ena_setup_all_rx_resources(struct ena_adapter *adapter)
942{
943 int i, rc = 0;
944
945 for (i = 0; i < adapter->num_io_queues; i++) {
946 rc = ena_setup_rx_resources(adapter, i);
947 if (rc)
948 goto err_setup_rx;
949 }
950
951 return 0;
952
953err_setup_rx:
954
955 netif_err(adapter, ifup, adapter->netdev,
956 "Rx queue %d: allocation failed\n", i);
957
958
959 while (i--)
960 ena_free_rx_resources(adapter, i);
961 return rc;
962}
963
964
965
966
967
968
969static void ena_free_all_io_rx_resources(struct ena_adapter *adapter)
970{
971 int i;
972
973 for (i = 0; i < adapter->num_io_queues; i++)
974 ena_free_rx_resources(adapter, i);
975}
976
977static struct page *ena_alloc_map_page(struct ena_ring *rx_ring,
978 dma_addr_t *dma)
979{
980 struct page *page;
981
982
983
984
985 page = dev_alloc_page();
986 if (!page) {
987 ena_increase_stat(&rx_ring->rx_stats.page_alloc_fail, 1,
988 &rx_ring->syncp);
989 return ERR_PTR(-ENOSPC);
990 }
991
992
993
994
995 *dma = dma_map_page(rx_ring->dev, page, 0, ENA_PAGE_SIZE,
996 DMA_BIDIRECTIONAL);
997 if (unlikely(dma_mapping_error(rx_ring->dev, *dma))) {
998 ena_increase_stat(&rx_ring->rx_stats.dma_mapping_err, 1,
999 &rx_ring->syncp);
1000 __free_page(page);
1001 return ERR_PTR(-EIO);
1002 }
1003
1004 return page;
1005}
1006
1007static int ena_alloc_rx_buffer(struct ena_ring *rx_ring,
1008 struct ena_rx_buffer *rx_info)
1009{
1010 int headroom = rx_ring->rx_headroom;
1011 struct ena_com_buf *ena_buf;
1012 struct page *page;
1013 dma_addr_t dma;
1014 int tailroom;
1015
1016
1017 rx_info->page_offset = headroom;
1018
1019
1020 if (unlikely(rx_info->page))
1021 return 0;
1022
1023
1024 page = ena_alloc_map_page(rx_ring, &dma);
1025 if (unlikely(IS_ERR(page)))
1026 return PTR_ERR(page);
1027
1028 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1029 "Allocate page %p, rx_info %p\n", page, rx_info);
1030
1031 tailroom = SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
1032
1033 rx_info->page = page;
1034 ena_buf = &rx_info->ena_buf;
1035 ena_buf->paddr = dma + headroom;
1036 ena_buf->len = ENA_PAGE_SIZE - headroom - tailroom;
1037
1038 return 0;
1039}
1040
1041static void ena_unmap_rx_buff(struct ena_ring *rx_ring,
1042 struct ena_rx_buffer *rx_info)
1043{
1044 struct ena_com_buf *ena_buf = &rx_info->ena_buf;
1045
1046 dma_unmap_page(rx_ring->dev, ena_buf->paddr - rx_ring->rx_headroom,
1047 ENA_PAGE_SIZE,
1048 DMA_BIDIRECTIONAL);
1049}
1050
1051static void ena_free_rx_page(struct ena_ring *rx_ring,
1052 struct ena_rx_buffer *rx_info)
1053{
1054 struct page *page = rx_info->page;
1055
1056 if (unlikely(!page)) {
1057 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
1058 "Trying to free unallocated buffer\n");
1059 return;
1060 }
1061
1062 ena_unmap_rx_buff(rx_ring, rx_info);
1063
1064 __free_page(page);
1065 rx_info->page = NULL;
1066}
1067
1068static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num)
1069{
1070 u16 next_to_use, req_id;
1071 u32 i;
1072 int rc;
1073
1074 next_to_use = rx_ring->next_to_use;
1075
1076 for (i = 0; i < num; i++) {
1077 struct ena_rx_buffer *rx_info;
1078
1079 req_id = rx_ring->free_ids[next_to_use];
1080
1081 rx_info = &rx_ring->rx_buffer_info[req_id];
1082
1083 rc = ena_alloc_rx_buffer(rx_ring, rx_info);
1084 if (unlikely(rc < 0)) {
1085 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
1086 "Failed to allocate buffer for rx queue %d\n",
1087 rx_ring->qid);
1088 break;
1089 }
1090 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq,
1091 &rx_info->ena_buf,
1092 req_id);
1093 if (unlikely(rc)) {
1094 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
1095 "Failed to add buffer for rx queue %d\n",
1096 rx_ring->qid);
1097 break;
1098 }
1099 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use,
1100 rx_ring->ring_size);
1101 }
1102
1103 if (unlikely(i < num)) {
1104 ena_increase_stat(&rx_ring->rx_stats.refil_partial, 1,
1105 &rx_ring->syncp);
1106 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
1107 "Refilled rx qid %d with only %d buffers (from %d)\n",
1108 rx_ring->qid, i, num);
1109 }
1110
1111
1112 if (likely(i))
1113 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq);
1114
1115 rx_ring->next_to_use = next_to_use;
1116
1117 return i;
1118}
1119
1120static void ena_free_rx_bufs(struct ena_adapter *adapter,
1121 u32 qid)
1122{
1123 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
1124 u32 i;
1125
1126 for (i = 0; i < rx_ring->ring_size; i++) {
1127 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i];
1128
1129 if (rx_info->page)
1130 ena_free_rx_page(rx_ring, rx_info);
1131 }
1132}
1133
1134
1135
1136
1137static void ena_refill_all_rx_bufs(struct ena_adapter *adapter)
1138{
1139 struct ena_ring *rx_ring;
1140 int i, rc, bufs_num;
1141
1142 for (i = 0; i < adapter->num_io_queues; i++) {
1143 rx_ring = &adapter->rx_ring[i];
1144 bufs_num = rx_ring->ring_size - 1;
1145 rc = ena_refill_rx_bufs(rx_ring, bufs_num);
1146
1147 if (unlikely(rc != bufs_num))
1148 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
1149 "Refilling Queue %d failed. allocated %d buffers from: %d\n",
1150 i, rc, bufs_num);
1151 }
1152}
1153
1154static void ena_free_all_rx_bufs(struct ena_adapter *adapter)
1155{
1156 int i;
1157
1158 for (i = 0; i < adapter->num_io_queues; i++)
1159 ena_free_rx_bufs(adapter, i);
1160}
1161
1162static void ena_unmap_tx_buff(struct ena_ring *tx_ring,
1163 struct ena_tx_buffer *tx_info)
1164{
1165 struct ena_com_buf *ena_buf;
1166 u32 cnt;
1167 int i;
1168
1169 ena_buf = tx_info->bufs;
1170 cnt = tx_info->num_of_bufs;
1171
1172 if (unlikely(!cnt))
1173 return;
1174
1175 if (tx_info->map_linear_data) {
1176 dma_unmap_single(tx_ring->dev,
1177 dma_unmap_addr(ena_buf, paddr),
1178 dma_unmap_len(ena_buf, len),
1179 DMA_TO_DEVICE);
1180 ena_buf++;
1181 cnt--;
1182 }
1183
1184
1185 for (i = 0; i < cnt; i++) {
1186 dma_unmap_page(tx_ring->dev, dma_unmap_addr(ena_buf, paddr),
1187 dma_unmap_len(ena_buf, len), DMA_TO_DEVICE);
1188 ena_buf++;
1189 }
1190}
1191
1192
1193
1194
1195static void ena_free_tx_bufs(struct ena_ring *tx_ring)
1196{
1197 bool print_once = true;
1198 u32 i;
1199
1200 for (i = 0; i < tx_ring->ring_size; i++) {
1201 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i];
1202
1203 if (!tx_info->skb)
1204 continue;
1205
1206 if (print_once) {
1207 netif_notice(tx_ring->adapter, ifdown, tx_ring->netdev,
1208 "Free uncompleted tx skb qid %d idx 0x%x\n",
1209 tx_ring->qid, i);
1210 print_once = false;
1211 } else {
1212 netif_dbg(tx_ring->adapter, ifdown, tx_ring->netdev,
1213 "Free uncompleted tx skb qid %d idx 0x%x\n",
1214 tx_ring->qid, i);
1215 }
1216
1217 ena_unmap_tx_buff(tx_ring, tx_info);
1218
1219 dev_kfree_skb_any(tx_info->skb);
1220 }
1221 netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring->netdev,
1222 tx_ring->qid));
1223}
1224
1225static void ena_free_all_tx_bufs(struct ena_adapter *adapter)
1226{
1227 struct ena_ring *tx_ring;
1228 int i;
1229
1230 for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) {
1231 tx_ring = &adapter->tx_ring[i];
1232 ena_free_tx_bufs(tx_ring);
1233 }
1234}
1235
1236static void ena_destroy_all_tx_queues(struct ena_adapter *adapter)
1237{
1238 u16 ena_qid;
1239 int i;
1240
1241 for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) {
1242 ena_qid = ENA_IO_TXQ_IDX(i);
1243 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
1244 }
1245}
1246
1247static void ena_destroy_all_rx_queues(struct ena_adapter *adapter)
1248{
1249 u16 ena_qid;
1250 int i;
1251
1252 for (i = 0; i < adapter->num_io_queues; i++) {
1253 ena_qid = ENA_IO_RXQ_IDX(i);
1254 cancel_work_sync(&adapter->ena_napi[i].dim.work);
1255 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
1256 }
1257}
1258
1259static void ena_destroy_all_io_queues(struct ena_adapter *adapter)
1260{
1261 ena_destroy_all_tx_queues(adapter);
1262 ena_destroy_all_rx_queues(adapter);
1263}
1264
1265static int handle_invalid_req_id(struct ena_ring *ring, u16 req_id,
1266 struct ena_tx_buffer *tx_info, bool is_xdp)
1267{
1268 if (tx_info)
1269 netif_err(ring->adapter,
1270 tx_done,
1271 ring->netdev,
1272 "tx_info doesn't have valid %s",
1273 is_xdp ? "xdp frame" : "skb");
1274 else
1275 netif_err(ring->adapter,
1276 tx_done,
1277 ring->netdev,
1278 "Invalid req_id: %hu\n",
1279 req_id);
1280
1281 ena_increase_stat(&ring->tx_stats.bad_req_id, 1, &ring->syncp);
1282
1283
1284 ring->adapter->reset_reason = ENA_REGS_RESET_INV_TX_REQ_ID;
1285 set_bit(ENA_FLAG_TRIGGER_RESET, &ring->adapter->flags);
1286 return -EFAULT;
1287}
1288
1289static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id)
1290{
1291 struct ena_tx_buffer *tx_info = NULL;
1292
1293 if (likely(req_id < tx_ring->ring_size)) {
1294 tx_info = &tx_ring->tx_buffer_info[req_id];
1295 if (likely(tx_info->skb))
1296 return 0;
1297 }
1298
1299 return handle_invalid_req_id(tx_ring, req_id, tx_info, false);
1300}
1301
1302static int validate_xdp_req_id(struct ena_ring *xdp_ring, u16 req_id)
1303{
1304 struct ena_tx_buffer *tx_info = NULL;
1305
1306 if (likely(req_id < xdp_ring->ring_size)) {
1307 tx_info = &xdp_ring->tx_buffer_info[req_id];
1308 if (likely(tx_info->xdpf))
1309 return 0;
1310 }
1311
1312 return handle_invalid_req_id(xdp_ring, req_id, tx_info, true);
1313}
1314
1315static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget)
1316{
1317 struct netdev_queue *txq;
1318 bool above_thresh;
1319 u32 tx_bytes = 0;
1320 u32 total_done = 0;
1321 u16 next_to_clean;
1322 u16 req_id;
1323 int tx_pkts = 0;
1324 int rc;
1325
1326 next_to_clean = tx_ring->next_to_clean;
1327 txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->qid);
1328
1329 while (tx_pkts < budget) {
1330 struct ena_tx_buffer *tx_info;
1331 struct sk_buff *skb;
1332
1333 rc = ena_com_tx_comp_req_id_get(tx_ring->ena_com_io_cq,
1334 &req_id);
1335 if (rc)
1336 break;
1337
1338 rc = validate_tx_req_id(tx_ring, req_id);
1339 if (rc)
1340 break;
1341
1342 tx_info = &tx_ring->tx_buffer_info[req_id];
1343 skb = tx_info->skb;
1344
1345
1346 prefetch(&skb->end);
1347
1348 tx_info->skb = NULL;
1349 tx_info->last_jiffies = 0;
1350
1351 ena_unmap_tx_buff(tx_ring, tx_info);
1352
1353 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
1354 "tx_poll: q %d skb %p completed\n", tx_ring->qid,
1355 skb);
1356
1357 tx_bytes += skb->len;
1358 dev_kfree_skb(skb);
1359 tx_pkts++;
1360 total_done += tx_info->tx_descs;
1361
1362 tx_ring->free_ids[next_to_clean] = req_id;
1363 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,
1364 tx_ring->ring_size);
1365 }
1366
1367 tx_ring->next_to_clean = next_to_clean;
1368 ena_com_comp_ack(tx_ring->ena_com_io_sq, total_done);
1369 ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq);
1370
1371 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes);
1372
1373 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
1374 "tx_poll: q %d done. total pkts: %d\n",
1375 tx_ring->qid, tx_pkts);
1376
1377
1378
1379
1380 smp_mb();
1381
1382 above_thresh = ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
1383 ENA_TX_WAKEUP_THRESH);
1384 if (unlikely(netif_tx_queue_stopped(txq) && above_thresh)) {
1385 __netif_tx_lock(txq, smp_processor_id());
1386 above_thresh =
1387 ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
1388 ENA_TX_WAKEUP_THRESH);
1389 if (netif_tx_queue_stopped(txq) && above_thresh &&
1390 test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags)) {
1391 netif_tx_wake_queue(txq);
1392 ena_increase_stat(&tx_ring->tx_stats.queue_wakeup, 1,
1393 &tx_ring->syncp);
1394 }
1395 __netif_tx_unlock(txq);
1396 }
1397
1398 return tx_pkts;
1399}
1400
1401static struct sk_buff *ena_alloc_skb(struct ena_ring *rx_ring, void *first_frag)
1402{
1403 struct sk_buff *skb;
1404
1405 if (!first_frag)
1406 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
1407 rx_ring->rx_copybreak);
1408 else
1409 skb = build_skb(first_frag, ENA_PAGE_SIZE);
1410
1411 if (unlikely(!skb)) {
1412 ena_increase_stat(&rx_ring->rx_stats.skb_alloc_fail, 1,
1413 &rx_ring->syncp);
1414
1415 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
1416 "Failed to allocate skb. first_frag %s\n",
1417 first_frag ? "provided" : "not provided");
1418 return NULL;
1419 }
1420
1421 return skb;
1422}
1423
1424static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring,
1425 struct ena_com_rx_buf_info *ena_bufs,
1426 u32 descs,
1427 u16 *next_to_clean)
1428{
1429 struct ena_rx_buffer *rx_info;
1430 u16 len, req_id, buf = 0;
1431 struct sk_buff *skb;
1432 void *page_addr;
1433 u32 page_offset;
1434 void *data_addr;
1435
1436 len = ena_bufs[buf].len;
1437 req_id = ena_bufs[buf].req_id;
1438
1439 rx_info = &rx_ring->rx_buffer_info[req_id];
1440
1441 if (unlikely(!rx_info->page)) {
1442 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
1443 "Page is NULL\n");
1444 return NULL;
1445 }
1446
1447 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1448 "rx_info %p page %p\n",
1449 rx_info, rx_info->page);
1450
1451
1452 page_addr = page_address(rx_info->page);
1453 page_offset = rx_info->page_offset;
1454 data_addr = page_addr + page_offset;
1455
1456 prefetch(data_addr);
1457
1458 if (len <= rx_ring->rx_copybreak) {
1459 skb = ena_alloc_skb(rx_ring, NULL);
1460 if (unlikely(!skb))
1461 return NULL;
1462
1463 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1464 "RX allocated small packet. len %d. data_len %d\n",
1465 skb->len, skb->data_len);
1466
1467
1468 dma_sync_single_for_cpu(rx_ring->dev,
1469 dma_unmap_addr(&rx_info->ena_buf, paddr),
1470 len,
1471 DMA_FROM_DEVICE);
1472 skb_copy_to_linear_data(skb, data_addr, len);
1473 dma_sync_single_for_device(rx_ring->dev,
1474 dma_unmap_addr(&rx_info->ena_buf, paddr),
1475 len,
1476 DMA_FROM_DEVICE);
1477
1478 skb_put(skb, len);
1479 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
1480 rx_ring->free_ids[*next_to_clean] = req_id;
1481 *next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs,
1482 rx_ring->ring_size);
1483 return skb;
1484 }
1485
1486 ena_unmap_rx_buff(rx_ring, rx_info);
1487
1488 skb = ena_alloc_skb(rx_ring, page_addr);
1489 if (unlikely(!skb))
1490 return NULL;
1491
1492
1493 skb_reserve(skb, page_offset);
1494 skb_put(skb, len);
1495 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
1496
1497 do {
1498 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1499 "RX skb updated. len %d. data_len %d\n",
1500 skb->len, skb->data_len);
1501
1502 rx_info->page = NULL;
1503
1504 rx_ring->free_ids[*next_to_clean] = req_id;
1505 *next_to_clean =
1506 ENA_RX_RING_IDX_NEXT(*next_to_clean,
1507 rx_ring->ring_size);
1508 if (likely(--descs == 0))
1509 break;
1510
1511 buf++;
1512 len = ena_bufs[buf].len;
1513 req_id = ena_bufs[buf].req_id;
1514
1515 rx_info = &rx_ring->rx_buffer_info[req_id];
1516
1517 ena_unmap_rx_buff(rx_ring, rx_info);
1518
1519 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page,
1520 rx_info->page_offset, len, ENA_PAGE_SIZE);
1521
1522 } while (1);
1523
1524 return skb;
1525}
1526
1527
1528
1529
1530
1531
1532static void ena_rx_checksum(struct ena_ring *rx_ring,
1533 struct ena_com_rx_ctx *ena_rx_ctx,
1534 struct sk_buff *skb)
1535{
1536
1537 if (unlikely(!(rx_ring->netdev->features & NETIF_F_RXCSUM))) {
1538 skb->ip_summed = CHECKSUM_NONE;
1539 return;
1540 }
1541
1542
1543 if (ena_rx_ctx->frag) {
1544 skb->ip_summed = CHECKSUM_NONE;
1545 return;
1546 }
1547
1548
1549 if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) &&
1550 (ena_rx_ctx->l3_csum_err))) {
1551
1552 skb->ip_summed = CHECKSUM_NONE;
1553 ena_increase_stat(&rx_ring->rx_stats.bad_csum, 1,
1554 &rx_ring->syncp);
1555 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
1556 "RX IPv4 header checksum error\n");
1557 return;
1558 }
1559
1560
1561 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
1562 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) {
1563 if (unlikely(ena_rx_ctx->l4_csum_err)) {
1564
1565 ena_increase_stat(&rx_ring->rx_stats.bad_csum, 1,
1566 &rx_ring->syncp);
1567 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
1568 "RX L4 checksum error\n");
1569 skb->ip_summed = CHECKSUM_NONE;
1570 return;
1571 }
1572
1573 if (likely(ena_rx_ctx->l4_csum_checked)) {
1574 skb->ip_summed = CHECKSUM_UNNECESSARY;
1575 ena_increase_stat(&rx_ring->rx_stats.csum_good, 1,
1576 &rx_ring->syncp);
1577 } else {
1578 ena_increase_stat(&rx_ring->rx_stats.csum_unchecked, 1,
1579 &rx_ring->syncp);
1580 skb->ip_summed = CHECKSUM_NONE;
1581 }
1582 } else {
1583 skb->ip_summed = CHECKSUM_NONE;
1584 return;
1585 }
1586
1587}
1588
1589static void ena_set_rx_hash(struct ena_ring *rx_ring,
1590 struct ena_com_rx_ctx *ena_rx_ctx,
1591 struct sk_buff *skb)
1592{
1593 enum pkt_hash_types hash_type;
1594
1595 if (likely(rx_ring->netdev->features & NETIF_F_RXHASH)) {
1596 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
1597 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP)))
1598
1599 hash_type = PKT_HASH_TYPE_L4;
1600 else
1601 hash_type = PKT_HASH_TYPE_NONE;
1602
1603
1604 if (ena_rx_ctx->frag)
1605 hash_type = PKT_HASH_TYPE_NONE;
1606
1607 skb_set_hash(skb, ena_rx_ctx->hash, hash_type);
1608 }
1609}
1610
1611static int ena_xdp_handle_buff(struct ena_ring *rx_ring, struct xdp_buff *xdp)
1612{
1613 struct ena_rx_buffer *rx_info;
1614 int ret;
1615
1616 rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id];
1617 xdp_prepare_buff(xdp, page_address(rx_info->page),
1618 rx_info->page_offset,
1619 rx_ring->ena_bufs[0].len, false);
1620
1621
1622
1623 if (unlikely(rx_ring->ena_bufs[0].len > ENA_XDP_MAX_MTU))
1624 return XDP_DROP;
1625
1626 ret = ena_xdp_execute(rx_ring, xdp);
1627
1628
1629 if (ret == XDP_PASS) {
1630 rx_info->page_offset = xdp->data - xdp->data_hard_start;
1631 rx_ring->ena_bufs[0].len = xdp->data_end - xdp->data;
1632 }
1633
1634 return ret;
1635}
1636
1637
1638
1639
1640
1641
1642
1643static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi,
1644 u32 budget)
1645{
1646 u16 next_to_clean = rx_ring->next_to_clean;
1647 struct ena_com_rx_ctx ena_rx_ctx;
1648 struct ena_rx_buffer *rx_info;
1649 struct ena_adapter *adapter;
1650 u32 res_budget, work_done;
1651 int rx_copybreak_pkt = 0;
1652 int refill_threshold;
1653 struct sk_buff *skb;
1654 int refill_required;
1655 struct xdp_buff xdp;
1656 int xdp_flags = 0;
1657 int total_len = 0;
1658 int xdp_verdict;
1659 int rc = 0;
1660 int i;
1661
1662 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1663 "%s qid %d\n", __func__, rx_ring->qid);
1664 res_budget = budget;
1665 xdp_init_buff(&xdp, ENA_PAGE_SIZE, &rx_ring->xdp_rxq);
1666
1667 do {
1668 xdp_verdict = XDP_PASS;
1669 skb = NULL;
1670 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs;
1671 ena_rx_ctx.max_bufs = rx_ring->sgl_size;
1672 ena_rx_ctx.descs = 0;
1673 ena_rx_ctx.pkt_offset = 0;
1674 rc = ena_com_rx_pkt(rx_ring->ena_com_io_cq,
1675 rx_ring->ena_com_io_sq,
1676 &ena_rx_ctx);
1677 if (unlikely(rc))
1678 goto error;
1679
1680 if (unlikely(ena_rx_ctx.descs == 0))
1681 break;
1682
1683
1684 rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id];
1685 rx_info->page_offset += ena_rx_ctx.pkt_offset;
1686
1687 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1688 "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n",
1689 rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto,
1690 ena_rx_ctx.l4_proto, ena_rx_ctx.hash);
1691
1692 if (ena_xdp_present_ring(rx_ring))
1693 xdp_verdict = ena_xdp_handle_buff(rx_ring, &xdp);
1694
1695
1696 if (xdp_verdict == XDP_PASS)
1697 skb = ena_rx_skb(rx_ring,
1698 rx_ring->ena_bufs,
1699 ena_rx_ctx.descs,
1700 &next_to_clean);
1701
1702 if (unlikely(!skb)) {
1703 for (i = 0; i < ena_rx_ctx.descs; i++) {
1704 int req_id = rx_ring->ena_bufs[i].req_id;
1705
1706 rx_ring->free_ids[next_to_clean] = req_id;
1707 next_to_clean =
1708 ENA_RX_RING_IDX_NEXT(next_to_clean,
1709 rx_ring->ring_size);
1710
1711
1712
1713
1714 if (xdp_verdict == XDP_TX || xdp_verdict == XDP_REDIRECT) {
1715 ena_unmap_rx_buff(rx_ring,
1716 &rx_ring->rx_buffer_info[req_id]);
1717 rx_ring->rx_buffer_info[req_id].page = NULL;
1718 }
1719 }
1720 if (xdp_verdict != XDP_PASS) {
1721 xdp_flags |= xdp_verdict;
1722 res_budget--;
1723 continue;
1724 }
1725 break;
1726 }
1727
1728 ena_rx_checksum(rx_ring, &ena_rx_ctx, skb);
1729
1730 ena_set_rx_hash(rx_ring, &ena_rx_ctx, skb);
1731
1732 skb_record_rx_queue(skb, rx_ring->qid);
1733
1734 if (rx_ring->ena_bufs[0].len <= rx_ring->rx_copybreak)
1735 rx_copybreak_pkt++;
1736
1737 total_len += skb->len;
1738
1739 napi_gro_receive(napi, skb);
1740
1741 res_budget--;
1742 } while (likely(res_budget));
1743
1744 work_done = budget - res_budget;
1745 rx_ring->per_napi_packets += work_done;
1746 u64_stats_update_begin(&rx_ring->syncp);
1747 rx_ring->rx_stats.bytes += total_len;
1748 rx_ring->rx_stats.cnt += work_done;
1749 rx_ring->rx_stats.rx_copybreak_pkt += rx_copybreak_pkt;
1750 u64_stats_update_end(&rx_ring->syncp);
1751
1752 rx_ring->next_to_clean = next_to_clean;
1753
1754 refill_required = ena_com_free_q_entries(rx_ring->ena_com_io_sq);
1755 refill_threshold =
1756 min_t(int, rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER,
1757 ENA_RX_REFILL_THRESH_PACKET);
1758
1759
1760 if (refill_required > refill_threshold) {
1761 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq);
1762 ena_refill_rx_bufs(rx_ring, refill_required);
1763 }
1764
1765 if (xdp_flags & XDP_REDIRECT)
1766 xdp_do_flush_map();
1767
1768 return work_done;
1769
1770error:
1771 adapter = netdev_priv(rx_ring->netdev);
1772
1773 if (rc == -ENOSPC) {
1774 ena_increase_stat(&rx_ring->rx_stats.bad_desc_num, 1,
1775 &rx_ring->syncp);
1776 adapter->reset_reason = ENA_REGS_RESET_TOO_MANY_RX_DESCS;
1777 } else {
1778 ena_increase_stat(&rx_ring->rx_stats.bad_req_id, 1,
1779 &rx_ring->syncp);
1780 adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID;
1781 }
1782
1783 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
1784
1785 return 0;
1786}
1787
1788static void ena_dim_work(struct work_struct *w)
1789{
1790 struct dim *dim = container_of(w, struct dim, work);
1791 struct dim_cq_moder cur_moder =
1792 net_dim_get_rx_moderation(dim->mode, dim->profile_ix);
1793 struct ena_napi *ena_napi = container_of(dim, struct ena_napi, dim);
1794
1795 ena_napi->rx_ring->smoothed_interval = cur_moder.usec;
1796 dim->state = DIM_START_MEASURE;
1797}
1798
1799static void ena_adjust_adaptive_rx_intr_moderation(struct ena_napi *ena_napi)
1800{
1801 struct dim_sample dim_sample;
1802 struct ena_ring *rx_ring = ena_napi->rx_ring;
1803
1804 if (!rx_ring->per_napi_packets)
1805 return;
1806
1807 rx_ring->non_empty_napi_events++;
1808
1809 dim_update_sample(rx_ring->non_empty_napi_events,
1810 rx_ring->rx_stats.cnt,
1811 rx_ring->rx_stats.bytes,
1812 &dim_sample);
1813
1814 net_dim(&ena_napi->dim, dim_sample);
1815
1816 rx_ring->per_napi_packets = 0;
1817}
1818
1819static void ena_unmask_interrupt(struct ena_ring *tx_ring,
1820 struct ena_ring *rx_ring)
1821{
1822 struct ena_eth_io_intr_reg intr_reg;
1823 u32 rx_interval = 0;
1824
1825
1826
1827 if (rx_ring)
1828 rx_interval = ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev) ?
1829 rx_ring->smoothed_interval :
1830 ena_com_get_nonadaptive_moderation_interval_rx(rx_ring->ena_dev);
1831
1832
1833
1834
1835 ena_com_update_intr_reg(&intr_reg,
1836 rx_interval,
1837 tx_ring->smoothed_interval,
1838 true);
1839
1840 ena_increase_stat(&tx_ring->tx_stats.unmask_interrupt, 1,
1841 &tx_ring->syncp);
1842
1843
1844
1845
1846
1847
1848 ena_com_unmask_intr(tx_ring->ena_com_io_cq, &intr_reg);
1849}
1850
1851static void ena_update_ring_numa_node(struct ena_ring *tx_ring,
1852 struct ena_ring *rx_ring)
1853{
1854 int cpu = get_cpu();
1855 int numa_node;
1856
1857
1858 if (likely(tx_ring->cpu == cpu))
1859 goto out;
1860
1861 numa_node = cpu_to_node(cpu);
1862 put_cpu();
1863
1864 if (numa_node != NUMA_NO_NODE) {
1865 ena_com_update_numa_node(tx_ring->ena_com_io_cq, numa_node);
1866 if (rx_ring)
1867 ena_com_update_numa_node(rx_ring->ena_com_io_cq,
1868 numa_node);
1869 }
1870
1871 tx_ring->cpu = cpu;
1872 if (rx_ring)
1873 rx_ring->cpu = cpu;
1874
1875 return;
1876out:
1877 put_cpu();
1878}
1879
1880static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget)
1881{
1882 u32 total_done = 0;
1883 u16 next_to_clean;
1884 u32 tx_bytes = 0;
1885 int tx_pkts = 0;
1886 u16 req_id;
1887 int rc;
1888
1889 if (unlikely(!xdp_ring))
1890 return 0;
1891 next_to_clean = xdp_ring->next_to_clean;
1892
1893 while (tx_pkts < budget) {
1894 struct ena_tx_buffer *tx_info;
1895 struct xdp_frame *xdpf;
1896
1897 rc = ena_com_tx_comp_req_id_get(xdp_ring->ena_com_io_cq,
1898 &req_id);
1899 if (rc)
1900 break;
1901
1902 rc = validate_xdp_req_id(xdp_ring, req_id);
1903 if (rc)
1904 break;
1905
1906 tx_info = &xdp_ring->tx_buffer_info[req_id];
1907 xdpf = tx_info->xdpf;
1908
1909 tx_info->xdpf = NULL;
1910 tx_info->last_jiffies = 0;
1911 ena_unmap_tx_buff(xdp_ring, tx_info);
1912
1913 netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev,
1914 "tx_poll: q %d skb %p completed\n", xdp_ring->qid,
1915 xdpf);
1916
1917 tx_bytes += xdpf->len;
1918 tx_pkts++;
1919 total_done += tx_info->tx_descs;
1920
1921 xdp_return_frame(xdpf);
1922 xdp_ring->free_ids[next_to_clean] = req_id;
1923 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,
1924 xdp_ring->ring_size);
1925 }
1926
1927 xdp_ring->next_to_clean = next_to_clean;
1928 ena_com_comp_ack(xdp_ring->ena_com_io_sq, total_done);
1929 ena_com_update_dev_comp_head(xdp_ring->ena_com_io_cq);
1930
1931 netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev,
1932 "tx_poll: q %d done. total pkts: %d\n",
1933 xdp_ring->qid, tx_pkts);
1934
1935 return tx_pkts;
1936}
1937
1938static int ena_io_poll(struct napi_struct *napi, int budget)
1939{
1940 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi);
1941 struct ena_ring *tx_ring, *rx_ring;
1942 int tx_work_done;
1943 int rx_work_done = 0;
1944 int tx_budget;
1945 int napi_comp_call = 0;
1946 int ret;
1947
1948 tx_ring = ena_napi->tx_ring;
1949 rx_ring = ena_napi->rx_ring;
1950
1951 tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER;
1952
1953 if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
1954 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags)) {
1955 napi_complete_done(napi, 0);
1956 return 0;
1957 }
1958
1959 tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget);
1960
1961
1962
1963 if (likely(budget))
1964 rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget);
1965
1966
1967
1968
1969 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
1970 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags))) {
1971 napi_complete_done(napi, 0);
1972 ret = 0;
1973
1974 } else if ((budget > rx_work_done) && (tx_budget > tx_work_done)) {
1975 napi_comp_call = 1;
1976
1977
1978
1979
1980 if (napi_complete_done(napi, rx_work_done) &&
1981 READ_ONCE(ena_napi->interrupts_masked)) {
1982 smp_rmb();
1983 WRITE_ONCE(ena_napi->interrupts_masked, false);
1984
1985
1986
1987 if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev))
1988 ena_adjust_adaptive_rx_intr_moderation(ena_napi);
1989
1990 ena_unmask_interrupt(tx_ring, rx_ring);
1991 }
1992
1993 ena_update_ring_numa_node(tx_ring, rx_ring);
1994
1995 ret = rx_work_done;
1996 } else {
1997 ret = budget;
1998 }
1999
2000 u64_stats_update_begin(&tx_ring->syncp);
2001 tx_ring->tx_stats.napi_comp += napi_comp_call;
2002 tx_ring->tx_stats.tx_poll++;
2003 u64_stats_update_end(&tx_ring->syncp);
2004
2005 tx_ring->tx_stats.last_napi_jiffies = jiffies;
2006
2007 return ret;
2008}
2009
2010static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data)
2011{
2012 struct ena_adapter *adapter = (struct ena_adapter *)data;
2013
2014 ena_com_admin_q_comp_intr_handler(adapter->ena_dev);
2015
2016
2017 if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)))
2018 ena_com_aenq_intr_handler(adapter->ena_dev, data);
2019
2020 return IRQ_HANDLED;
2021}
2022
2023
2024
2025
2026
2027static irqreturn_t ena_intr_msix_io(int irq, void *data)
2028{
2029 struct ena_napi *ena_napi = data;
2030
2031
2032 WRITE_ONCE(ena_napi->first_interrupt, true);
2033
2034 WRITE_ONCE(ena_napi->interrupts_masked, true);
2035 smp_wmb();
2036
2037 napi_schedule_irqoff(&ena_napi->napi);
2038
2039 return IRQ_HANDLED;
2040}
2041
2042
2043
2044
2045
2046
2047static int ena_enable_msix(struct ena_adapter *adapter)
2048{
2049 int msix_vecs, irq_cnt;
2050
2051 if (test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
2052 netif_err(adapter, probe, adapter->netdev,
2053 "Error, MSI-X is already enabled\n");
2054 return -EPERM;
2055 }
2056
2057
2058 msix_vecs = ENA_MAX_MSIX_VEC(adapter->max_num_io_queues);
2059 netif_dbg(adapter, probe, adapter->netdev,
2060 "Trying to enable MSI-X, vectors %d\n", msix_vecs);
2061
2062 irq_cnt = pci_alloc_irq_vectors(adapter->pdev, ENA_MIN_MSIX_VEC,
2063 msix_vecs, PCI_IRQ_MSIX);
2064
2065 if (irq_cnt < 0) {
2066 netif_err(adapter, probe, adapter->netdev,
2067 "Failed to enable MSI-X. irq_cnt %d\n", irq_cnt);
2068 return -ENOSPC;
2069 }
2070
2071 if (irq_cnt != msix_vecs) {
2072 netif_notice(adapter, probe, adapter->netdev,
2073 "Enable only %d MSI-X (out of %d), reduce the number of queues\n",
2074 irq_cnt, msix_vecs);
2075 adapter->num_io_queues = irq_cnt - ENA_ADMIN_MSIX_VEC;
2076 }
2077
2078 if (ena_init_rx_cpu_rmap(adapter))
2079 netif_warn(adapter, probe, adapter->netdev,
2080 "Failed to map IRQs to CPUs\n");
2081
2082 adapter->msix_vecs = irq_cnt;
2083 set_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags);
2084
2085 return 0;
2086}
2087
2088static void ena_setup_mgmnt_intr(struct ena_adapter *adapter)
2089{
2090 u32 cpu;
2091
2092 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name,
2093 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s",
2094 pci_name(adapter->pdev));
2095 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler =
2096 ena_intr_msix_mgmnt;
2097 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter;
2098 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector =
2099 pci_irq_vector(adapter->pdev, ENA_MGMNT_IRQ_IDX);
2100 cpu = cpumask_first(cpu_online_mask);
2101 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu;
2102 cpumask_set_cpu(cpu,
2103 &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask);
2104}
2105
2106static void ena_setup_io_intr(struct ena_adapter *adapter)
2107{
2108 struct net_device *netdev;
2109 int irq_idx, i, cpu;
2110 int io_queue_count;
2111
2112 netdev = adapter->netdev;
2113 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2114
2115 for (i = 0; i < io_queue_count; i++) {
2116 irq_idx = ENA_IO_IRQ_IDX(i);
2117 cpu = i % num_online_cpus();
2118
2119 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE,
2120 "%s-Tx-Rx-%d", netdev->name, i);
2121 adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io;
2122 adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i];
2123 adapter->irq_tbl[irq_idx].vector =
2124 pci_irq_vector(adapter->pdev, irq_idx);
2125 adapter->irq_tbl[irq_idx].cpu = cpu;
2126
2127 cpumask_set_cpu(cpu,
2128 &adapter->irq_tbl[irq_idx].affinity_hint_mask);
2129 }
2130}
2131
2132static int ena_request_mgmnt_irq(struct ena_adapter *adapter)
2133{
2134 unsigned long flags = 0;
2135 struct ena_irq *irq;
2136 int rc;
2137
2138 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
2139 rc = request_irq(irq->vector, irq->handler, flags, irq->name,
2140 irq->data);
2141 if (rc) {
2142 netif_err(adapter, probe, adapter->netdev,
2143 "Failed to request admin irq\n");
2144 return rc;
2145 }
2146
2147 netif_dbg(adapter, probe, adapter->netdev,
2148 "Set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n",
2149 irq->affinity_hint_mask.bits[0], irq->vector);
2150
2151 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
2152
2153 return rc;
2154}
2155
2156static int ena_request_io_irq(struct ena_adapter *adapter)
2157{
2158 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2159 unsigned long flags = 0;
2160 struct ena_irq *irq;
2161 int rc = 0, i, k;
2162
2163 if (!test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
2164 netif_err(adapter, ifup, adapter->netdev,
2165 "Failed to request I/O IRQ: MSI-X is not enabled\n");
2166 return -EINVAL;
2167 }
2168
2169 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) {
2170 irq = &adapter->irq_tbl[i];
2171 rc = request_irq(irq->vector, irq->handler, flags, irq->name,
2172 irq->data);
2173 if (rc) {
2174 netif_err(adapter, ifup, adapter->netdev,
2175 "Failed to request I/O IRQ. index %d rc %d\n",
2176 i, rc);
2177 goto err;
2178 }
2179
2180 netif_dbg(adapter, ifup, adapter->netdev,
2181 "Set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n",
2182 i, irq->affinity_hint_mask.bits[0], irq->vector);
2183
2184 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
2185 }
2186
2187 return rc;
2188
2189err:
2190 for (k = ENA_IO_IRQ_FIRST_IDX; k < i; k++) {
2191 irq = &adapter->irq_tbl[k];
2192 free_irq(irq->vector, irq->data);
2193 }
2194
2195 return rc;
2196}
2197
2198static void ena_free_mgmnt_irq(struct ena_adapter *adapter)
2199{
2200 struct ena_irq *irq;
2201
2202 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
2203 synchronize_irq(irq->vector);
2204 irq_set_affinity_hint(irq->vector, NULL);
2205 free_irq(irq->vector, irq->data);
2206}
2207
2208static void ena_free_io_irq(struct ena_adapter *adapter)
2209{
2210 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2211 struct ena_irq *irq;
2212 int i;
2213
2214#ifdef CONFIG_RFS_ACCEL
2215 if (adapter->msix_vecs >= 1) {
2216 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
2217 adapter->netdev->rx_cpu_rmap = NULL;
2218 }
2219#endif
2220
2221 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++) {
2222 irq = &adapter->irq_tbl[i];
2223 irq_set_affinity_hint(irq->vector, NULL);
2224 free_irq(irq->vector, irq->data);
2225 }
2226}
2227
2228static void ena_disable_msix(struct ena_adapter *adapter)
2229{
2230 if (test_and_clear_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags))
2231 pci_free_irq_vectors(adapter->pdev);
2232}
2233
2234static void ena_disable_io_intr_sync(struct ena_adapter *adapter)
2235{
2236 u32 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2237 int i;
2238
2239 if (!netif_running(adapter->netdev))
2240 return;
2241
2242 for (i = ENA_IO_IRQ_FIRST_IDX; i < ENA_MAX_MSIX_VEC(io_queue_count); i++)
2243 synchronize_irq(adapter->irq_tbl[i].vector);
2244}
2245
2246static void ena_del_napi_in_range(struct ena_adapter *adapter,
2247 int first_index,
2248 int count)
2249{
2250 int i;
2251
2252 for (i = first_index; i < first_index + count; i++) {
2253 netif_napi_del(&adapter->ena_napi[i].napi);
2254
2255 WARN_ON(!ENA_IS_XDP_INDEX(adapter, i) &&
2256 adapter->ena_napi[i].xdp_ring);
2257 }
2258}
2259
2260static void ena_init_napi_in_range(struct ena_adapter *adapter,
2261 int first_index, int count)
2262{
2263 int i;
2264
2265 for (i = first_index; i < first_index + count; i++) {
2266 struct ena_napi *napi = &adapter->ena_napi[i];
2267
2268 netif_napi_add(adapter->netdev,
2269 &napi->napi,
2270 ENA_IS_XDP_INDEX(adapter, i) ? ena_xdp_io_poll : ena_io_poll,
2271 ENA_NAPI_BUDGET);
2272
2273 if (!ENA_IS_XDP_INDEX(adapter, i)) {
2274 napi->rx_ring = &adapter->rx_ring[i];
2275 napi->tx_ring = &adapter->tx_ring[i];
2276 } else {
2277 napi->xdp_ring = &adapter->tx_ring[i];
2278 }
2279 napi->qid = i;
2280 }
2281}
2282
2283static void ena_napi_disable_in_range(struct ena_adapter *adapter,
2284 int first_index,
2285 int count)
2286{
2287 int i;
2288
2289 for (i = first_index; i < first_index + count; i++)
2290 napi_disable(&adapter->ena_napi[i].napi);
2291}
2292
2293static void ena_napi_enable_in_range(struct ena_adapter *adapter,
2294 int first_index,
2295 int count)
2296{
2297 int i;
2298
2299 for (i = first_index; i < first_index + count; i++)
2300 napi_enable(&adapter->ena_napi[i].napi);
2301}
2302
2303
2304static int ena_rss_configure(struct ena_adapter *adapter)
2305{
2306 struct ena_com_dev *ena_dev = adapter->ena_dev;
2307 int rc;
2308
2309
2310 if (!ena_dev->rss.tbl_log_size) {
2311 rc = ena_rss_init_default(adapter);
2312 if (rc && (rc != -EOPNOTSUPP)) {
2313 netif_err(adapter, ifup, adapter->netdev,
2314 "Failed to init RSS rc: %d\n", rc);
2315 return rc;
2316 }
2317 }
2318
2319
2320 rc = ena_com_indirect_table_set(ena_dev);
2321 if (unlikely(rc && rc != -EOPNOTSUPP))
2322 return rc;
2323
2324
2325 rc = ena_com_set_hash_function(ena_dev);
2326 if (unlikely(rc && (rc != -EOPNOTSUPP)))
2327 return rc;
2328
2329
2330 rc = ena_com_set_hash_ctrl(ena_dev);
2331 if (unlikely(rc && (rc != -EOPNOTSUPP)))
2332 return rc;
2333
2334 return 0;
2335}
2336
2337static int ena_up_complete(struct ena_adapter *adapter)
2338{
2339 int rc;
2340
2341 rc = ena_rss_configure(adapter);
2342 if (rc)
2343 return rc;
2344
2345 ena_change_mtu(adapter->netdev, adapter->netdev->mtu);
2346
2347 ena_refill_all_rx_bufs(adapter);
2348
2349
2350 netif_tx_start_all_queues(adapter->netdev);
2351
2352 ena_napi_enable_in_range(adapter,
2353 0,
2354 adapter->xdp_num_queues + adapter->num_io_queues);
2355
2356 return 0;
2357}
2358
2359static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid)
2360{
2361 struct ena_com_create_io_ctx ctx;
2362 struct ena_com_dev *ena_dev;
2363 struct ena_ring *tx_ring;
2364 u32 msix_vector;
2365 u16 ena_qid;
2366 int rc;
2367
2368 ena_dev = adapter->ena_dev;
2369
2370 tx_ring = &adapter->tx_ring[qid];
2371 msix_vector = ENA_IO_IRQ_IDX(qid);
2372 ena_qid = ENA_IO_TXQ_IDX(qid);
2373
2374 memset(&ctx, 0x0, sizeof(ctx));
2375
2376 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX;
2377 ctx.qid = ena_qid;
2378 ctx.mem_queue_type = ena_dev->tx_mem_queue_type;
2379 ctx.msix_vector = msix_vector;
2380 ctx.queue_size = tx_ring->ring_size;
2381 ctx.numa_node = cpu_to_node(tx_ring->cpu);
2382
2383 rc = ena_com_create_io_queue(ena_dev, &ctx);
2384 if (rc) {
2385 netif_err(adapter, ifup, adapter->netdev,
2386 "Failed to create I/O TX queue num %d rc: %d\n",
2387 qid, rc);
2388 return rc;
2389 }
2390
2391 rc = ena_com_get_io_handlers(ena_dev, ena_qid,
2392 &tx_ring->ena_com_io_sq,
2393 &tx_ring->ena_com_io_cq);
2394 if (rc) {
2395 netif_err(adapter, ifup, adapter->netdev,
2396 "Failed to get TX queue handlers. TX queue num %d rc: %d\n",
2397 qid, rc);
2398 ena_com_destroy_io_queue(ena_dev, ena_qid);
2399 return rc;
2400 }
2401
2402 ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node);
2403 return rc;
2404}
2405
2406static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter,
2407 int first_index, int count)
2408{
2409 struct ena_com_dev *ena_dev = adapter->ena_dev;
2410 int rc, i;
2411
2412 for (i = first_index; i < first_index + count; i++) {
2413 rc = ena_create_io_tx_queue(adapter, i);
2414 if (rc)
2415 goto create_err;
2416 }
2417
2418 return 0;
2419
2420create_err:
2421 while (i-- > first_index)
2422 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i));
2423
2424 return rc;
2425}
2426
2427static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid)
2428{
2429 struct ena_com_dev *ena_dev;
2430 struct ena_com_create_io_ctx ctx;
2431 struct ena_ring *rx_ring;
2432 u32 msix_vector;
2433 u16 ena_qid;
2434 int rc;
2435
2436 ena_dev = adapter->ena_dev;
2437
2438 rx_ring = &adapter->rx_ring[qid];
2439 msix_vector = ENA_IO_IRQ_IDX(qid);
2440 ena_qid = ENA_IO_RXQ_IDX(qid);
2441
2442 memset(&ctx, 0x0, sizeof(ctx));
2443
2444 ctx.qid = ena_qid;
2445 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX;
2446 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
2447 ctx.msix_vector = msix_vector;
2448 ctx.queue_size = rx_ring->ring_size;
2449 ctx.numa_node = cpu_to_node(rx_ring->cpu);
2450
2451 rc = ena_com_create_io_queue(ena_dev, &ctx);
2452 if (rc) {
2453 netif_err(adapter, ifup, adapter->netdev,
2454 "Failed to create I/O RX queue num %d rc: %d\n",
2455 qid, rc);
2456 return rc;
2457 }
2458
2459 rc = ena_com_get_io_handlers(ena_dev, ena_qid,
2460 &rx_ring->ena_com_io_sq,
2461 &rx_ring->ena_com_io_cq);
2462 if (rc) {
2463 netif_err(adapter, ifup, adapter->netdev,
2464 "Failed to get RX queue handlers. RX queue num %d rc: %d\n",
2465 qid, rc);
2466 goto err;
2467 }
2468
2469 ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node);
2470
2471 return rc;
2472err:
2473 ena_com_destroy_io_queue(ena_dev, ena_qid);
2474 return rc;
2475}
2476
2477static int ena_create_all_io_rx_queues(struct ena_adapter *adapter)
2478{
2479 struct ena_com_dev *ena_dev = adapter->ena_dev;
2480 int rc, i;
2481
2482 for (i = 0; i < adapter->num_io_queues; i++) {
2483 rc = ena_create_io_rx_queue(adapter, i);
2484 if (rc)
2485 goto create_err;
2486 INIT_WORK(&adapter->ena_napi[i].dim.work, ena_dim_work);
2487 }
2488
2489 return 0;
2490
2491create_err:
2492 while (i--) {
2493 cancel_work_sync(&adapter->ena_napi[i].dim.work);
2494 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i));
2495 }
2496
2497 return rc;
2498}
2499
2500static void set_io_rings_size(struct ena_adapter *adapter,
2501 int new_tx_size,
2502 int new_rx_size)
2503{
2504 int i;
2505
2506 for (i = 0; i < adapter->num_io_queues; i++) {
2507 adapter->tx_ring[i].ring_size = new_tx_size;
2508 adapter->rx_ring[i].ring_size = new_rx_size;
2509 }
2510}
2511
2512
2513
2514
2515
2516
2517
2518
2519
2520
2521
2522
2523
2524
2525
2526
2527static int create_queues_with_size_backoff(struct ena_adapter *adapter)
2528{
2529 int rc, cur_rx_ring_size, cur_tx_ring_size;
2530 int new_rx_ring_size, new_tx_ring_size;
2531
2532
2533
2534
2535 set_io_rings_size(adapter, adapter->requested_tx_ring_size,
2536 adapter->requested_rx_ring_size);
2537
2538 while (1) {
2539 if (ena_xdp_present(adapter)) {
2540 rc = ena_setup_and_create_all_xdp_queues(adapter);
2541
2542 if (rc)
2543 goto err_setup_tx;
2544 }
2545 rc = ena_setup_tx_resources_in_range(adapter,
2546 0,
2547 adapter->num_io_queues);
2548 if (rc)
2549 goto err_setup_tx;
2550
2551 rc = ena_create_io_tx_queues_in_range(adapter,
2552 0,
2553 adapter->num_io_queues);
2554 if (rc)
2555 goto err_create_tx_queues;
2556
2557 rc = ena_setup_all_rx_resources(adapter);
2558 if (rc)
2559 goto err_setup_rx;
2560
2561 rc = ena_create_all_io_rx_queues(adapter);
2562 if (rc)
2563 goto err_create_rx_queues;
2564
2565 return 0;
2566
2567err_create_rx_queues:
2568 ena_free_all_io_rx_resources(adapter);
2569err_setup_rx:
2570 ena_destroy_all_tx_queues(adapter);
2571err_create_tx_queues:
2572 ena_free_all_io_tx_resources(adapter);
2573err_setup_tx:
2574 if (rc != -ENOMEM) {
2575 netif_err(adapter, ifup, adapter->netdev,
2576 "Queue creation failed with error code %d\n",
2577 rc);
2578 return rc;
2579 }
2580
2581 cur_tx_ring_size = adapter->tx_ring[0].ring_size;
2582 cur_rx_ring_size = adapter->rx_ring[0].ring_size;
2583
2584 netif_err(adapter, ifup, adapter->netdev,
2585 "Not enough memory to create queues with sizes TX=%d, RX=%d\n",
2586 cur_tx_ring_size, cur_rx_ring_size);
2587
2588 new_tx_ring_size = cur_tx_ring_size;
2589 new_rx_ring_size = cur_rx_ring_size;
2590
2591
2592
2593
2594 if (cur_rx_ring_size <= cur_tx_ring_size)
2595 new_tx_ring_size = cur_tx_ring_size / 2;
2596 if (cur_rx_ring_size >= cur_tx_ring_size)
2597 new_rx_ring_size = cur_rx_ring_size / 2;
2598
2599 if (new_tx_ring_size < ENA_MIN_RING_SIZE ||
2600 new_rx_ring_size < ENA_MIN_RING_SIZE) {
2601 netif_err(adapter, ifup, adapter->netdev,
2602 "Queue creation failed with the smallest possible queue size of %d for both queues. Not retrying with smaller queues\n",
2603 ENA_MIN_RING_SIZE);
2604 return rc;
2605 }
2606
2607 netif_err(adapter, ifup, adapter->netdev,
2608 "Retrying queue creation with sizes TX=%d, RX=%d\n",
2609 new_tx_ring_size,
2610 new_rx_ring_size);
2611
2612 set_io_rings_size(adapter, new_tx_ring_size,
2613 new_rx_ring_size);
2614 }
2615}
2616
2617static int ena_up(struct ena_adapter *adapter)
2618{
2619 int io_queue_count, rc, i;
2620
2621 netif_dbg(adapter, ifup, adapter->netdev, "%s\n", __func__);
2622
2623 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2624 ena_setup_io_intr(adapter);
2625
2626
2627
2628
2629
2630
2631 ena_init_napi_in_range(adapter, 0, io_queue_count);
2632
2633 rc = ena_request_io_irq(adapter);
2634 if (rc)
2635 goto err_req_irq;
2636
2637 rc = create_queues_with_size_backoff(adapter);
2638 if (rc)
2639 goto err_create_queues_with_backoff;
2640
2641 rc = ena_up_complete(adapter);
2642 if (rc)
2643 goto err_up;
2644
2645 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
2646 netif_carrier_on(adapter->netdev);
2647
2648 ena_increase_stat(&adapter->dev_stats.interface_up, 1,
2649 &adapter->syncp);
2650
2651 set_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2652
2653
2654 for (i = 0; i < adapter->num_io_queues; i++)
2655 ena_unmask_interrupt(&adapter->tx_ring[i],
2656 &adapter->rx_ring[i]);
2657
2658
2659
2660
2661 for (i = 0; i < io_queue_count; i++)
2662 napi_schedule(&adapter->ena_napi[i].napi);
2663
2664 return rc;
2665
2666err_up:
2667 ena_destroy_all_tx_queues(adapter);
2668 ena_free_all_io_tx_resources(adapter);
2669 ena_destroy_all_rx_queues(adapter);
2670 ena_free_all_io_rx_resources(adapter);
2671err_create_queues_with_backoff:
2672 ena_free_io_irq(adapter);
2673err_req_irq:
2674 ena_del_napi_in_range(adapter, 0, io_queue_count);
2675
2676 return rc;
2677}
2678
2679static void ena_down(struct ena_adapter *adapter)
2680{
2681 int io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2682
2683 netif_info(adapter, ifdown, adapter->netdev, "%s\n", __func__);
2684
2685 clear_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2686
2687 ena_increase_stat(&adapter->dev_stats.interface_down, 1,
2688 &adapter->syncp);
2689
2690 netif_carrier_off(adapter->netdev);
2691 netif_tx_disable(adapter->netdev);
2692
2693
2694 ena_napi_disable_in_range(adapter, 0, io_queue_count);
2695
2696
2697
2698 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) {
2699 int rc;
2700
2701 rc = ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
2702 if (rc)
2703 netif_err(adapter, ifdown, adapter->netdev,
2704 "Device reset failed\n");
2705
2706 ena_com_set_admin_running_state(adapter->ena_dev, false);
2707 }
2708
2709 ena_destroy_all_io_queues(adapter);
2710
2711 ena_disable_io_intr_sync(adapter);
2712 ena_free_io_irq(adapter);
2713 ena_del_napi_in_range(adapter, 0, io_queue_count);
2714
2715 ena_free_all_tx_bufs(adapter);
2716 ena_free_all_rx_bufs(adapter);
2717 ena_free_all_io_tx_resources(adapter);
2718 ena_free_all_io_rx_resources(adapter);
2719}
2720
2721
2722
2723
2724
2725
2726
2727
2728
2729
2730
2731
2732static int ena_open(struct net_device *netdev)
2733{
2734 struct ena_adapter *adapter = netdev_priv(netdev);
2735 int rc;
2736
2737
2738 rc = netif_set_real_num_tx_queues(netdev, adapter->num_io_queues);
2739 if (rc) {
2740 netif_err(adapter, ifup, netdev, "Can't set num tx queues\n");
2741 return rc;
2742 }
2743
2744 rc = netif_set_real_num_rx_queues(netdev, adapter->num_io_queues);
2745 if (rc) {
2746 netif_err(adapter, ifup, netdev, "Can't set num rx queues\n");
2747 return rc;
2748 }
2749
2750 rc = ena_up(adapter);
2751 if (rc)
2752 return rc;
2753
2754 return rc;
2755}
2756
2757
2758
2759
2760
2761
2762
2763
2764
2765
2766
2767static int ena_close(struct net_device *netdev)
2768{
2769 struct ena_adapter *adapter = netdev_priv(netdev);
2770
2771 netif_dbg(adapter, ifdown, netdev, "%s\n", __func__);
2772
2773 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
2774 return 0;
2775
2776 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2777 ena_down(adapter);
2778
2779
2780 check_for_admin_com_state(adapter);
2781 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
2782 netif_err(adapter, ifdown, adapter->netdev,
2783 "Destroy failure, restarting device\n");
2784 ena_dump_stats_to_dmesg(adapter);
2785
2786 ena_destroy_device(adapter, false);
2787 ena_restore_device(adapter);
2788 }
2789
2790 return 0;
2791}
2792
2793int ena_update_queue_sizes(struct ena_adapter *adapter,
2794 u32 new_tx_size,
2795 u32 new_rx_size)
2796{
2797 bool dev_was_up;
2798
2799 dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2800 ena_close(adapter->netdev);
2801 adapter->requested_tx_ring_size = new_tx_size;
2802 adapter->requested_rx_ring_size = new_rx_size;
2803 ena_init_io_rings(adapter,
2804 0,
2805 adapter->xdp_num_queues +
2806 adapter->num_io_queues);
2807 return dev_was_up ? ena_up(adapter) : 0;
2808}
2809
2810int ena_update_queue_count(struct ena_adapter *adapter, u32 new_channel_count)
2811{
2812 struct ena_com_dev *ena_dev = adapter->ena_dev;
2813 int prev_channel_count;
2814 bool dev_was_up;
2815
2816 dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2817 ena_close(adapter->netdev);
2818 prev_channel_count = adapter->num_io_queues;
2819 adapter->num_io_queues = new_channel_count;
2820 if (ena_xdp_present(adapter) &&
2821 ena_xdp_allowed(adapter) == ENA_XDP_ALLOWED) {
2822 adapter->xdp_first_ring = new_channel_count;
2823 adapter->xdp_num_queues = new_channel_count;
2824 if (prev_channel_count > new_channel_count)
2825 ena_xdp_exchange_program_rx_in_range(adapter,
2826 NULL,
2827 new_channel_count,
2828 prev_channel_count);
2829 else
2830 ena_xdp_exchange_program_rx_in_range(adapter,
2831 adapter->xdp_bpf_prog,
2832 prev_channel_count,
2833 new_channel_count);
2834 }
2835
2836
2837
2838
2839 ena_com_rss_destroy(ena_dev);
2840 ena_init_io_rings(adapter,
2841 0,
2842 adapter->xdp_num_queues +
2843 adapter->num_io_queues);
2844 return dev_was_up ? ena_open(adapter->netdev) : 0;
2845}
2846
2847static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx,
2848 struct sk_buff *skb,
2849 bool disable_meta_caching)
2850{
2851 u32 mss = skb_shinfo(skb)->gso_size;
2852 struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta;
2853 u8 l4_protocol = 0;
2854
2855 if ((skb->ip_summed == CHECKSUM_PARTIAL) || mss) {
2856 ena_tx_ctx->l4_csum_enable = 1;
2857 if (mss) {
2858 ena_tx_ctx->tso_enable = 1;
2859 ena_meta->l4_hdr_len = tcp_hdr(skb)->doff;
2860 ena_tx_ctx->l4_csum_partial = 0;
2861 } else {
2862 ena_tx_ctx->tso_enable = 0;
2863 ena_meta->l4_hdr_len = 0;
2864 ena_tx_ctx->l4_csum_partial = 1;
2865 }
2866
2867 switch (ip_hdr(skb)->version) {
2868 case IPVERSION:
2869 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4;
2870 if (ip_hdr(skb)->frag_off & htons(IP_DF))
2871 ena_tx_ctx->df = 1;
2872 if (mss)
2873 ena_tx_ctx->l3_csum_enable = 1;
2874 l4_protocol = ip_hdr(skb)->protocol;
2875 break;
2876 case 6:
2877 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6;
2878 l4_protocol = ipv6_hdr(skb)->nexthdr;
2879 break;
2880 default:
2881 break;
2882 }
2883
2884 if (l4_protocol == IPPROTO_TCP)
2885 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP;
2886 else
2887 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP;
2888
2889 ena_meta->mss = mss;
2890 ena_meta->l3_hdr_len = skb_network_header_len(skb);
2891 ena_meta->l3_hdr_offset = skb_network_offset(skb);
2892 ena_tx_ctx->meta_valid = 1;
2893 } else if (disable_meta_caching) {
2894 memset(ena_meta, 0, sizeof(*ena_meta));
2895 ena_tx_ctx->meta_valid = 1;
2896 } else {
2897 ena_tx_ctx->meta_valid = 0;
2898 }
2899}
2900
2901static int ena_check_and_linearize_skb(struct ena_ring *tx_ring,
2902 struct sk_buff *skb)
2903{
2904 int num_frags, header_len, rc;
2905
2906 num_frags = skb_shinfo(skb)->nr_frags;
2907 header_len = skb_headlen(skb);
2908
2909 if (num_frags < tx_ring->sgl_size)
2910 return 0;
2911
2912 if ((num_frags == tx_ring->sgl_size) &&
2913 (header_len < tx_ring->tx_max_header_size))
2914 return 0;
2915
2916 ena_increase_stat(&tx_ring->tx_stats.linearize, 1, &tx_ring->syncp);
2917
2918 rc = skb_linearize(skb);
2919 if (unlikely(rc)) {
2920 ena_increase_stat(&tx_ring->tx_stats.linearize_failed, 1,
2921 &tx_ring->syncp);
2922 }
2923
2924 return rc;
2925}
2926
2927static int ena_tx_map_skb(struct ena_ring *tx_ring,
2928 struct ena_tx_buffer *tx_info,
2929 struct sk_buff *skb,
2930 void **push_hdr,
2931 u16 *header_len)
2932{
2933 struct ena_adapter *adapter = tx_ring->adapter;
2934 struct ena_com_buf *ena_buf;
2935 dma_addr_t dma;
2936 u32 skb_head_len, frag_len, last_frag;
2937 u16 push_len = 0;
2938 u16 delta = 0;
2939 int i = 0;
2940
2941 skb_head_len = skb_headlen(skb);
2942 tx_info->skb = skb;
2943 ena_buf = tx_info->bufs;
2944
2945 if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
2946
2947
2948
2949
2950
2951
2952
2953
2954
2955
2956 push_len = min_t(u32, skb->len, tx_ring->tx_max_header_size);
2957 *push_hdr = skb_header_pointer(skb, 0, push_len,
2958 tx_ring->push_buf_intermediate_buf);
2959 *header_len = push_len;
2960 if (unlikely(skb->data != *push_hdr)) {
2961 ena_increase_stat(&tx_ring->tx_stats.llq_buffer_copy, 1,
2962 &tx_ring->syncp);
2963
2964 delta = push_len - skb_head_len;
2965 }
2966 } else {
2967 *push_hdr = NULL;
2968 *header_len = min_t(u32, skb_head_len,
2969 tx_ring->tx_max_header_size);
2970 }
2971
2972 netif_dbg(adapter, tx_queued, adapter->netdev,
2973 "skb: %p header_buf->vaddr: %p push_len: %d\n", skb,
2974 *push_hdr, push_len);
2975
2976 if (skb_head_len > push_len) {
2977 dma = dma_map_single(tx_ring->dev, skb->data + push_len,
2978 skb_head_len - push_len, DMA_TO_DEVICE);
2979 if (unlikely(dma_mapping_error(tx_ring->dev, dma)))
2980 goto error_report_dma_error;
2981
2982 ena_buf->paddr = dma;
2983 ena_buf->len = skb_head_len - push_len;
2984
2985 ena_buf++;
2986 tx_info->num_of_bufs++;
2987 tx_info->map_linear_data = 1;
2988 } else {
2989 tx_info->map_linear_data = 0;
2990 }
2991
2992 last_frag = skb_shinfo(skb)->nr_frags;
2993
2994 for (i = 0; i < last_frag; i++) {
2995 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2996
2997 frag_len = skb_frag_size(frag);
2998
2999 if (unlikely(delta >= frag_len)) {
3000 delta -= frag_len;
3001 continue;
3002 }
3003
3004 dma = skb_frag_dma_map(tx_ring->dev, frag, delta,
3005 frag_len - delta, DMA_TO_DEVICE);
3006 if (unlikely(dma_mapping_error(tx_ring->dev, dma)))
3007 goto error_report_dma_error;
3008
3009 ena_buf->paddr = dma;
3010 ena_buf->len = frag_len - delta;
3011 ena_buf++;
3012 tx_info->num_of_bufs++;
3013 delta = 0;
3014 }
3015
3016 return 0;
3017
3018error_report_dma_error:
3019 ena_increase_stat(&tx_ring->tx_stats.dma_mapping_err, 1,
3020 &tx_ring->syncp);
3021 netif_warn(adapter, tx_queued, adapter->netdev, "Failed to map skb\n");
3022
3023 tx_info->skb = NULL;
3024
3025 tx_info->num_of_bufs += i;
3026 ena_unmap_tx_buff(tx_ring, tx_info);
3027
3028 return -EINVAL;
3029}
3030
3031
3032static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev)
3033{
3034 struct ena_adapter *adapter = netdev_priv(dev);
3035 struct ena_tx_buffer *tx_info;
3036 struct ena_com_tx_ctx ena_tx_ctx;
3037 struct ena_ring *tx_ring;
3038 struct netdev_queue *txq;
3039 void *push_hdr;
3040 u16 next_to_use, req_id, header_len;
3041 int qid, rc;
3042
3043 netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb);
3044
3045 qid = skb_get_queue_mapping(skb);
3046 tx_ring = &adapter->tx_ring[qid];
3047 txq = netdev_get_tx_queue(dev, qid);
3048
3049 rc = ena_check_and_linearize_skb(tx_ring, skb);
3050 if (unlikely(rc))
3051 goto error_drop_packet;
3052
3053 skb_tx_timestamp(skb);
3054
3055 next_to_use = tx_ring->next_to_use;
3056 req_id = tx_ring->free_ids[next_to_use];
3057 tx_info = &tx_ring->tx_buffer_info[req_id];
3058 tx_info->num_of_bufs = 0;
3059
3060 WARN(tx_info->skb, "SKB isn't NULL req_id %d\n", req_id);
3061
3062 rc = ena_tx_map_skb(tx_ring, tx_info, skb, &push_hdr, &header_len);
3063 if (unlikely(rc))
3064 goto error_drop_packet;
3065
3066 memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx));
3067 ena_tx_ctx.ena_bufs = tx_info->bufs;
3068 ena_tx_ctx.push_header = push_hdr;
3069 ena_tx_ctx.num_bufs = tx_info->num_of_bufs;
3070 ena_tx_ctx.req_id = req_id;
3071 ena_tx_ctx.header_len = header_len;
3072
3073
3074 ena_tx_csum(&ena_tx_ctx, skb, tx_ring->disable_meta_caching);
3075
3076 rc = ena_xmit_common(dev,
3077 tx_ring,
3078 tx_info,
3079 &ena_tx_ctx,
3080 next_to_use,
3081 skb->len);
3082 if (rc)
3083 goto error_unmap_dma;
3084
3085 netdev_tx_sent_queue(txq, skb->len);
3086
3087
3088
3089
3090
3091 if (unlikely(!ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
3092 tx_ring->sgl_size + 2))) {
3093 netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n",
3094 __func__, qid);
3095
3096 netif_tx_stop_queue(txq);
3097 ena_increase_stat(&tx_ring->tx_stats.queue_stop, 1,
3098 &tx_ring->syncp);
3099
3100
3101
3102
3103
3104
3105
3106
3107
3108 smp_mb();
3109
3110 if (ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
3111 ENA_TX_WAKEUP_THRESH)) {
3112 netif_tx_wake_queue(txq);
3113 ena_increase_stat(&tx_ring->tx_stats.queue_wakeup, 1,
3114 &tx_ring->syncp);
3115 }
3116 }
3117
3118 if (netif_xmit_stopped(txq) || !netdev_xmit_more())
3119
3120
3121
3122 ena_ring_tx_doorbell(tx_ring);
3123
3124 return NETDEV_TX_OK;
3125
3126error_unmap_dma:
3127 ena_unmap_tx_buff(tx_ring, tx_info);
3128 tx_info->skb = NULL;
3129
3130error_drop_packet:
3131 dev_kfree_skb(skb);
3132 return NETDEV_TX_OK;
3133}
3134
3135static u16 ena_select_queue(struct net_device *dev, struct sk_buff *skb,
3136 struct net_device *sb_dev)
3137{
3138 u16 qid;
3139
3140
3141
3142
3143 if (skb_rx_queue_recorded(skb))
3144 qid = skb_get_rx_queue(skb);
3145 else
3146 qid = netdev_pick_tx(dev, skb, NULL);
3147
3148 return qid;
3149}
3150
3151static void ena_config_host_info(struct ena_com_dev *ena_dev, struct pci_dev *pdev)
3152{
3153 struct device *dev = &pdev->dev;
3154 struct ena_admin_host_info *host_info;
3155 int rc;
3156
3157
3158 rc = ena_com_allocate_host_info(ena_dev);
3159 if (rc) {
3160 dev_err(dev, "Cannot allocate host info\n");
3161 return;
3162 }
3163
3164 host_info = ena_dev->host_attr.host_info;
3165
3166 host_info->bdf = (pdev->bus->number << 8) | pdev->devfn;
3167 host_info->os_type = ENA_ADMIN_OS_LINUX;
3168 host_info->kernel_ver = LINUX_VERSION_CODE;
3169 strlcpy(host_info->kernel_ver_str, utsname()->version,
3170 sizeof(host_info->kernel_ver_str) - 1);
3171 host_info->os_dist = 0;
3172 strncpy(host_info->os_dist_str, utsname()->release,
3173 sizeof(host_info->os_dist_str) - 1);
3174 host_info->driver_version =
3175 (DRV_MODULE_GEN_MAJOR) |
3176 (DRV_MODULE_GEN_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) |
3177 (DRV_MODULE_GEN_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT) |
3178 ("K"[0] << ENA_ADMIN_HOST_INFO_MODULE_TYPE_SHIFT);
3179 host_info->num_cpus = num_online_cpus();
3180
3181 host_info->driver_supported_features =
3182 ENA_ADMIN_HOST_INFO_RX_OFFSET_MASK |
3183 ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_MASK |
3184 ENA_ADMIN_HOST_INFO_RX_BUF_MIRRORING_MASK |
3185 ENA_ADMIN_HOST_INFO_RSS_CONFIGURABLE_FUNCTION_KEY_MASK;
3186
3187 rc = ena_com_set_host_attributes(ena_dev);
3188 if (rc) {
3189 if (rc == -EOPNOTSUPP)
3190 dev_warn(dev, "Cannot set host attributes\n");
3191 else
3192 dev_err(dev, "Cannot set host attributes\n");
3193
3194 goto err;
3195 }
3196
3197 return;
3198
3199err:
3200 ena_com_delete_host_info(ena_dev);
3201}
3202
3203static void ena_config_debug_area(struct ena_adapter *adapter)
3204{
3205 u32 debug_area_size;
3206 int rc, ss_count;
3207
3208 ss_count = ena_get_sset_count(adapter->netdev, ETH_SS_STATS);
3209 if (ss_count <= 0) {
3210 netif_err(adapter, drv, adapter->netdev,
3211 "SS count is negative\n");
3212 return;
3213 }
3214
3215
3216 debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count;
3217
3218 rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size);
3219 if (rc) {
3220 netif_err(adapter, drv, adapter->netdev,
3221 "Cannot allocate debug area\n");
3222 return;
3223 }
3224
3225 rc = ena_com_set_host_attributes(adapter->ena_dev);
3226 if (rc) {
3227 if (rc == -EOPNOTSUPP)
3228 netif_warn(adapter, drv, adapter->netdev,
3229 "Cannot set host attributes\n");
3230 else
3231 netif_err(adapter, drv, adapter->netdev,
3232 "Cannot set host attributes\n");
3233 goto err;
3234 }
3235
3236 return;
3237err:
3238 ena_com_delete_debug_area(adapter->ena_dev);
3239}
3240
3241int ena_update_hw_stats(struct ena_adapter *adapter)
3242{
3243 int rc = 0;
3244
3245 rc = ena_com_get_eni_stats(adapter->ena_dev, &adapter->eni_stats);
3246 if (rc) {
3247 dev_info_once(&adapter->pdev->dev, "Failed to get ENI stats\n");
3248 return rc;
3249 }
3250
3251 return 0;
3252}
3253
3254static void ena_get_stats64(struct net_device *netdev,
3255 struct rtnl_link_stats64 *stats)
3256{
3257 struct ena_adapter *adapter = netdev_priv(netdev);
3258 struct ena_ring *rx_ring, *tx_ring;
3259 unsigned int start;
3260 u64 rx_drops;
3261 u64 tx_drops;
3262 int i;
3263
3264 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3265 return;
3266
3267 for (i = 0; i < adapter->num_io_queues; i++) {
3268 u64 bytes, packets;
3269
3270 tx_ring = &adapter->tx_ring[i];
3271
3272 do {
3273 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
3274 packets = tx_ring->tx_stats.cnt;
3275 bytes = tx_ring->tx_stats.bytes;
3276 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
3277
3278 stats->tx_packets += packets;
3279 stats->tx_bytes += bytes;
3280
3281 rx_ring = &adapter->rx_ring[i];
3282
3283 do {
3284 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
3285 packets = rx_ring->rx_stats.cnt;
3286 bytes = rx_ring->rx_stats.bytes;
3287 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
3288
3289 stats->rx_packets += packets;
3290 stats->rx_bytes += bytes;
3291 }
3292
3293 do {
3294 start = u64_stats_fetch_begin_irq(&adapter->syncp);
3295 rx_drops = adapter->dev_stats.rx_drops;
3296 tx_drops = adapter->dev_stats.tx_drops;
3297 } while (u64_stats_fetch_retry_irq(&adapter->syncp, start));
3298
3299 stats->rx_dropped = rx_drops;
3300 stats->tx_dropped = tx_drops;
3301
3302 stats->multicast = 0;
3303 stats->collisions = 0;
3304
3305 stats->rx_length_errors = 0;
3306 stats->rx_crc_errors = 0;
3307 stats->rx_frame_errors = 0;
3308 stats->rx_fifo_errors = 0;
3309 stats->rx_missed_errors = 0;
3310 stats->tx_window_errors = 0;
3311
3312 stats->rx_errors = 0;
3313 stats->tx_errors = 0;
3314}
3315
3316static const struct net_device_ops ena_netdev_ops = {
3317 .ndo_open = ena_open,
3318 .ndo_stop = ena_close,
3319 .ndo_start_xmit = ena_start_xmit,
3320 .ndo_select_queue = ena_select_queue,
3321 .ndo_get_stats64 = ena_get_stats64,
3322 .ndo_tx_timeout = ena_tx_timeout,
3323 .ndo_change_mtu = ena_change_mtu,
3324 .ndo_set_mac_address = NULL,
3325 .ndo_validate_addr = eth_validate_addr,
3326 .ndo_bpf = ena_xdp,
3327 .ndo_xdp_xmit = ena_xdp_xmit,
3328};
3329
3330static int ena_device_validate_params(struct ena_adapter *adapter,
3331 struct ena_com_dev_get_features_ctx *get_feat_ctx)
3332{
3333 struct net_device *netdev = adapter->netdev;
3334 int rc;
3335
3336 rc = ether_addr_equal(get_feat_ctx->dev_attr.mac_addr,
3337 adapter->mac_addr);
3338 if (!rc) {
3339 netif_err(adapter, drv, netdev,
3340 "Error, mac address are different\n");
3341 return -EINVAL;
3342 }
3343
3344 if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) {
3345 netif_err(adapter, drv, netdev,
3346 "Error, device max mtu is smaller than netdev MTU\n");
3347 return -EINVAL;
3348 }
3349
3350 return 0;
3351}
3352
3353static void set_default_llq_configurations(struct ena_llq_configurations *llq_config)
3354{
3355 llq_config->llq_header_location = ENA_ADMIN_INLINE_HEADER;
3356 llq_config->llq_stride_ctrl = ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY;
3357 llq_config->llq_num_decs_before_header = ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2;
3358 llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_128B;
3359 llq_config->llq_ring_entry_size_value = 128;
3360}
3361
3362static int ena_set_queues_placement_policy(struct pci_dev *pdev,
3363 struct ena_com_dev *ena_dev,
3364 struct ena_admin_feature_llq_desc *llq,
3365 struct ena_llq_configurations *llq_default_configurations)
3366{
3367 int rc;
3368 u32 llq_feature_mask;
3369
3370 llq_feature_mask = 1 << ENA_ADMIN_LLQ;
3371 if (!(ena_dev->supported_features & llq_feature_mask)) {
3372 dev_warn(&pdev->dev,
3373 "LLQ is not supported Fallback to host mode policy.\n");
3374 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3375 return 0;
3376 }
3377
3378 rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations);
3379 if (unlikely(rc)) {
3380 dev_err(&pdev->dev,
3381 "Failed to configure the device mode. Fallback to host mode policy.\n");
3382 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3383 }
3384
3385 return 0;
3386}
3387
3388static int ena_map_llq_mem_bar(struct pci_dev *pdev, struct ena_com_dev *ena_dev,
3389 int bars)
3390{
3391 bool has_mem_bar = !!(bars & BIT(ENA_MEM_BAR));
3392
3393 if (!has_mem_bar) {
3394 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
3395 dev_err(&pdev->dev,
3396 "ENA device does not expose LLQ bar. Fallback to host mode policy.\n");
3397 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3398 }
3399
3400 return 0;
3401 }
3402
3403 ena_dev->mem_bar = devm_ioremap_wc(&pdev->dev,
3404 pci_resource_start(pdev, ENA_MEM_BAR),
3405 pci_resource_len(pdev, ENA_MEM_BAR));
3406
3407 if (!ena_dev->mem_bar)
3408 return -EFAULT;
3409
3410 return 0;
3411}
3412
3413static int ena_device_init(struct ena_com_dev *ena_dev, struct pci_dev *pdev,
3414 struct ena_com_dev_get_features_ctx *get_feat_ctx,
3415 bool *wd_state)
3416{
3417 struct ena_llq_configurations llq_config;
3418 struct device *dev = &pdev->dev;
3419 bool readless_supported;
3420 u32 aenq_groups;
3421 int dma_width;
3422 int rc;
3423
3424 rc = ena_com_mmio_reg_read_request_init(ena_dev);
3425 if (rc) {
3426 dev_err(dev, "Failed to init mmio read less\n");
3427 return rc;
3428 }
3429
3430
3431
3432
3433 readless_supported = !(pdev->revision & ENA_MMIO_DISABLE_REG_READ);
3434 ena_com_set_mmio_read_mode(ena_dev, readless_supported);
3435
3436 rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL);
3437 if (rc) {
3438 dev_err(dev, "Can not reset device\n");
3439 goto err_mmio_read_less;
3440 }
3441
3442 rc = ena_com_validate_version(ena_dev);
3443 if (rc) {
3444 dev_err(dev, "Device version is too low\n");
3445 goto err_mmio_read_less;
3446 }
3447
3448 dma_width = ena_com_get_dma_width(ena_dev);
3449 if (dma_width < 0) {
3450 dev_err(dev, "Invalid dma width value %d", dma_width);
3451 rc = dma_width;
3452 goto err_mmio_read_less;
3453 }
3454
3455 rc = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(dma_width));
3456 if (rc) {
3457 dev_err(dev, "dma_set_mask_and_coherent failed %d\n", rc);
3458 goto err_mmio_read_less;
3459 }
3460
3461
3462 rc = ena_com_admin_init(ena_dev, &aenq_handlers);
3463 if (rc) {
3464 dev_err(dev,
3465 "Can not initialize ena admin queue with device\n");
3466 goto err_mmio_read_less;
3467 }
3468
3469
3470
3471
3472
3473 ena_com_set_admin_polling_mode(ena_dev, true);
3474
3475 ena_config_host_info(ena_dev, pdev);
3476
3477
3478 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx);
3479 if (rc) {
3480 dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc);
3481 goto err_admin_init;
3482 }
3483
3484
3485 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) |
3486 BIT(ENA_ADMIN_FATAL_ERROR) |
3487 BIT(ENA_ADMIN_WARNING) |
3488 BIT(ENA_ADMIN_NOTIFICATION) |
3489 BIT(ENA_ADMIN_KEEP_ALIVE);
3490
3491 aenq_groups &= get_feat_ctx->aenq.supported_groups;
3492
3493 rc = ena_com_set_aenq_config(ena_dev, aenq_groups);
3494 if (rc) {
3495 dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc);
3496 goto err_admin_init;
3497 }
3498
3499 *wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE));
3500
3501 set_default_llq_configurations(&llq_config);
3502
3503 rc = ena_set_queues_placement_policy(pdev, ena_dev, &get_feat_ctx->llq,
3504 &llq_config);
3505 if (rc) {
3506 dev_err(dev, "ENA device init failed\n");
3507 goto err_admin_init;
3508 }
3509
3510 return 0;
3511
3512err_admin_init:
3513 ena_com_delete_host_info(ena_dev);
3514 ena_com_admin_destroy(ena_dev);
3515err_mmio_read_less:
3516 ena_com_mmio_reg_read_request_destroy(ena_dev);
3517
3518 return rc;
3519}
3520
3521static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter)
3522{
3523 struct ena_com_dev *ena_dev = adapter->ena_dev;
3524 struct device *dev = &adapter->pdev->dev;
3525 int rc;
3526
3527 rc = ena_enable_msix(adapter);
3528 if (rc) {
3529 dev_err(dev, "Can not reserve msix vectors\n");
3530 return rc;
3531 }
3532
3533 ena_setup_mgmnt_intr(adapter);
3534
3535 rc = ena_request_mgmnt_irq(adapter);
3536 if (rc) {
3537 dev_err(dev, "Can not setup management interrupts\n");
3538 goto err_disable_msix;
3539 }
3540
3541 ena_com_set_admin_polling_mode(ena_dev, false);
3542
3543 ena_com_admin_aenq_enable(ena_dev);
3544
3545 return 0;
3546
3547err_disable_msix:
3548 ena_disable_msix(adapter);
3549
3550 return rc;
3551}
3552
3553static void ena_destroy_device(struct ena_adapter *adapter, bool graceful)
3554{
3555 struct net_device *netdev = adapter->netdev;
3556 struct ena_com_dev *ena_dev = adapter->ena_dev;
3557 bool dev_up;
3558
3559 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
3560 return;
3561
3562 netif_carrier_off(netdev);
3563
3564 del_timer_sync(&adapter->timer_service);
3565
3566 dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
3567 adapter->dev_up_before_reset = dev_up;
3568 if (!graceful)
3569 ena_com_set_admin_running_state(ena_dev, false);
3570
3571 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3572 ena_down(adapter);
3573
3574
3575
3576
3577 if (!(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags) && dev_up))
3578 ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
3579
3580 ena_free_mgmnt_irq(adapter);
3581
3582 ena_disable_msix(adapter);
3583
3584 ena_com_abort_admin_commands(ena_dev);
3585
3586 ena_com_wait_for_abort_completion(ena_dev);
3587
3588 ena_com_admin_destroy(ena_dev);
3589
3590 ena_com_mmio_reg_read_request_destroy(ena_dev);
3591
3592
3593 adapter->reset_reason = ENA_REGS_RESET_NORMAL;
3594
3595 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3596 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3597}
3598
3599static int ena_restore_device(struct ena_adapter *adapter)
3600{
3601 struct ena_com_dev_get_features_ctx get_feat_ctx;
3602 struct ena_com_dev *ena_dev = adapter->ena_dev;
3603 struct pci_dev *pdev = adapter->pdev;
3604 bool wd_state;
3605 int rc;
3606
3607 set_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
3608 rc = ena_device_init(ena_dev, adapter->pdev, &get_feat_ctx, &wd_state);
3609 if (rc) {
3610 dev_err(&pdev->dev, "Can not initialize device\n");
3611 goto err;
3612 }
3613 adapter->wd_state = wd_state;
3614
3615 rc = ena_device_validate_params(adapter, &get_feat_ctx);
3616 if (rc) {
3617 dev_err(&pdev->dev, "Validation of device parameters failed\n");
3618 goto err_device_destroy;
3619 }
3620
3621 rc = ena_enable_msix_and_set_admin_interrupts(adapter);
3622 if (rc) {
3623 dev_err(&pdev->dev, "Enable MSI-X failed\n");
3624 goto err_device_destroy;
3625 }
3626
3627 if (adapter->dev_up_before_reset) {
3628 rc = ena_up(adapter);
3629 if (rc) {
3630 dev_err(&pdev->dev, "Failed to create I/O queues\n");
3631 goto err_disable_msix;
3632 }
3633 }
3634
3635 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3636
3637 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
3638 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
3639 netif_carrier_on(adapter->netdev);
3640
3641 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
3642 adapter->last_keep_alive_jiffies = jiffies;
3643
3644 dev_err(&pdev->dev, "Device reset completed successfully\n");
3645
3646 return rc;
3647err_disable_msix:
3648 ena_free_mgmnt_irq(adapter);
3649 ena_disable_msix(adapter);
3650err_device_destroy:
3651 ena_com_abort_admin_commands(ena_dev);
3652 ena_com_wait_for_abort_completion(ena_dev);
3653 ena_com_admin_destroy(ena_dev);
3654 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_DRIVER_INVALID_STATE);
3655 ena_com_mmio_reg_read_request_destroy(ena_dev);
3656err:
3657 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3658 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
3659 dev_err(&pdev->dev,
3660 "Reset attempt failed. Can not reset the device\n");
3661
3662 return rc;
3663}
3664
3665static void ena_fw_reset_device(struct work_struct *work)
3666{
3667 struct ena_adapter *adapter =
3668 container_of(work, struct ena_adapter, reset_task);
3669
3670 rtnl_lock();
3671
3672 if (likely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
3673 ena_destroy_device(adapter, false);
3674 ena_restore_device(adapter);
3675 }
3676
3677 rtnl_unlock();
3678}
3679
3680static int check_for_rx_interrupt_queue(struct ena_adapter *adapter,
3681 struct ena_ring *rx_ring)
3682{
3683 struct ena_napi *ena_napi = container_of(rx_ring->napi, struct ena_napi, napi);
3684
3685 if (likely(READ_ONCE(ena_napi->first_interrupt)))
3686 return 0;
3687
3688 if (ena_com_cq_empty(rx_ring->ena_com_io_cq))
3689 return 0;
3690
3691 rx_ring->no_interrupt_event_cnt++;
3692
3693 if (rx_ring->no_interrupt_event_cnt == ENA_MAX_NO_INTERRUPT_ITERATIONS) {
3694 netif_err(adapter, rx_err, adapter->netdev,
3695 "Potential MSIX issue on Rx side Queue = %d. Reset the device\n",
3696 rx_ring->qid);
3697 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT;
3698 smp_mb__before_atomic();
3699 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3700 return -EIO;
3701 }
3702
3703 return 0;
3704}
3705
3706static int check_missing_comp_in_tx_queue(struct ena_adapter *adapter,
3707 struct ena_ring *tx_ring)
3708{
3709 struct ena_napi *ena_napi = container_of(tx_ring->napi, struct ena_napi, napi);
3710 unsigned int time_since_last_napi;
3711 unsigned int missing_tx_comp_to;
3712 bool is_tx_comp_time_expired;
3713 struct ena_tx_buffer *tx_buf;
3714 unsigned long last_jiffies;
3715 u32 missed_tx = 0;
3716 int i, rc = 0;
3717
3718 for (i = 0; i < tx_ring->ring_size; i++) {
3719 tx_buf = &tx_ring->tx_buffer_info[i];
3720 last_jiffies = tx_buf->last_jiffies;
3721
3722 if (last_jiffies == 0)
3723
3724 continue;
3725
3726 is_tx_comp_time_expired = time_is_before_jiffies(last_jiffies +
3727 2 * adapter->missing_tx_completion_to);
3728
3729 if (unlikely(!READ_ONCE(ena_napi->first_interrupt) && is_tx_comp_time_expired)) {
3730
3731
3732
3733 netif_err(adapter, tx_err, adapter->netdev,
3734 "Potential MSIX issue on Tx side Queue = %d. Reset the device\n",
3735 tx_ring->qid);
3736 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT;
3737 smp_mb__before_atomic();
3738 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3739 return -EIO;
3740 }
3741
3742 is_tx_comp_time_expired = time_is_before_jiffies(last_jiffies +
3743 adapter->missing_tx_completion_to);
3744
3745 if (unlikely(is_tx_comp_time_expired)) {
3746 if (!tx_buf->print_once) {
3747 time_since_last_napi = jiffies_to_usecs(jiffies - tx_ring->tx_stats.last_napi_jiffies);
3748 missing_tx_comp_to = jiffies_to_msecs(adapter->missing_tx_completion_to);
3749 netif_notice(adapter, tx_err, adapter->netdev,
3750 "Found a Tx that wasn't completed on time, qid %d, index %d. %u usecs have passed since last napi execution. Missing Tx timeout value %u msecs\n",
3751 tx_ring->qid, i, time_since_last_napi, missing_tx_comp_to);
3752 }
3753
3754 tx_buf->print_once = 1;
3755 missed_tx++;
3756 }
3757 }
3758
3759 if (unlikely(missed_tx > adapter->missing_tx_completion_threshold)) {
3760 netif_err(adapter, tx_err, adapter->netdev,
3761 "The number of lost tx completions is above the threshold (%d > %d). Reset the device\n",
3762 missed_tx,
3763 adapter->missing_tx_completion_threshold);
3764 adapter->reset_reason =
3765 ENA_REGS_RESET_MISS_TX_CMPL;
3766 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3767 rc = -EIO;
3768 }
3769
3770 ena_increase_stat(&tx_ring->tx_stats.missed_tx, missed_tx,
3771 &tx_ring->syncp);
3772
3773 return rc;
3774}
3775
3776static void check_for_missing_completions(struct ena_adapter *adapter)
3777{
3778 struct ena_ring *tx_ring;
3779 struct ena_ring *rx_ring;
3780 int i, budget, rc;
3781 int io_queue_count;
3782
3783 io_queue_count = adapter->xdp_num_queues + adapter->num_io_queues;
3784
3785 smp_rmb();
3786
3787 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3788 return;
3789
3790 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
3791 return;
3792
3793 if (adapter->missing_tx_completion_to == ENA_HW_HINTS_NO_TIMEOUT)
3794 return;
3795
3796 budget = ENA_MONITORED_TX_QUEUES;
3797
3798 for (i = adapter->last_monitored_tx_qid; i < io_queue_count; i++) {
3799 tx_ring = &adapter->tx_ring[i];
3800 rx_ring = &adapter->rx_ring[i];
3801
3802 rc = check_missing_comp_in_tx_queue(adapter, tx_ring);
3803 if (unlikely(rc))
3804 return;
3805
3806 rc = !ENA_IS_XDP_INDEX(adapter, i) ?
3807 check_for_rx_interrupt_queue(adapter, rx_ring) : 0;
3808 if (unlikely(rc))
3809 return;
3810
3811 budget--;
3812 if (!budget)
3813 break;
3814 }
3815
3816 adapter->last_monitored_tx_qid = i % io_queue_count;
3817}
3818
3819
3820#define EMPTY_RX_REFILL 2
3821
3822
3823
3824
3825
3826
3827
3828
3829
3830
3831
3832
3833
3834
3835static void check_for_empty_rx_ring(struct ena_adapter *adapter)
3836{
3837 struct ena_ring *rx_ring;
3838 int i, refill_required;
3839
3840 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3841 return;
3842
3843 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
3844 return;
3845
3846 for (i = 0; i < adapter->num_io_queues; i++) {
3847 rx_ring = &adapter->rx_ring[i];
3848
3849 refill_required = ena_com_free_q_entries(rx_ring->ena_com_io_sq);
3850 if (unlikely(refill_required == (rx_ring->ring_size - 1))) {
3851 rx_ring->empty_rx_queue++;
3852
3853 if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) {
3854 ena_increase_stat(&rx_ring->rx_stats.empty_rx_ring, 1,
3855 &rx_ring->syncp);
3856
3857 netif_err(adapter, drv, adapter->netdev,
3858 "Trigger refill for ring %d\n", i);
3859
3860 napi_schedule(rx_ring->napi);
3861 rx_ring->empty_rx_queue = 0;
3862 }
3863 } else {
3864 rx_ring->empty_rx_queue = 0;
3865 }
3866 }
3867}
3868
3869
3870static void check_for_missing_keep_alive(struct ena_adapter *adapter)
3871{
3872 unsigned long keep_alive_expired;
3873
3874 if (!adapter->wd_state)
3875 return;
3876
3877 if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3878 return;
3879
3880 keep_alive_expired = adapter->last_keep_alive_jiffies +
3881 adapter->keep_alive_timeout;
3882 if (unlikely(time_is_before_jiffies(keep_alive_expired))) {
3883 netif_err(adapter, drv, adapter->netdev,
3884 "Keep alive watchdog timeout.\n");
3885 ena_increase_stat(&adapter->dev_stats.wd_expired, 1,
3886 &adapter->syncp);
3887 adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO;
3888 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3889 }
3890}
3891
3892static void check_for_admin_com_state(struct ena_adapter *adapter)
3893{
3894 if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) {
3895 netif_err(adapter, drv, adapter->netdev,
3896 "ENA admin queue is not in running state!\n");
3897 ena_increase_stat(&adapter->dev_stats.admin_q_pause, 1,
3898 &adapter->syncp);
3899 adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO;
3900 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3901 }
3902}
3903
3904static void ena_update_hints(struct ena_adapter *adapter,
3905 struct ena_admin_ena_hw_hints *hints)
3906{
3907 struct net_device *netdev = adapter->netdev;
3908
3909 if (hints->admin_completion_tx_timeout)
3910 adapter->ena_dev->admin_queue.completion_timeout =
3911 hints->admin_completion_tx_timeout * 1000;
3912
3913 if (hints->mmio_read_timeout)
3914
3915 adapter->ena_dev->mmio_read.reg_read_to =
3916 hints->mmio_read_timeout * 1000;
3917
3918 if (hints->missed_tx_completion_count_threshold_to_reset)
3919 adapter->missing_tx_completion_threshold =
3920 hints->missed_tx_completion_count_threshold_to_reset;
3921
3922 if (hints->missing_tx_completion_timeout) {
3923 if (hints->missing_tx_completion_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3924 adapter->missing_tx_completion_to = ENA_HW_HINTS_NO_TIMEOUT;
3925 else
3926 adapter->missing_tx_completion_to =
3927 msecs_to_jiffies(hints->missing_tx_completion_timeout);
3928 }
3929
3930 if (hints->netdev_wd_timeout)
3931 netdev->watchdog_timeo = msecs_to_jiffies(hints->netdev_wd_timeout);
3932
3933 if (hints->driver_watchdog_timeout) {
3934 if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3935 adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT;
3936 else
3937 adapter->keep_alive_timeout =
3938 msecs_to_jiffies(hints->driver_watchdog_timeout);
3939 }
3940}
3941
3942static void ena_update_host_info(struct ena_admin_host_info *host_info,
3943 struct net_device *netdev)
3944{
3945 host_info->supported_network_features[0] =
3946 netdev->features & GENMASK_ULL(31, 0);
3947 host_info->supported_network_features[1] =
3948 (netdev->features & GENMASK_ULL(63, 32)) >> 32;
3949}
3950
3951static void ena_timer_service(struct timer_list *t)
3952{
3953 struct ena_adapter *adapter = from_timer(adapter, t, timer_service);
3954 u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr;
3955 struct ena_admin_host_info *host_info =
3956 adapter->ena_dev->host_attr.host_info;
3957
3958 check_for_missing_keep_alive(adapter);
3959
3960 check_for_admin_com_state(adapter);
3961
3962 check_for_missing_completions(adapter);
3963
3964 check_for_empty_rx_ring(adapter);
3965
3966 if (debug_area)
3967 ena_dump_stats_to_buf(adapter, debug_area);
3968
3969 if (host_info)
3970 ena_update_host_info(host_info, adapter->netdev);
3971
3972 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
3973 netif_err(adapter, drv, adapter->netdev,
3974 "Trigger reset is on\n");
3975 ena_dump_stats_to_dmesg(adapter);
3976 queue_work(ena_wq, &adapter->reset_task);
3977 return;
3978 }
3979
3980
3981 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
3982}
3983
3984static u32 ena_calc_max_io_queue_num(struct pci_dev *pdev,
3985 struct ena_com_dev *ena_dev,
3986 struct ena_com_dev_get_features_ctx *get_feat_ctx)
3987{
3988 u32 io_tx_sq_num, io_tx_cq_num, io_rx_num, max_num_io_queues;
3989
3990 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
3991 struct ena_admin_queue_ext_feature_fields *max_queue_ext =
3992 &get_feat_ctx->max_queue_ext.max_queue_ext;
3993 io_rx_num = min_t(u32, max_queue_ext->max_rx_sq_num,
3994 max_queue_ext->max_rx_cq_num);
3995
3996 io_tx_sq_num = max_queue_ext->max_tx_sq_num;
3997 io_tx_cq_num = max_queue_ext->max_tx_cq_num;
3998 } else {
3999 struct ena_admin_queue_feature_desc *max_queues =
4000 &get_feat_ctx->max_queues;
4001 io_tx_sq_num = max_queues->max_sq_num;
4002 io_tx_cq_num = max_queues->max_cq_num;
4003 io_rx_num = min_t(u32, io_tx_sq_num, io_tx_cq_num);
4004 }
4005
4006
4007 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
4008 io_tx_sq_num = get_feat_ctx->llq.max_llq_num;
4009
4010 max_num_io_queues = min_t(u32, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES);
4011 max_num_io_queues = min_t(u32, max_num_io_queues, io_rx_num);
4012 max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_sq_num);
4013 max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_cq_num);
4014
4015 max_num_io_queues = min_t(u32, max_num_io_queues, pci_msix_vec_count(pdev) - 1);
4016 if (unlikely(!max_num_io_queues)) {
4017 dev_err(&pdev->dev, "The device doesn't have io queues\n");
4018 return -EFAULT;
4019 }
4020
4021 return max_num_io_queues;
4022}
4023
4024static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat,
4025 struct net_device *netdev)
4026{
4027 netdev_features_t dev_features = 0;
4028
4029
4030 if (feat->offload.tx &
4031 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK)
4032 dev_features |= NETIF_F_IP_CSUM;
4033
4034 if (feat->offload.tx &
4035 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK)
4036 dev_features |= NETIF_F_IPV6_CSUM;
4037
4038 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK)
4039 dev_features |= NETIF_F_TSO;
4040
4041 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK)
4042 dev_features |= NETIF_F_TSO6;
4043
4044 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK)
4045 dev_features |= NETIF_F_TSO_ECN;
4046
4047 if (feat->offload.rx_supported &
4048 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK)
4049 dev_features |= NETIF_F_RXCSUM;
4050
4051 if (feat->offload.rx_supported &
4052 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK)
4053 dev_features |= NETIF_F_RXCSUM;
4054
4055 netdev->features =
4056 dev_features |
4057 NETIF_F_SG |
4058 NETIF_F_RXHASH |
4059 NETIF_F_HIGHDMA;
4060
4061 netdev->hw_features |= netdev->features;
4062 netdev->vlan_features |= netdev->features;
4063}
4064
4065static void ena_set_conf_feat_params(struct ena_adapter *adapter,
4066 struct ena_com_dev_get_features_ctx *feat)
4067{
4068 struct net_device *netdev = adapter->netdev;
4069
4070
4071 if (!is_valid_ether_addr(feat->dev_attr.mac_addr)) {
4072 eth_hw_addr_random(netdev);
4073 ether_addr_copy(adapter->mac_addr, netdev->dev_addr);
4074 } else {
4075 ether_addr_copy(adapter->mac_addr, feat->dev_attr.mac_addr);
4076 ether_addr_copy(netdev->dev_addr, adapter->mac_addr);
4077 }
4078
4079
4080 ena_set_dev_offloads(feat, netdev);
4081
4082 adapter->max_mtu = feat->dev_attr.max_mtu;
4083 netdev->max_mtu = adapter->max_mtu;
4084 netdev->min_mtu = ENA_MIN_MTU;
4085}
4086
4087static int ena_rss_init_default(struct ena_adapter *adapter)
4088{
4089 struct ena_com_dev *ena_dev = adapter->ena_dev;
4090 struct device *dev = &adapter->pdev->dev;
4091 int rc, i;
4092 u32 val;
4093
4094 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE);
4095 if (unlikely(rc)) {
4096 dev_err(dev, "Cannot init indirect table\n");
4097 goto err_rss_init;
4098 }
4099
4100 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) {
4101 val = ethtool_rxfh_indir_default(i, adapter->num_io_queues);
4102 rc = ena_com_indirect_table_fill_entry(ena_dev, i,
4103 ENA_IO_RXQ_IDX(val));
4104 if (unlikely(rc && (rc != -EOPNOTSUPP))) {
4105 dev_err(dev, "Cannot fill indirect table\n");
4106 goto err_fill_indir;
4107 }
4108 }
4109
4110 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_TOEPLITZ, NULL,
4111 ENA_HASH_KEY_SIZE, 0xFFFFFFFF);
4112 if (unlikely(rc && (rc != -EOPNOTSUPP))) {
4113 dev_err(dev, "Cannot fill hash function\n");
4114 goto err_fill_indir;
4115 }
4116
4117 rc = ena_com_set_default_hash_ctrl(ena_dev);
4118 if (unlikely(rc && (rc != -EOPNOTSUPP))) {
4119 dev_err(dev, "Cannot fill hash control\n");
4120 goto err_fill_indir;
4121 }
4122
4123 return 0;
4124
4125err_fill_indir:
4126 ena_com_rss_destroy(ena_dev);
4127err_rss_init:
4128
4129 return rc;
4130}
4131
4132static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev)
4133{
4134 int release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
4135
4136 pci_release_selected_regions(pdev, release_bars);
4137}
4138
4139
4140static int ena_calc_io_queue_size(struct ena_calc_queue_size_ctx *ctx)
4141{
4142 struct ena_admin_feature_llq_desc *llq = &ctx->get_feat_ctx->llq;
4143 struct ena_com_dev *ena_dev = ctx->ena_dev;
4144 u32 tx_queue_size = ENA_DEFAULT_RING_SIZE;
4145 u32 rx_queue_size = ENA_DEFAULT_RING_SIZE;
4146 u32 max_tx_queue_size;
4147 u32 max_rx_queue_size;
4148
4149 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
4150 struct ena_admin_queue_ext_feature_fields *max_queue_ext =
4151 &ctx->get_feat_ctx->max_queue_ext.max_queue_ext;
4152 max_rx_queue_size = min_t(u32, max_queue_ext->max_rx_cq_depth,
4153 max_queue_ext->max_rx_sq_depth);
4154 max_tx_queue_size = max_queue_ext->max_tx_cq_depth;
4155
4156 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
4157 max_tx_queue_size = min_t(u32, max_tx_queue_size,
4158 llq->max_llq_depth);
4159 else
4160 max_tx_queue_size = min_t(u32, max_tx_queue_size,
4161 max_queue_ext->max_tx_sq_depth);
4162
4163 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
4164 max_queue_ext->max_per_packet_tx_descs);
4165 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
4166 max_queue_ext->max_per_packet_rx_descs);
4167 } else {
4168 struct ena_admin_queue_feature_desc *max_queues =
4169 &ctx->get_feat_ctx->max_queues;
4170 max_rx_queue_size = min_t(u32, max_queues->max_cq_depth,
4171 max_queues->max_sq_depth);
4172 max_tx_queue_size = max_queues->max_cq_depth;
4173
4174 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
4175 max_tx_queue_size = min_t(u32, max_tx_queue_size,
4176 llq->max_llq_depth);
4177 else
4178 max_tx_queue_size = min_t(u32, max_tx_queue_size,
4179 max_queues->max_sq_depth);
4180
4181 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
4182 max_queues->max_packet_tx_descs);
4183 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
4184 max_queues->max_packet_rx_descs);
4185 }
4186
4187 max_tx_queue_size = rounddown_pow_of_two(max_tx_queue_size);
4188 max_rx_queue_size = rounddown_pow_of_two(max_rx_queue_size);
4189
4190 tx_queue_size = clamp_val(tx_queue_size, ENA_MIN_RING_SIZE,
4191 max_tx_queue_size);
4192 rx_queue_size = clamp_val(rx_queue_size, ENA_MIN_RING_SIZE,
4193 max_rx_queue_size);
4194
4195 tx_queue_size = rounddown_pow_of_two(tx_queue_size);
4196 rx_queue_size = rounddown_pow_of_two(rx_queue_size);
4197
4198 ctx->max_tx_queue_size = max_tx_queue_size;
4199 ctx->max_rx_queue_size = max_rx_queue_size;
4200 ctx->tx_queue_size = tx_queue_size;
4201 ctx->rx_queue_size = rx_queue_size;
4202
4203 return 0;
4204}
4205
4206
4207
4208
4209
4210
4211
4212
4213
4214
4215
4216static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4217{
4218 struct ena_calc_queue_size_ctx calc_queue_ctx = {};
4219 struct ena_com_dev_get_features_ctx get_feat_ctx;
4220 struct ena_com_dev *ena_dev = NULL;
4221 struct ena_adapter *adapter;
4222 struct net_device *netdev;
4223 static int adapters_found;
4224 u32 max_num_io_queues;
4225 bool wd_state;
4226 int bars, rc;
4227
4228 dev_dbg(&pdev->dev, "%s\n", __func__);
4229
4230 rc = pci_enable_device_mem(pdev);
4231 if (rc) {
4232 dev_err(&pdev->dev, "pci_enable_device_mem() failed!\n");
4233 return rc;
4234 }
4235
4236 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(ENA_MAX_PHYS_ADDR_SIZE_BITS));
4237 if (rc) {
4238 dev_err(&pdev->dev, "dma_set_mask_and_coherent failed %d\n", rc);
4239 goto err_disable_device;
4240 }
4241
4242 pci_set_master(pdev);
4243
4244 ena_dev = vzalloc(sizeof(*ena_dev));
4245 if (!ena_dev) {
4246 rc = -ENOMEM;
4247 goto err_disable_device;
4248 }
4249
4250 bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
4251 rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME);
4252 if (rc) {
4253 dev_err(&pdev->dev, "pci_request_selected_regions failed %d\n",
4254 rc);
4255 goto err_free_ena_dev;
4256 }
4257
4258 ena_dev->reg_bar = devm_ioremap(&pdev->dev,
4259 pci_resource_start(pdev, ENA_REG_BAR),
4260 pci_resource_len(pdev, ENA_REG_BAR));
4261 if (!ena_dev->reg_bar) {
4262 dev_err(&pdev->dev, "Failed to remap regs bar\n");
4263 rc = -EFAULT;
4264 goto err_free_region;
4265 }
4266
4267 ena_dev->ena_min_poll_delay_us = ENA_ADMIN_POLL_DELAY_US;
4268
4269 ena_dev->dmadev = &pdev->dev;
4270
4271 netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), ENA_MAX_RINGS);
4272 if (!netdev) {
4273 dev_err(&pdev->dev, "alloc_etherdev_mq failed\n");
4274 rc = -ENOMEM;
4275 goto err_free_region;
4276 }
4277
4278 SET_NETDEV_DEV(netdev, &pdev->dev);
4279 adapter = netdev_priv(netdev);
4280 adapter->ena_dev = ena_dev;
4281 adapter->netdev = netdev;
4282 adapter->pdev = pdev;
4283 adapter->msg_enable = DEFAULT_MSG_ENABLE;
4284
4285 ena_dev->net_device = netdev;
4286
4287 pci_set_drvdata(pdev, adapter);
4288
4289 rc = ena_device_init(ena_dev, pdev, &get_feat_ctx, &wd_state);
4290 if (rc) {
4291 dev_err(&pdev->dev, "ENA device init failed\n");
4292 if (rc == -ETIME)
4293 rc = -EPROBE_DEFER;
4294 goto err_netdev_destroy;
4295 }
4296
4297 rc = ena_map_llq_mem_bar(pdev, ena_dev, bars);
4298 if (rc) {
4299 dev_err(&pdev->dev, "ENA llq bar mapping failed\n");
4300 goto err_device_destroy;
4301 }
4302
4303 calc_queue_ctx.ena_dev = ena_dev;
4304 calc_queue_ctx.get_feat_ctx = &get_feat_ctx;
4305 calc_queue_ctx.pdev = pdev;
4306
4307
4308
4309
4310 ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS;
4311 ena_dev->intr_moder_rx_interval = ENA_INTR_INITIAL_RX_INTERVAL_USECS;
4312 ena_dev->intr_delay_resolution = ENA_DEFAULT_INTR_DELAY_RESOLUTION;
4313 max_num_io_queues = ena_calc_max_io_queue_num(pdev, ena_dev, &get_feat_ctx);
4314 rc = ena_calc_io_queue_size(&calc_queue_ctx);
4315 if (rc || !max_num_io_queues) {
4316 rc = -EFAULT;
4317 goto err_device_destroy;
4318 }
4319
4320 ena_set_conf_feat_params(adapter, &get_feat_ctx);
4321
4322 adapter->reset_reason = ENA_REGS_RESET_NORMAL;
4323
4324 adapter->requested_tx_ring_size = calc_queue_ctx.tx_queue_size;
4325 adapter->requested_rx_ring_size = calc_queue_ctx.rx_queue_size;
4326 adapter->max_tx_ring_size = calc_queue_ctx.max_tx_queue_size;
4327 adapter->max_rx_ring_size = calc_queue_ctx.max_rx_queue_size;
4328 adapter->max_tx_sgl_size = calc_queue_ctx.max_tx_sgl_size;
4329 adapter->max_rx_sgl_size = calc_queue_ctx.max_rx_sgl_size;
4330
4331 adapter->num_io_queues = max_num_io_queues;
4332 adapter->max_num_io_queues = max_num_io_queues;
4333 adapter->last_monitored_tx_qid = 0;
4334
4335 adapter->xdp_first_ring = 0;
4336 adapter->xdp_num_queues = 0;
4337
4338 adapter->rx_copybreak = ENA_DEFAULT_RX_COPYBREAK;
4339 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
4340 adapter->disable_meta_caching =
4341 !!(get_feat_ctx.llq.accel_mode.u.get.supported_flags &
4342 BIT(ENA_ADMIN_DISABLE_META_CACHING));
4343
4344 adapter->wd_state = wd_state;
4345
4346 snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found);
4347
4348 rc = ena_com_init_interrupt_moderation(adapter->ena_dev);
4349 if (rc) {
4350 dev_err(&pdev->dev,
4351 "Failed to query interrupt moderation feature\n");
4352 goto err_device_destroy;
4353 }
4354 ena_init_io_rings(adapter,
4355 0,
4356 adapter->xdp_num_queues +
4357 adapter->num_io_queues);
4358
4359 netdev->netdev_ops = &ena_netdev_ops;
4360 netdev->watchdog_timeo = TX_TIMEOUT;
4361 ena_set_ethtool_ops(netdev);
4362
4363 netdev->priv_flags |= IFF_UNICAST_FLT;
4364
4365 u64_stats_init(&adapter->syncp);
4366
4367 rc = ena_enable_msix_and_set_admin_interrupts(adapter);
4368 if (rc) {
4369 dev_err(&pdev->dev,
4370 "Failed to enable and set the admin interrupts\n");
4371 goto err_worker_destroy;
4372 }
4373 rc = ena_rss_init_default(adapter);
4374 if (rc && (rc != -EOPNOTSUPP)) {
4375 dev_err(&pdev->dev, "Cannot init RSS rc: %d\n", rc);
4376 goto err_free_msix;
4377 }
4378
4379 ena_config_debug_area(adapter);
4380
4381 if (!ena_update_hw_stats(adapter))
4382 adapter->eni_stats_supported = true;
4383 else
4384 adapter->eni_stats_supported = false;
4385
4386 memcpy(adapter->netdev->perm_addr, adapter->mac_addr, netdev->addr_len);
4387
4388 netif_carrier_off(netdev);
4389
4390 rc = register_netdev(netdev);
4391 if (rc) {
4392 dev_err(&pdev->dev, "Cannot register net device\n");
4393 goto err_rss;
4394 }
4395
4396 INIT_WORK(&adapter->reset_task, ena_fw_reset_device);
4397
4398 adapter->last_keep_alive_jiffies = jiffies;
4399 adapter->keep_alive_timeout = ENA_DEVICE_KALIVE_TIMEOUT;
4400 adapter->missing_tx_completion_to = TX_TIMEOUT;
4401 adapter->missing_tx_completion_threshold = MAX_NUM_OF_TIMEOUTED_PACKETS;
4402
4403 ena_update_hints(adapter, &get_feat_ctx.hw_hints);
4404
4405 timer_setup(&adapter->timer_service, ena_timer_service, 0);
4406 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
4407
4408 dev_info(&pdev->dev,
4409 "%s found at mem %lx, mac addr %pM\n",
4410 DEVICE_NAME, (long)pci_resource_start(pdev, 0),
4411 netdev->dev_addr);
4412
4413 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
4414
4415 adapters_found++;
4416
4417 return 0;
4418
4419err_rss:
4420 ena_com_delete_debug_area(ena_dev);
4421 ena_com_rss_destroy(ena_dev);
4422err_free_msix:
4423 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_INIT_ERR);
4424
4425 ena_com_set_admin_running_state(ena_dev, false);
4426 ena_free_mgmnt_irq(adapter);
4427 ena_disable_msix(adapter);
4428err_worker_destroy:
4429 del_timer(&adapter->timer_service);
4430err_device_destroy:
4431 ena_com_delete_host_info(ena_dev);
4432 ena_com_admin_destroy(ena_dev);
4433err_netdev_destroy:
4434 free_netdev(netdev);
4435err_free_region:
4436 ena_release_bars(ena_dev, pdev);
4437err_free_ena_dev:
4438 vfree(ena_dev);
4439err_disable_device:
4440 pci_disable_device(pdev);
4441 return rc;
4442}
4443
4444
4445
4446
4447
4448
4449
4450
4451
4452
4453
4454static void __ena_shutoff(struct pci_dev *pdev, bool shutdown)
4455{
4456 struct ena_adapter *adapter = pci_get_drvdata(pdev);
4457 struct ena_com_dev *ena_dev;
4458 struct net_device *netdev;
4459
4460 ena_dev = adapter->ena_dev;
4461 netdev = adapter->netdev;
4462
4463#ifdef CONFIG_RFS_ACCEL
4464 if ((adapter->msix_vecs >= 1) && (netdev->rx_cpu_rmap)) {
4465 free_irq_cpu_rmap(netdev->rx_cpu_rmap);
4466 netdev->rx_cpu_rmap = NULL;
4467 }
4468#endif
4469
4470
4471
4472
4473 del_timer_sync(&adapter->timer_service);
4474 cancel_work_sync(&adapter->reset_task);
4475
4476 rtnl_lock();
4477 adapter->reset_reason = ENA_REGS_RESET_SHUTDOWN;
4478 ena_destroy_device(adapter, true);
4479 if (shutdown) {
4480 netif_device_detach(netdev);
4481 dev_close(netdev);
4482 rtnl_unlock();
4483 } else {
4484 rtnl_unlock();
4485 unregister_netdev(netdev);
4486 free_netdev(netdev);
4487 }
4488
4489 ena_com_rss_destroy(ena_dev);
4490
4491 ena_com_delete_debug_area(ena_dev);
4492
4493 ena_com_delete_host_info(ena_dev);
4494
4495 ena_release_bars(ena_dev, pdev);
4496
4497 pci_disable_device(pdev);
4498
4499 vfree(ena_dev);
4500}
4501
4502
4503
4504
4505
4506
4507
4508
4509static void ena_remove(struct pci_dev *pdev)
4510{
4511 __ena_shutoff(pdev, false);
4512}
4513
4514
4515
4516
4517
4518
4519
4520
4521static void ena_shutdown(struct pci_dev *pdev)
4522{
4523 __ena_shutoff(pdev, true);
4524}
4525
4526
4527
4528
4529static int __maybe_unused ena_suspend(struct device *dev_d)
4530{
4531 struct pci_dev *pdev = to_pci_dev(dev_d);
4532 struct ena_adapter *adapter = pci_get_drvdata(pdev);
4533
4534 ena_increase_stat(&adapter->dev_stats.suspend, 1, &adapter->syncp);
4535
4536 rtnl_lock();
4537 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
4538 dev_err(&pdev->dev,
4539 "Ignoring device reset request as the device is being suspended\n");
4540 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
4541 }
4542 ena_destroy_device(adapter, true);
4543 rtnl_unlock();
4544 return 0;
4545}
4546
4547
4548
4549
4550static int __maybe_unused ena_resume(struct device *dev_d)
4551{
4552 struct ena_adapter *adapter = dev_get_drvdata(dev_d);
4553 int rc;
4554
4555 ena_increase_stat(&adapter->dev_stats.resume, 1, &adapter->syncp);
4556
4557 rtnl_lock();
4558 rc = ena_restore_device(adapter);
4559 rtnl_unlock();
4560 return rc;
4561}
4562
4563static SIMPLE_DEV_PM_OPS(ena_pm_ops, ena_suspend, ena_resume);
4564
4565static struct pci_driver ena_pci_driver = {
4566 .name = DRV_MODULE_NAME,
4567 .id_table = ena_pci_tbl,
4568 .probe = ena_probe,
4569 .remove = ena_remove,
4570 .shutdown = ena_shutdown,
4571 .driver.pm = &ena_pm_ops,
4572 .sriov_configure = pci_sriov_configure_simple,
4573};
4574
4575static int __init ena_init(void)
4576{
4577 ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME);
4578 if (!ena_wq) {
4579 pr_err("Failed to create workqueue\n");
4580 return -ENOMEM;
4581 }
4582
4583 return pci_register_driver(&ena_pci_driver);
4584}
4585
4586static void __exit ena_cleanup(void)
4587{
4588 pci_unregister_driver(&ena_pci_driver);
4589
4590 if (ena_wq) {
4591 destroy_workqueue(ena_wq);
4592 ena_wq = NULL;
4593 }
4594}
4595
4596
4597
4598
4599
4600
4601
4602static void ena_update_on_link_change(void *adapter_data,
4603 struct ena_admin_aenq_entry *aenq_e)
4604{
4605 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
4606 struct ena_admin_aenq_link_change_desc *aenq_desc =
4607 (struct ena_admin_aenq_link_change_desc *)aenq_e;
4608 int status = aenq_desc->flags &
4609 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK;
4610
4611 if (status) {
4612 netif_dbg(adapter, ifup, adapter->netdev, "%s\n", __func__);
4613 set_bit(ENA_FLAG_LINK_UP, &adapter->flags);
4614 if (!test_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags))
4615 netif_carrier_on(adapter->netdev);
4616 } else {
4617 clear_bit(ENA_FLAG_LINK_UP, &adapter->flags);
4618 netif_carrier_off(adapter->netdev);
4619 }
4620}
4621
4622static void ena_keep_alive_wd(void *adapter_data,
4623 struct ena_admin_aenq_entry *aenq_e)
4624{
4625 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
4626 struct ena_admin_aenq_keep_alive_desc *desc;
4627 u64 rx_drops;
4628 u64 tx_drops;
4629
4630 desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e;
4631 adapter->last_keep_alive_jiffies = jiffies;
4632
4633 rx_drops = ((u64)desc->rx_drops_high << 32) | desc->rx_drops_low;
4634 tx_drops = ((u64)desc->tx_drops_high << 32) | desc->tx_drops_low;
4635
4636 u64_stats_update_begin(&adapter->syncp);
4637
4638
4639
4640 adapter->dev_stats.rx_drops = rx_drops;
4641 adapter->dev_stats.tx_drops = tx_drops;
4642 u64_stats_update_end(&adapter->syncp);
4643}
4644
4645static void ena_notification(void *adapter_data,
4646 struct ena_admin_aenq_entry *aenq_e)
4647{
4648 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
4649 struct ena_admin_ena_hw_hints *hints;
4650
4651 WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION,
4652 "Invalid group(%x) expected %x\n",
4653 aenq_e->aenq_common_desc.group,
4654 ENA_ADMIN_NOTIFICATION);
4655
4656 switch (aenq_e->aenq_common_desc.syndrome) {
4657 case ENA_ADMIN_UPDATE_HINTS:
4658 hints = (struct ena_admin_ena_hw_hints *)
4659 (&aenq_e->inline_data_w4);
4660 ena_update_hints(adapter, hints);
4661 break;
4662 default:
4663 netif_err(adapter, drv, adapter->netdev,
4664 "Invalid aenq notification link state %d\n",
4665 aenq_e->aenq_common_desc.syndrome);
4666 }
4667}
4668
4669
4670static void unimplemented_aenq_handler(void *data,
4671 struct ena_admin_aenq_entry *aenq_e)
4672{
4673 struct ena_adapter *adapter = (struct ena_adapter *)data;
4674
4675 netif_err(adapter, drv, adapter->netdev,
4676 "Unknown event was received or event with unimplemented handler\n");
4677}
4678
4679static struct ena_aenq_handlers aenq_handlers = {
4680 .handlers = {
4681 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change,
4682 [ENA_ADMIN_NOTIFICATION] = ena_notification,
4683 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd,
4684 },
4685 .unimplemented_handler = unimplemented_aenq_handler
4686};
4687
4688module_init(ena_init);
4689module_exit(ena_cleanup);
4690