linux/drivers/net/ethernet/amazon/ena/ena_netdev.h
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   1/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
   2/*
   3 * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.
   4 */
   5
   6#ifndef ENA_H
   7#define ENA_H
   8
   9#include <linux/bitops.h>
  10#include <linux/dim.h>
  11#include <linux/etherdevice.h>
  12#include <linux/if_vlan.h>
  13#include <linux/inetdevice.h>
  14#include <linux/interrupt.h>
  15#include <linux/netdevice.h>
  16#include <linux/skbuff.h>
  17
  18#include "ena_com.h"
  19#include "ena_eth_com.h"
  20
  21#define DRV_MODULE_GEN_MAJOR    2
  22#define DRV_MODULE_GEN_MINOR    1
  23#define DRV_MODULE_GEN_SUBMINOR 0
  24
  25#define DRV_MODULE_NAME         "ena"
  26
  27#define DEVICE_NAME     "Elastic Network Adapter (ENA)"
  28
  29/* 1 for AENQ + ADMIN */
  30#define ENA_ADMIN_MSIX_VEC              1
  31#define ENA_MAX_MSIX_VEC(io_queues)     (ENA_ADMIN_MSIX_VEC + (io_queues))
  32
  33/* The ENA buffer length fields is 16 bit long. So when PAGE_SIZE == 64kB the
  34 * driver passes 0.
  35 * Since the max packet size the ENA handles is ~9kB limit the buffer length to
  36 * 16kB.
  37 */
  38#if PAGE_SIZE > SZ_16K
  39#define ENA_PAGE_SIZE (_AC(SZ_16K, UL))
  40#else
  41#define ENA_PAGE_SIZE PAGE_SIZE
  42#endif
  43
  44#define ENA_MIN_MSIX_VEC                2
  45
  46#define ENA_REG_BAR                     0
  47#define ENA_MEM_BAR                     2
  48#define ENA_BAR_MASK (BIT(ENA_REG_BAR) | BIT(ENA_MEM_BAR))
  49
  50#define ENA_DEFAULT_RING_SIZE   (1024)
  51#define ENA_MIN_RING_SIZE       (256)
  52
  53#define ENA_MIN_NUM_IO_QUEUES   (1)
  54
  55#define ENA_TX_WAKEUP_THRESH            (MAX_SKB_FRAGS + 2)
  56#define ENA_DEFAULT_RX_COPYBREAK        (256 - NET_IP_ALIGN)
  57
  58#define ENA_MIN_MTU             128
  59
  60#define ENA_NAME_MAX_LEN        20
  61#define ENA_IRQNAME_SIZE        40
  62
  63#define ENA_PKT_MAX_BUFS        19
  64
  65#define ENA_RX_RSS_TABLE_LOG_SIZE  7
  66#define ENA_RX_RSS_TABLE_SIZE   (1 << ENA_RX_RSS_TABLE_LOG_SIZE)
  67
  68/* The number of tx packet completions that will be handled each NAPI poll
  69 * cycle is ring_size / ENA_TX_POLL_BUDGET_DIVIDER.
  70 */
  71#define ENA_TX_POLL_BUDGET_DIVIDER      4
  72
  73/* Refill Rx queue when number of required descriptors is above
  74 * QUEUE_SIZE / ENA_RX_REFILL_THRESH_DIVIDER or ENA_RX_REFILL_THRESH_PACKET
  75 */
  76#define ENA_RX_REFILL_THRESH_DIVIDER    8
  77#define ENA_RX_REFILL_THRESH_PACKET     256
  78
  79/* Number of queues to check for missing queues per timer service */
  80#define ENA_MONITORED_TX_QUEUES 4
  81/* Max timeout packets before device reset */
  82#define MAX_NUM_OF_TIMEOUTED_PACKETS 128
  83
  84#define ENA_TX_RING_IDX_NEXT(idx, ring_size) (((idx) + 1) & ((ring_size) - 1))
  85
  86#define ENA_RX_RING_IDX_NEXT(idx, ring_size) (((idx) + 1) & ((ring_size) - 1))
  87#define ENA_RX_RING_IDX_ADD(idx, n, ring_size) \
  88        (((idx) + (n)) & ((ring_size) - 1))
  89
  90#define ENA_IO_TXQ_IDX(q)       (2 * (q))
  91#define ENA_IO_RXQ_IDX(q)       (2 * (q) + 1)
  92#define ENA_IO_TXQ_IDX_TO_COMBINED_IDX(q)       ((q) / 2)
  93#define ENA_IO_RXQ_IDX_TO_COMBINED_IDX(q)       (((q) - 1) / 2)
  94
  95#define ENA_MGMNT_IRQ_IDX               0
  96#define ENA_IO_IRQ_FIRST_IDX            1
  97#define ENA_IO_IRQ_IDX(q)               (ENA_IO_IRQ_FIRST_IDX + (q))
  98
  99#define ENA_ADMIN_POLL_DELAY_US 100
 100
 101/* ENA device should send keep alive msg every 1 sec.
 102 * We wait for 6 sec just to be on the safe side.
 103 */
 104#define ENA_DEVICE_KALIVE_TIMEOUT       (6 * HZ)
 105#define ENA_MAX_NO_INTERRUPT_ITERATIONS 3
 106
 107#define ENA_MMIO_DISABLE_REG_READ       BIT(0)
 108
 109/* The max MTU size is configured to be the ethernet frame size without
 110 * the overhead of the ethernet header, which can have a VLAN header, and
 111 * a frame check sequence (FCS).
 112 * The buffer size we share with the device is defined to be ENA_PAGE_SIZE
 113 */
 114
 115#define ENA_XDP_MAX_MTU (ENA_PAGE_SIZE - ETH_HLEN - ETH_FCS_LEN -       \
 116                         VLAN_HLEN - XDP_PACKET_HEADROOM -              \
 117                         SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
 118
 119#define ENA_IS_XDP_INDEX(adapter, index) (((index) >= (adapter)->xdp_first_ring) && \
 120        ((index) < (adapter)->xdp_first_ring + (adapter)->xdp_num_queues))
 121
 122struct ena_irq {
 123        irq_handler_t handler;
 124        void *data;
 125        int cpu;
 126        u32 vector;
 127        cpumask_t affinity_hint_mask;
 128        char name[ENA_IRQNAME_SIZE];
 129};
 130
 131struct ena_napi {
 132        u8 first_interrupt ____cacheline_aligned;
 133        u8 interrupts_masked;
 134        struct napi_struct napi;
 135        struct ena_ring *tx_ring;
 136        struct ena_ring *rx_ring;
 137        struct ena_ring *xdp_ring;
 138        u32 qid;
 139        struct dim dim;
 140};
 141
 142struct ena_calc_queue_size_ctx {
 143        struct ena_com_dev_get_features_ctx *get_feat_ctx;
 144        struct ena_com_dev *ena_dev;
 145        struct pci_dev *pdev;
 146        u32 tx_queue_size;
 147        u32 rx_queue_size;
 148        u32 max_tx_queue_size;
 149        u32 max_rx_queue_size;
 150        u16 max_tx_sgl_size;
 151        u16 max_rx_sgl_size;
 152};
 153
 154struct ena_tx_buffer {
 155        struct sk_buff *skb;
 156        /* num of ena desc for this specific skb
 157         * (includes data desc and metadata desc)
 158         */
 159        u32 tx_descs;
 160        /* num of buffers used by this skb */
 161        u32 num_of_bufs;
 162
 163        /* XDP buffer structure which is used for sending packets in
 164         * the xdp queues
 165         */
 166        struct xdp_frame *xdpf;
 167
 168        /* Indicate if bufs[0] map the linear data of the skb. */
 169        u8 map_linear_data;
 170
 171        /* Used for detect missing tx packets to limit the number of prints */
 172        u32 print_once;
 173        /* Save the last jiffies to detect missing tx packets
 174         *
 175         * sets to non zero value on ena_start_xmit and set to zero on
 176         * napi and timer_Service_routine.
 177         *
 178         * while this value is not protected by lock,
 179         * a given packet is not expected to be handled by ena_start_xmit
 180         * and by napi/timer_service at the same time.
 181         */
 182        unsigned long last_jiffies;
 183        struct ena_com_buf bufs[ENA_PKT_MAX_BUFS];
 184} ____cacheline_aligned;
 185
 186struct ena_rx_buffer {
 187        struct sk_buff *skb;
 188        struct page *page;
 189        u32 page_offset;
 190        struct ena_com_buf ena_buf;
 191} ____cacheline_aligned;
 192
 193struct ena_stats_tx {
 194        u64 cnt;
 195        u64 bytes;
 196        u64 queue_stop;
 197        u64 prepare_ctx_err;
 198        u64 queue_wakeup;
 199        u64 dma_mapping_err;
 200        u64 linearize;
 201        u64 linearize_failed;
 202        u64 napi_comp;
 203        u64 tx_poll;
 204        u64 doorbells;
 205        u64 bad_req_id;
 206        u64 llq_buffer_copy;
 207        u64 missed_tx;
 208        u64 unmask_interrupt;
 209        u64 last_napi_jiffies;
 210};
 211
 212struct ena_stats_rx {
 213        u64 cnt;
 214        u64 bytes;
 215        u64 rx_copybreak_pkt;
 216        u64 csum_good;
 217        u64 refil_partial;
 218        u64 bad_csum;
 219        u64 page_alloc_fail;
 220        u64 skb_alloc_fail;
 221        u64 dma_mapping_err;
 222        u64 bad_desc_num;
 223        u64 bad_req_id;
 224        u64 empty_rx_ring;
 225        u64 csum_unchecked;
 226        u64 xdp_aborted;
 227        u64 xdp_drop;
 228        u64 xdp_pass;
 229        u64 xdp_tx;
 230        u64 xdp_invalid;
 231        u64 xdp_redirect;
 232};
 233
 234struct ena_ring {
 235        /* Holds the empty requests for TX/RX
 236         * out of order completions
 237         */
 238        u16 *free_ids;
 239
 240        union {
 241                struct ena_tx_buffer *tx_buffer_info;
 242                struct ena_rx_buffer *rx_buffer_info;
 243        };
 244
 245        /* cache ptr to avoid using the adapter */
 246        struct device *dev;
 247        struct pci_dev *pdev;
 248        struct napi_struct *napi;
 249        struct net_device *netdev;
 250        struct ena_com_dev *ena_dev;
 251        struct ena_adapter *adapter;
 252        struct ena_com_io_cq *ena_com_io_cq;
 253        struct ena_com_io_sq *ena_com_io_sq;
 254        struct bpf_prog *xdp_bpf_prog;
 255        struct xdp_rxq_info xdp_rxq;
 256        spinlock_t xdp_tx_lock; /* synchronize XDP TX/Redirect traffic */
 257        /* Used for rx queues only to point to the xdp tx ring, to
 258         * which traffic should be redirected from this rx ring.
 259         */
 260        struct ena_ring *xdp_ring;
 261
 262        u16 next_to_use;
 263        u16 next_to_clean;
 264        u16 rx_copybreak;
 265        u16 rx_headroom;
 266        u16 qid;
 267        u16 mtu;
 268        u16 sgl_size;
 269
 270        /* The maximum header length the device can handle */
 271        u8 tx_max_header_size;
 272
 273        bool disable_meta_caching;
 274        u16 no_interrupt_event_cnt;
 275
 276        /* cpu for TPH */
 277        int cpu;
 278         /* number of tx/rx_buffer_info's entries */
 279        int ring_size;
 280
 281        enum ena_admin_placement_policy_type tx_mem_queue_type;
 282
 283        struct ena_com_rx_buf_info ena_bufs[ENA_PKT_MAX_BUFS];
 284        u32  smoothed_interval;
 285        u32  per_napi_packets;
 286        u16 non_empty_napi_events;
 287        struct u64_stats_sync syncp;
 288        union {
 289                struct ena_stats_tx tx_stats;
 290                struct ena_stats_rx rx_stats;
 291        };
 292
 293        u8 *push_buf_intermediate_buf;
 294        int empty_rx_queue;
 295} ____cacheline_aligned;
 296
 297struct ena_stats_dev {
 298        u64 tx_timeout;
 299        u64 suspend;
 300        u64 resume;
 301        u64 wd_expired;
 302        u64 interface_up;
 303        u64 interface_down;
 304        u64 admin_q_pause;
 305        u64 rx_drops;
 306        u64 tx_drops;
 307};
 308
 309enum ena_flags_t {
 310        ENA_FLAG_DEVICE_RUNNING,
 311        ENA_FLAG_DEV_UP,
 312        ENA_FLAG_LINK_UP,
 313        ENA_FLAG_MSIX_ENABLED,
 314        ENA_FLAG_TRIGGER_RESET,
 315        ENA_FLAG_ONGOING_RESET
 316};
 317
 318/* adapter specific private data structure */
 319struct ena_adapter {
 320        struct ena_com_dev *ena_dev;
 321        /* OS defined structs */
 322        struct net_device *netdev;
 323        struct pci_dev *pdev;
 324
 325        /* rx packets that shorter that this len will be copied to the skb
 326         * header
 327         */
 328        u32 rx_copybreak;
 329        u32 max_mtu;
 330
 331        u32 num_io_queues;
 332        u32 max_num_io_queues;
 333
 334        int msix_vecs;
 335
 336        u32 missing_tx_completion_threshold;
 337
 338        u32 requested_tx_ring_size;
 339        u32 requested_rx_ring_size;
 340
 341        u32 max_tx_ring_size;
 342        u32 max_rx_ring_size;
 343
 344        u32 msg_enable;
 345
 346        u16 max_tx_sgl_size;
 347        u16 max_rx_sgl_size;
 348
 349        u8 mac_addr[ETH_ALEN];
 350
 351        unsigned long keep_alive_timeout;
 352        unsigned long missing_tx_completion_to;
 353
 354        char name[ENA_NAME_MAX_LEN];
 355
 356        unsigned long flags;
 357        /* TX */
 358        struct ena_ring tx_ring[ENA_MAX_NUM_IO_QUEUES]
 359                ____cacheline_aligned_in_smp;
 360
 361        /* RX */
 362        struct ena_ring rx_ring[ENA_MAX_NUM_IO_QUEUES]
 363                ____cacheline_aligned_in_smp;
 364
 365        struct ena_napi ena_napi[ENA_MAX_NUM_IO_QUEUES];
 366
 367        struct ena_irq irq_tbl[ENA_MAX_MSIX_VEC(ENA_MAX_NUM_IO_QUEUES)];
 368
 369        /* timer service */
 370        struct work_struct reset_task;
 371        struct timer_list timer_service;
 372
 373        bool wd_state;
 374        bool dev_up_before_reset;
 375        bool disable_meta_caching;
 376        unsigned long last_keep_alive_jiffies;
 377
 378        struct u64_stats_sync syncp;
 379        struct ena_stats_dev dev_stats;
 380        struct ena_admin_eni_stats eni_stats;
 381        bool eni_stats_supported;
 382
 383        /* last queue index that was checked for uncompleted tx packets */
 384        u32 last_monitored_tx_qid;
 385
 386        enum ena_regs_reset_reason_types reset_reason;
 387
 388        struct bpf_prog *xdp_bpf_prog;
 389        u32 xdp_first_ring;
 390        u32 xdp_num_queues;
 391};
 392
 393void ena_set_ethtool_ops(struct net_device *netdev);
 394
 395void ena_dump_stats_to_dmesg(struct ena_adapter *adapter);
 396
 397void ena_dump_stats_to_buf(struct ena_adapter *adapter, u8 *buf);
 398
 399int ena_update_hw_stats(struct ena_adapter *adapter);
 400
 401int ena_update_queue_sizes(struct ena_adapter *adapter,
 402                           u32 new_tx_size,
 403                           u32 new_rx_size);
 404
 405int ena_update_queue_count(struct ena_adapter *adapter, u32 new_channel_count);
 406
 407int ena_get_sset_count(struct net_device *netdev, int sset);
 408
 409enum ena_xdp_errors_t {
 410        ENA_XDP_ALLOWED = 0,
 411        ENA_XDP_CURRENT_MTU_TOO_LARGE,
 412        ENA_XDP_NO_ENOUGH_QUEUES,
 413};
 414
 415static inline bool ena_xdp_present(struct ena_adapter *adapter)
 416{
 417        return !!adapter->xdp_bpf_prog;
 418}
 419
 420static inline bool ena_xdp_present_ring(struct ena_ring *ring)
 421{
 422        return !!ring->xdp_bpf_prog;
 423}
 424
 425static inline bool ena_xdp_legal_queue_count(struct ena_adapter *adapter,
 426                                             u32 queues)
 427{
 428        return 2 * queues <= adapter->max_num_io_queues;
 429}
 430
 431static inline enum ena_xdp_errors_t ena_xdp_allowed(struct ena_adapter *adapter)
 432{
 433        enum ena_xdp_errors_t rc = ENA_XDP_ALLOWED;
 434
 435        if (adapter->netdev->mtu > ENA_XDP_MAX_MTU)
 436                rc = ENA_XDP_CURRENT_MTU_TOO_LARGE;
 437        else if (!ena_xdp_legal_queue_count(adapter, adapter->num_io_queues))
 438                rc = ENA_XDP_NO_ENOUGH_QUEUES;
 439
 440        return rc;
 441}
 442
 443#endif /* !(ENA_H) */
 444