linux/drivers/net/ethernet/aquantia/atlantic/macsec/MSS_Egress_registers.h
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   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/* Atlantic Network Driver
   3 * Copyright (C) 2020 Marvell International Ltd.
   4 */
   5
   6#ifndef MSS_EGRESS_REGS_HEADER
   7#define MSS_EGRESS_REGS_HEADER
   8
   9#define MSS_EGRESS_CTL_REGISTER_ADDR 0x00005002
  10#define MSS_EGRESS_SA_EXPIRED_STATUS_REGISTER_ADDR 0x00005060
  11#define MSS_EGRESS_SA_THRESHOLD_EXPIRED_STATUS_REGISTER_ADDR 0x00005062
  12#define MSS_EGRESS_LUT_ADDR_CTL_REGISTER_ADDR 0x00005080
  13#define MSS_EGRESS_LUT_CTL_REGISTER_ADDR 0x00005081
  14#define MSS_EGRESS_LUT_DATA_CTL_REGISTER_ADDR 0x000050A0
  15
  16struct mss_egress_ctl_register {
  17        union {
  18                struct {
  19                        unsigned int soft_reset : 1;
  20                        unsigned int drop_kay_packet : 1;
  21                        unsigned int drop_egprc_lut_miss : 1;
  22                        unsigned int gcm_start : 1;
  23                        unsigned int gcm_test_mode : 1;
  24                        unsigned int unmatched_use_sc_0 : 1;
  25                        unsigned int drop_invalid_sa_sc_packets : 1;
  26                        unsigned int reserved0 : 1;
  27                        /* Should always be set to 0. */
  28                        unsigned int external_classification_enable : 1;
  29                        unsigned int icv_lsb_8bytes_enable : 1;
  30                        unsigned int high_prio : 1;
  31                        unsigned int clear_counter : 1;
  32                        unsigned int clear_global_time : 1;
  33                        unsigned int ethertype_explicit_sectag_lsb : 3;
  34                } bits_0;
  35                unsigned short word_0;
  36        };
  37        union {
  38                struct {
  39                        unsigned int ethertype_explicit_sectag_msb : 13;
  40                        unsigned int reserved0 : 3;
  41                } bits_1;
  42                unsigned short word_1;
  43        };
  44};
  45
  46struct mss_egress_lut_addr_ctl_register {
  47        union {
  48                struct {
  49                        unsigned int lut_addr : 9;
  50                        unsigned int reserved0 : 3;
  51                        /* 0x0 : Egress MAC Control FIlter (CTLF) LUT
  52                         * 0x1 : Egress Classification LUT
  53                         * 0x2 : Egress SC/SA LUT
  54                         * 0x3 : Egress SMIB
  55                         */
  56                        unsigned int lut_select : 4;
  57                } bits_0;
  58                unsigned short word_0;
  59        };
  60};
  61
  62struct mss_egress_lut_ctl_register {
  63        union {
  64                struct {
  65                        unsigned int reserved0 : 14;
  66                        unsigned int lut_read : 1;
  67                        unsigned int lut_write : 1;
  68                } bits_0;
  69                unsigned short word_0;
  70        };
  71};
  72
  73#endif /* MSS_EGRESS_REGS_HEADER */
  74