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7#ifndef _GVE_ADMINQ_H
8#define _GVE_ADMINQ_H
9
10#include <linux/build_bug.h>
11
12
13enum gve_adminq_opcodes {
14 GVE_ADMINQ_DESCRIBE_DEVICE = 0x1,
15 GVE_ADMINQ_CONFIGURE_DEVICE_RESOURCES = 0x2,
16 GVE_ADMINQ_REGISTER_PAGE_LIST = 0x3,
17 GVE_ADMINQ_UNREGISTER_PAGE_LIST = 0x4,
18 GVE_ADMINQ_CREATE_TX_QUEUE = 0x5,
19 GVE_ADMINQ_CREATE_RX_QUEUE = 0x6,
20 GVE_ADMINQ_DESTROY_TX_QUEUE = 0x7,
21 GVE_ADMINQ_DESTROY_RX_QUEUE = 0x8,
22 GVE_ADMINQ_DECONFIGURE_DEVICE_RESOURCES = 0x9,
23 GVE_ADMINQ_SET_DRIVER_PARAMETER = 0xB,
24 GVE_ADMINQ_REPORT_STATS = 0xC,
25 GVE_ADMINQ_REPORT_LINK_SPEED = 0xD,
26 GVE_ADMINQ_GET_PTYPE_MAP = 0xE,
27};
28
29
30enum gve_adminq_statuses {
31 GVE_ADMINQ_COMMAND_UNSET = 0x0,
32 GVE_ADMINQ_COMMAND_PASSED = 0x1,
33 GVE_ADMINQ_COMMAND_ERROR_ABORTED = 0xFFFFFFF0,
34 GVE_ADMINQ_COMMAND_ERROR_ALREADY_EXISTS = 0xFFFFFFF1,
35 GVE_ADMINQ_COMMAND_ERROR_CANCELLED = 0xFFFFFFF2,
36 GVE_ADMINQ_COMMAND_ERROR_DATALOSS = 0xFFFFFFF3,
37 GVE_ADMINQ_COMMAND_ERROR_DEADLINE_EXCEEDED = 0xFFFFFFF4,
38 GVE_ADMINQ_COMMAND_ERROR_FAILED_PRECONDITION = 0xFFFFFFF5,
39 GVE_ADMINQ_COMMAND_ERROR_INTERNAL_ERROR = 0xFFFFFFF6,
40 GVE_ADMINQ_COMMAND_ERROR_INVALID_ARGUMENT = 0xFFFFFFF7,
41 GVE_ADMINQ_COMMAND_ERROR_NOT_FOUND = 0xFFFFFFF8,
42 GVE_ADMINQ_COMMAND_ERROR_OUT_OF_RANGE = 0xFFFFFFF9,
43 GVE_ADMINQ_COMMAND_ERROR_PERMISSION_DENIED = 0xFFFFFFFA,
44 GVE_ADMINQ_COMMAND_ERROR_UNAUTHENTICATED = 0xFFFFFFFB,
45 GVE_ADMINQ_COMMAND_ERROR_RESOURCE_EXHAUSTED = 0xFFFFFFFC,
46 GVE_ADMINQ_COMMAND_ERROR_UNAVAILABLE = 0xFFFFFFFD,
47 GVE_ADMINQ_COMMAND_ERROR_UNIMPLEMENTED = 0xFFFFFFFE,
48 GVE_ADMINQ_COMMAND_ERROR_UNKNOWN_ERROR = 0xFFFFFFFF,
49};
50
51#define GVE_ADMINQ_DEVICE_DESCRIPTOR_VERSION 1
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54
55
56
57struct gve_adminq_describe_device {
58 __be64 device_descriptor_addr;
59 __be32 device_descriptor_version;
60 __be32 available_length;
61};
62
63static_assert(sizeof(struct gve_adminq_describe_device) == 16);
64
65struct gve_device_descriptor {
66 __be64 max_registered_pages;
67 __be16 reserved1;
68 __be16 tx_queue_entries;
69 __be16 rx_queue_entries;
70 __be16 default_num_queues;
71 __be16 mtu;
72 __be16 counters;
73 __be16 tx_pages_per_qpl;
74 __be16 rx_pages_per_qpl;
75 u8 mac[ETH_ALEN];
76 __be16 num_device_options;
77 __be16 total_length;
78 u8 reserved2[6];
79};
80
81static_assert(sizeof(struct gve_device_descriptor) == 40);
82
83struct gve_device_option {
84 __be16 option_id;
85 __be16 option_length;
86 __be32 required_features_mask;
87};
88
89static_assert(sizeof(struct gve_device_option) == 8);
90
91struct gve_device_option_gqi_rda {
92 __be32 supported_features_mask;
93};
94
95static_assert(sizeof(struct gve_device_option_gqi_rda) == 4);
96
97struct gve_device_option_gqi_qpl {
98 __be32 supported_features_mask;
99};
100
101static_assert(sizeof(struct gve_device_option_gqi_qpl) == 4);
102
103struct gve_device_option_dqo_rda {
104 __be32 supported_features_mask;
105 __be16 tx_comp_ring_entries;
106 __be16 rx_buff_ring_entries;
107};
108
109static_assert(sizeof(struct gve_device_option_dqo_rda) == 8);
110
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117
118
119enum gve_dev_opt_id {
120 GVE_DEV_OPT_ID_GQI_RAW_ADDRESSING = 0x1,
121 GVE_DEV_OPT_ID_GQI_RDA = 0x2,
122 GVE_DEV_OPT_ID_GQI_QPL = 0x3,
123 GVE_DEV_OPT_ID_DQO_RDA = 0x4,
124};
125
126enum gve_dev_opt_req_feat_mask {
127 GVE_DEV_OPT_REQ_FEAT_MASK_GQI_RAW_ADDRESSING = 0x0,
128 GVE_DEV_OPT_REQ_FEAT_MASK_GQI_RDA = 0x0,
129 GVE_DEV_OPT_REQ_FEAT_MASK_GQI_QPL = 0x0,
130 GVE_DEV_OPT_REQ_FEAT_MASK_DQO_RDA = 0x0,
131};
132
133#define GVE_DEV_OPT_LEN_GQI_RAW_ADDRESSING 0x0
134
135struct gve_adminq_configure_device_resources {
136 __be64 counter_array;
137 __be64 irq_db_addr;
138 __be32 num_counters;
139 __be32 num_irq_dbs;
140 __be32 irq_db_stride;
141 __be32 ntfy_blk_msix_base_idx;
142 u8 queue_format;
143 u8 padding[7];
144};
145
146static_assert(sizeof(struct gve_adminq_configure_device_resources) == 40);
147
148struct gve_adminq_register_page_list {
149 __be32 page_list_id;
150 __be32 num_pages;
151 __be64 page_address_list_addr;
152};
153
154static_assert(sizeof(struct gve_adminq_register_page_list) == 16);
155
156struct gve_adminq_unregister_page_list {
157 __be32 page_list_id;
158};
159
160static_assert(sizeof(struct gve_adminq_unregister_page_list) == 4);
161
162#define GVE_RAW_ADDRESSING_QPL_ID 0xFFFFFFFF
163
164struct gve_adminq_create_tx_queue {
165 __be32 queue_id;
166 __be32 reserved;
167 __be64 queue_resources_addr;
168 __be64 tx_ring_addr;
169 __be32 queue_page_list_id;
170 __be32 ntfy_id;
171 __be64 tx_comp_ring_addr;
172 __be16 tx_ring_size;
173 __be16 tx_comp_ring_size;
174 u8 padding[4];
175};
176
177static_assert(sizeof(struct gve_adminq_create_tx_queue) == 48);
178
179struct gve_adminq_create_rx_queue {
180 __be32 queue_id;
181 __be32 index;
182 __be32 reserved;
183 __be32 ntfy_id;
184 __be64 queue_resources_addr;
185 __be64 rx_desc_ring_addr;
186 __be64 rx_data_ring_addr;
187 __be32 queue_page_list_id;
188 __be16 rx_ring_size;
189 __be16 packet_buffer_size;
190 __be16 rx_buff_ring_size;
191 u8 enable_rsc;
192 u8 padding[5];
193};
194
195static_assert(sizeof(struct gve_adminq_create_rx_queue) == 56);
196
197
198struct gve_queue_resources {
199 union {
200 struct {
201 __be32 db_index;
202 __be32 counter_index;
203 };
204 u8 reserved[64];
205 };
206};
207
208static_assert(sizeof(struct gve_queue_resources) == 64);
209
210struct gve_adminq_destroy_tx_queue {
211 __be32 queue_id;
212};
213
214static_assert(sizeof(struct gve_adminq_destroy_tx_queue) == 4);
215
216struct gve_adminq_destroy_rx_queue {
217 __be32 queue_id;
218};
219
220static_assert(sizeof(struct gve_adminq_destroy_rx_queue) == 4);
221
222
223enum gve_set_driver_param_types {
224 GVE_SET_PARAM_MTU = 0x1,
225};
226
227struct gve_adminq_set_driver_parameter {
228 __be32 parameter_type;
229 u8 reserved[4];
230 __be64 parameter_value;
231};
232
233static_assert(sizeof(struct gve_adminq_set_driver_parameter) == 16);
234
235struct gve_adminq_report_stats {
236 __be64 stats_report_len;
237 __be64 stats_report_addr;
238 __be64 interval;
239};
240
241static_assert(sizeof(struct gve_adminq_report_stats) == 24);
242
243struct gve_adminq_report_link_speed {
244 __be64 link_speed_address;
245};
246
247static_assert(sizeof(struct gve_adminq_report_link_speed) == 8);
248
249struct stats {
250 __be32 stat_name;
251 __be32 queue_id;
252 __be64 value;
253};
254
255static_assert(sizeof(struct stats) == 16);
256
257struct gve_stats_report {
258 __be64 written_count;
259 struct stats stats[];
260};
261
262static_assert(sizeof(struct gve_stats_report) == 8);
263
264enum gve_stat_names {
265
266 TX_WAKE_CNT = 1,
267 TX_STOP_CNT = 2,
268 TX_FRAMES_SENT = 3,
269 TX_BYTES_SENT = 4,
270 TX_LAST_COMPLETION_PROCESSED = 5,
271 RX_NEXT_EXPECTED_SEQUENCE = 6,
272 RX_BUFFERS_POSTED = 7,
273
274 RX_QUEUE_DROP_CNT = 65,
275 RX_NO_BUFFERS_POSTED = 66,
276 RX_DROPS_PACKET_OVER_MRU = 67,
277 RX_DROPS_INVALID_CHECKSUM = 68,
278};
279
280enum gve_l3_type {
281
282 GVE_L3_TYPE_UNKNOWN = 0,
283 GVE_L3_TYPE_OTHER,
284 GVE_L3_TYPE_IPV4,
285 GVE_L3_TYPE_IPV6,
286};
287
288enum gve_l4_type {
289
290 GVE_L4_TYPE_UNKNOWN = 0,
291 GVE_L4_TYPE_OTHER,
292 GVE_L4_TYPE_TCP,
293 GVE_L4_TYPE_UDP,
294 GVE_L4_TYPE_ICMP,
295 GVE_L4_TYPE_SCTP,
296};
297
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300
301struct gve_ptype_entry {
302 u8 l3_type;
303 u8 l4_type;
304};
305
306struct gve_ptype_map {
307 struct gve_ptype_entry ptypes[1 << 10];
308};
309
310struct gve_adminq_get_ptype_map {
311 __be64 ptype_map_len;
312 __be64 ptype_map_addr;
313};
314
315union gve_adminq_command {
316 struct {
317 __be32 opcode;
318 __be32 status;
319 union {
320 struct gve_adminq_configure_device_resources
321 configure_device_resources;
322 struct gve_adminq_create_tx_queue create_tx_queue;
323 struct gve_adminq_create_rx_queue create_rx_queue;
324 struct gve_adminq_destroy_tx_queue destroy_tx_queue;
325 struct gve_adminq_destroy_rx_queue destroy_rx_queue;
326 struct gve_adminq_describe_device describe_device;
327 struct gve_adminq_register_page_list reg_page_list;
328 struct gve_adminq_unregister_page_list unreg_page_list;
329 struct gve_adminq_set_driver_parameter set_driver_param;
330 struct gve_adminq_report_stats report_stats;
331 struct gve_adminq_report_link_speed report_link_speed;
332 struct gve_adminq_get_ptype_map get_ptype_map;
333 };
334 };
335 u8 reserved[64];
336};
337
338static_assert(sizeof(union gve_adminq_command) == 64);
339
340int gve_adminq_alloc(struct device *dev, struct gve_priv *priv);
341void gve_adminq_free(struct device *dev, struct gve_priv *priv);
342void gve_adminq_release(struct gve_priv *priv);
343int gve_adminq_describe_device(struct gve_priv *priv);
344int gve_adminq_configure_device_resources(struct gve_priv *priv,
345 dma_addr_t counter_array_bus_addr,
346 u32 num_counters,
347 dma_addr_t db_array_bus_addr,
348 u32 num_ntfy_blks);
349int gve_adminq_deconfigure_device_resources(struct gve_priv *priv);
350int gve_adminq_create_tx_queues(struct gve_priv *priv, u32 num_queues);
351int gve_adminq_destroy_tx_queues(struct gve_priv *priv, u32 queue_id);
352int gve_adminq_create_rx_queues(struct gve_priv *priv, u32 num_queues);
353int gve_adminq_destroy_rx_queues(struct gve_priv *priv, u32 queue_id);
354int gve_adminq_register_page_list(struct gve_priv *priv,
355 struct gve_queue_page_list *qpl);
356int gve_adminq_unregister_page_list(struct gve_priv *priv, u32 page_list_id);
357int gve_adminq_set_mtu(struct gve_priv *priv, u64 mtu);
358int gve_adminq_report_stats(struct gve_priv *priv, u64 stats_report_len,
359 dma_addr_t stats_report_addr, u64 interval);
360int gve_adminq_report_link_speed(struct gve_priv *priv);
361
362struct gve_ptype_lut;
363int gve_adminq_get_ptype_map_dqo(struct gve_priv *priv,
364 struct gve_ptype_lut *ptype_lut);
365
366#endif
367
