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125#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
126
127#include <linux/hardirq.h>
128#include <linux/interrupt.h>
129#include <linux/module.h>
130#include <linux/moduleparam.h>
131#include <linux/kernel.h>
132#include <linux/types.h>
133#include <linux/sched.h>
134#include <linux/slab.h>
135#include <linux/delay.h>
136#include <linux/init.h>
137#include <linux/pci.h>
138#include <linux/dma-mapping.h>
139#include <linux/dmapool.h>
140#include <linux/netdevice.h>
141#include <linux/etherdevice.h>
142#include <linux/mii.h>
143#include <linux/if_vlan.h>
144#include <linux/skbuff.h>
145#include <linux/ethtool.h>
146#include <linux/string.h>
147#include <linux/firmware.h>
148#include <linux/rtnetlink.h>
149#include <asm/unaligned.h>
150
151
152#define DRV_NAME "e100"
153#define DRV_DESCRIPTION "Intel(R) PRO/100 Network Driver"
154#define DRV_COPYRIGHT "Copyright(c) 1999-2006 Intel Corporation"
155
156#define E100_WATCHDOG_PERIOD (2 * HZ)
157#define E100_NAPI_WEIGHT 16
158
159#define FIRMWARE_D101M "e100/d101m_ucode.bin"
160#define FIRMWARE_D101S "e100/d101s_ucode.bin"
161#define FIRMWARE_D102E "e100/d102e_ucode.bin"
162
163MODULE_DESCRIPTION(DRV_DESCRIPTION);
164MODULE_AUTHOR(DRV_COPYRIGHT);
165MODULE_LICENSE("GPL v2");
166MODULE_FIRMWARE(FIRMWARE_D101M);
167MODULE_FIRMWARE(FIRMWARE_D101S);
168MODULE_FIRMWARE(FIRMWARE_D102E);
169
170static int debug = 3;
171static int eeprom_bad_csum_allow = 0;
172static int use_io = 0;
173module_param(debug, int, 0);
174module_param(eeprom_bad_csum_allow, int, 0);
175module_param(use_io, int, 0);
176MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
177MODULE_PARM_DESC(eeprom_bad_csum_allow, "Allow bad eeprom checksums");
178MODULE_PARM_DESC(use_io, "Force use of i/o access mode");
179
180#define INTEL_8255X_ETHERNET_DEVICE(device_id, ich) {\
181 PCI_VENDOR_ID_INTEL, device_id, PCI_ANY_ID, PCI_ANY_ID, \
182 PCI_CLASS_NETWORK_ETHERNET << 8, 0xFFFF00, ich }
183static const struct pci_device_id e100_id_table[] = {
184 INTEL_8255X_ETHERNET_DEVICE(0x1029, 0),
185 INTEL_8255X_ETHERNET_DEVICE(0x1030, 0),
186 INTEL_8255X_ETHERNET_DEVICE(0x1031, 3),
187 INTEL_8255X_ETHERNET_DEVICE(0x1032, 3),
188 INTEL_8255X_ETHERNET_DEVICE(0x1033, 3),
189 INTEL_8255X_ETHERNET_DEVICE(0x1034, 3),
190 INTEL_8255X_ETHERNET_DEVICE(0x1038, 3),
191 INTEL_8255X_ETHERNET_DEVICE(0x1039, 4),
192 INTEL_8255X_ETHERNET_DEVICE(0x103A, 4),
193 INTEL_8255X_ETHERNET_DEVICE(0x103B, 4),
194 INTEL_8255X_ETHERNET_DEVICE(0x103C, 4),
195 INTEL_8255X_ETHERNET_DEVICE(0x103D, 4),
196 INTEL_8255X_ETHERNET_DEVICE(0x103E, 4),
197 INTEL_8255X_ETHERNET_DEVICE(0x1050, 5),
198 INTEL_8255X_ETHERNET_DEVICE(0x1051, 5),
199 INTEL_8255X_ETHERNET_DEVICE(0x1052, 5),
200 INTEL_8255X_ETHERNET_DEVICE(0x1053, 5),
201 INTEL_8255X_ETHERNET_DEVICE(0x1054, 5),
202 INTEL_8255X_ETHERNET_DEVICE(0x1055, 5),
203 INTEL_8255X_ETHERNET_DEVICE(0x1056, 5),
204 INTEL_8255X_ETHERNET_DEVICE(0x1057, 5),
205 INTEL_8255X_ETHERNET_DEVICE(0x1059, 0),
206 INTEL_8255X_ETHERNET_DEVICE(0x1064, 6),
207 INTEL_8255X_ETHERNET_DEVICE(0x1065, 6),
208 INTEL_8255X_ETHERNET_DEVICE(0x1066, 6),
209 INTEL_8255X_ETHERNET_DEVICE(0x1067, 6),
210 INTEL_8255X_ETHERNET_DEVICE(0x1068, 6),
211 INTEL_8255X_ETHERNET_DEVICE(0x1069, 6),
212 INTEL_8255X_ETHERNET_DEVICE(0x106A, 6),
213 INTEL_8255X_ETHERNET_DEVICE(0x106B, 6),
214 INTEL_8255X_ETHERNET_DEVICE(0x1091, 7),
215 INTEL_8255X_ETHERNET_DEVICE(0x1092, 7),
216 INTEL_8255X_ETHERNET_DEVICE(0x1093, 7),
217 INTEL_8255X_ETHERNET_DEVICE(0x1094, 7),
218 INTEL_8255X_ETHERNET_DEVICE(0x1095, 7),
219 INTEL_8255X_ETHERNET_DEVICE(0x10fe, 7),
220 INTEL_8255X_ETHERNET_DEVICE(0x1209, 0),
221 INTEL_8255X_ETHERNET_DEVICE(0x1229, 0),
222 INTEL_8255X_ETHERNET_DEVICE(0x2449, 2),
223 INTEL_8255X_ETHERNET_DEVICE(0x2459, 2),
224 INTEL_8255X_ETHERNET_DEVICE(0x245D, 2),
225 INTEL_8255X_ETHERNET_DEVICE(0x27DC, 7),
226 { 0, }
227};
228MODULE_DEVICE_TABLE(pci, e100_id_table);
229
230enum mac {
231 mac_82557_D100_A = 0,
232 mac_82557_D100_B = 1,
233 mac_82557_D100_C = 2,
234 mac_82558_D101_A4 = 4,
235 mac_82558_D101_B0 = 5,
236 mac_82559_D101M = 8,
237 mac_82559_D101S = 9,
238 mac_82550_D102 = 12,
239 mac_82550_D102_C = 13,
240 mac_82551_E = 14,
241 mac_82551_F = 15,
242 mac_82551_10 = 16,
243 mac_unknown = 0xFF,
244};
245
246enum phy {
247 phy_100a = 0x000003E0,
248 phy_100c = 0x035002A8,
249 phy_82555_tx = 0x015002A8,
250 phy_nsc_tx = 0x5C002000,
251 phy_82562_et = 0x033002A8,
252 phy_82562_em = 0x032002A8,
253 phy_82562_ek = 0x031002A8,
254 phy_82562_eh = 0x017002A8,
255 phy_82552_v = 0xd061004d,
256 phy_unknown = 0xFFFFFFFF,
257};
258
259
260struct csr {
261 struct {
262 u8 status;
263 u8 stat_ack;
264 u8 cmd_lo;
265 u8 cmd_hi;
266 u32 gen_ptr;
267 } scb;
268 u32 port;
269 u16 flash_ctrl;
270 u8 eeprom_ctrl_lo;
271 u8 eeprom_ctrl_hi;
272 u32 mdi_ctrl;
273 u32 rx_dma_count;
274};
275
276enum scb_status {
277 rus_no_res = 0x08,
278 rus_ready = 0x10,
279 rus_mask = 0x3C,
280};
281
282enum ru_state {
283 RU_SUSPENDED = 0,
284 RU_RUNNING = 1,
285 RU_UNINITIALIZED = -1,
286};
287
288enum scb_stat_ack {
289 stat_ack_not_ours = 0x00,
290 stat_ack_sw_gen = 0x04,
291 stat_ack_rnr = 0x10,
292 stat_ack_cu_idle = 0x20,
293 stat_ack_frame_rx = 0x40,
294 stat_ack_cu_cmd_done = 0x80,
295 stat_ack_not_present = 0xFF,
296 stat_ack_rx = (stat_ack_sw_gen | stat_ack_rnr | stat_ack_frame_rx),
297 stat_ack_tx = (stat_ack_cu_idle | stat_ack_cu_cmd_done),
298};
299
300enum scb_cmd_hi {
301 irq_mask_none = 0x00,
302 irq_mask_all = 0x01,
303 irq_sw_gen = 0x02,
304};
305
306enum scb_cmd_lo {
307 cuc_nop = 0x00,
308 ruc_start = 0x01,
309 ruc_load_base = 0x06,
310 cuc_start = 0x10,
311 cuc_resume = 0x20,
312 cuc_dump_addr = 0x40,
313 cuc_dump_stats = 0x50,
314 cuc_load_base = 0x60,
315 cuc_dump_reset = 0x70,
316};
317
318enum cuc_dump {
319 cuc_dump_complete = 0x0000A005,
320 cuc_dump_reset_complete = 0x0000A007,
321};
322
323enum port {
324 software_reset = 0x0000,
325 selftest = 0x0001,
326 selective_reset = 0x0002,
327};
328
329enum eeprom_ctrl_lo {
330 eesk = 0x01,
331 eecs = 0x02,
332 eedi = 0x04,
333 eedo = 0x08,
334};
335
336enum mdi_ctrl {
337 mdi_write = 0x04000000,
338 mdi_read = 0x08000000,
339 mdi_ready = 0x10000000,
340};
341
342enum eeprom_op {
343 op_write = 0x05,
344 op_read = 0x06,
345 op_ewds = 0x10,
346 op_ewen = 0x13,
347};
348
349enum eeprom_offsets {
350 eeprom_cnfg_mdix = 0x03,
351 eeprom_phy_iface = 0x06,
352 eeprom_id = 0x0A,
353 eeprom_config_asf = 0x0D,
354 eeprom_smbus_addr = 0x90,
355};
356
357enum eeprom_cnfg_mdix {
358 eeprom_mdix_enabled = 0x0080,
359};
360
361enum eeprom_phy_iface {
362 NoSuchPhy = 0,
363 I82553AB,
364 I82553C,
365 I82503,
366 DP83840,
367 S80C240,
368 S80C24,
369 I82555,
370 DP83840A = 10,
371};
372
373enum eeprom_id {
374 eeprom_id_wol = 0x0020,
375};
376
377enum eeprom_config_asf {
378 eeprom_asf = 0x8000,
379 eeprom_gcl = 0x4000,
380};
381
382enum cb_status {
383 cb_complete = 0x8000,
384 cb_ok = 0x2000,
385};
386
387
388
389
390
391enum cb_command {
392 cb_nop = 0x0000,
393 cb_iaaddr = 0x0001,
394 cb_config = 0x0002,
395 cb_multi = 0x0003,
396 cb_tx = 0x0004,
397 cb_ucode = 0x0005,
398 cb_dump = 0x0006,
399 cb_tx_sf = 0x0008,
400 cb_tx_nc = 0x0010,
401 cb_cid = 0x1f00,
402 cb_i = 0x2000,
403 cb_s = 0x4000,
404 cb_el = 0x8000,
405};
406
407struct rfd {
408 __le16 status;
409 __le16 command;
410 __le32 link;
411 __le32 rbd;
412 __le16 actual_size;
413 __le16 size;
414};
415
416struct rx {
417 struct rx *next, *prev;
418 struct sk_buff *skb;
419 dma_addr_t dma_addr;
420};
421
422#if defined(__BIG_ENDIAN_BITFIELD)
423#define X(a,b) b,a
424#else
425#define X(a,b) a,b
426#endif
427struct config {
428 u8 X(byte_count:6, pad0:2);
429 u8 X(X(rx_fifo_limit:4, tx_fifo_limit:3), pad1:1);
430 u8 adaptive_ifs;
431 u8 X(X(X(X(mwi_enable:1, type_enable:1), read_align_enable:1),
432 term_write_cache_line:1), pad3:4);
433 u8 X(rx_dma_max_count:7, pad4:1);
434 u8 X(tx_dma_max_count:7, dma_max_count_enable:1);
435 u8 X(X(X(X(X(X(X(late_scb_update:1, direct_rx_dma:1),
436 tno_intr:1), cna_intr:1), standard_tcb:1), standard_stat_counter:1),
437 rx_save_overruns : 1), rx_save_bad_frames : 1);
438 u8 X(X(X(X(X(rx_discard_short_frames:1, tx_underrun_retry:2),
439 pad7:2), rx_extended_rfd:1), tx_two_frames_in_fifo:1),
440 tx_dynamic_tbd:1);
441 u8 X(X(mii_mode:1, pad8:6), csma_disabled:1);
442 u8 X(X(X(X(X(rx_tcpudp_checksum:1, pad9:3), vlan_arp_tco:1),
443 link_status_wake:1), arp_wake:1), mcmatch_wake:1);
444 u8 X(X(X(pad10:3, no_source_addr_insertion:1), preamble_length:2),
445 loopback:2);
446 u8 X(linear_priority:3, pad11:5);
447 u8 X(X(linear_priority_mode:1, pad12:3), ifs:4);
448 u8 ip_addr_lo;
449 u8 ip_addr_hi;
450 u8 X(X(X(X(X(X(X(promiscuous_mode:1, broadcast_disabled:1),
451 wait_after_win:1), pad15_1:1), ignore_ul_bit:1), crc_16_bit:1),
452 pad15_2:1), crs_or_cdt:1);
453 u8 fc_delay_lo;
454 u8 fc_delay_hi;
455 u8 X(X(X(X(X(rx_stripping:1, tx_padding:1), rx_crc_transfer:1),
456 rx_long_ok:1), fc_priority_threshold:3), pad18:1);
457 u8 X(X(X(X(X(X(X(addr_wake:1, magic_packet_disable:1),
458 fc_disable:1), fc_restop:1), fc_restart:1), fc_reject:1),
459 full_duplex_force:1), full_duplex_pin:1);
460 u8 X(X(X(pad20_1:5, fc_priority_location:1), multi_ia:1), pad20_2:1);
461 u8 X(X(pad21_1:3, multicast_all:1), pad21_2:4);
462 u8 X(X(rx_d102_mode:1, rx_vlan_drop:1), pad22:6);
463 u8 pad_d102[9];
464};
465
466#define E100_MAX_MULTICAST_ADDRS 64
467struct multi {
468 __le16 count;
469 u8 addr[E100_MAX_MULTICAST_ADDRS * ETH_ALEN + 2];
470};
471
472
473#define UCODE_SIZE 134
474struct cb {
475 __le16 status;
476 __le16 command;
477 __le32 link;
478 union {
479 u8 iaaddr[ETH_ALEN];
480 __le32 ucode[UCODE_SIZE];
481 struct config config;
482 struct multi multi;
483 struct {
484 u32 tbd_array;
485 u16 tcb_byte_count;
486 u8 threshold;
487 u8 tbd_count;
488 struct {
489 __le32 buf_addr;
490 __le16 size;
491 u16 eol;
492 } tbd;
493 } tcb;
494 __le32 dump_buffer_addr;
495 } u;
496 struct cb *next, *prev;
497 dma_addr_t dma_addr;
498 struct sk_buff *skb;
499};
500
501enum loopback {
502 lb_none = 0, lb_mac = 1, lb_phy = 3,
503};
504
505struct stats {
506 __le32 tx_good_frames, tx_max_collisions, tx_late_collisions,
507 tx_underruns, tx_lost_crs, tx_deferred, tx_single_collisions,
508 tx_multiple_collisions, tx_total_collisions;
509 __le32 rx_good_frames, rx_crc_errors, rx_alignment_errors,
510 rx_resource_errors, rx_overrun_errors, rx_cdt_errors,
511 rx_short_frame_errors;
512 __le32 fc_xmt_pause, fc_rcv_pause, fc_rcv_unsupported;
513 __le16 xmt_tco_frames, rcv_tco_frames;
514 __le32 complete;
515};
516
517struct mem {
518 struct {
519 u32 signature;
520 u32 result;
521 } selftest;
522 struct stats stats;
523 u8 dump_buf[596];
524};
525
526struct param_range {
527 u32 min;
528 u32 max;
529 u32 count;
530};
531
532struct params {
533 struct param_range rfds;
534 struct param_range cbs;
535};
536
537struct nic {
538
539 u32 msg_enable ____cacheline_aligned;
540 struct net_device *netdev;
541 struct pci_dev *pdev;
542 u16 (*mdio_ctrl)(struct nic *nic, u32 addr, u32 dir, u32 reg, u16 data);
543
544 struct rx *rxs ____cacheline_aligned;
545 struct rx *rx_to_use;
546 struct rx *rx_to_clean;
547 struct rfd blank_rfd;
548 enum ru_state ru_running;
549
550 spinlock_t cb_lock ____cacheline_aligned;
551 spinlock_t cmd_lock;
552 struct csr __iomem *csr;
553 enum scb_cmd_lo cuc_cmd;
554 unsigned int cbs_avail;
555 struct napi_struct napi;
556 struct cb *cbs;
557 struct cb *cb_to_use;
558 struct cb *cb_to_send;
559 struct cb *cb_to_clean;
560 __le16 tx_command;
561
562
563 enum {
564 ich = (1 << 0),
565 promiscuous = (1 << 1),
566 multicast_all = (1 << 2),
567 wol_magic = (1 << 3),
568 ich_10h_workaround = (1 << 4),
569 } flags ____cacheline_aligned;
570
571 enum mac mac;
572 enum phy phy;
573 struct params params;
574 struct timer_list watchdog;
575 struct mii_if_info mii;
576 struct work_struct tx_timeout_task;
577 enum loopback loopback;
578
579 struct mem *mem;
580 dma_addr_t dma_addr;
581
582 struct dma_pool *cbs_pool;
583 dma_addr_t cbs_dma_addr;
584 u8 adaptive_ifs;
585 u8 tx_threshold;
586 u32 tx_frames;
587 u32 tx_collisions;
588 u32 tx_deferred;
589 u32 tx_single_collisions;
590 u32 tx_multiple_collisions;
591 u32 tx_fc_pause;
592 u32 tx_tco_frames;
593
594 u32 rx_fc_pause;
595 u32 rx_fc_unsupported;
596 u32 rx_tco_frames;
597 u32 rx_short_frame_errors;
598 u32 rx_over_length_errors;
599
600 u16 eeprom_wc;
601 __le16 eeprom[256];
602 spinlock_t mdio_lock;
603 const struct firmware *fw;
604};
605
606static inline void e100_write_flush(struct nic *nic)
607{
608
609
610 (void)ioread8(&nic->csr->scb.status);
611}
612
613static void e100_enable_irq(struct nic *nic)
614{
615 unsigned long flags;
616
617 spin_lock_irqsave(&nic->cmd_lock, flags);
618 iowrite8(irq_mask_none, &nic->csr->scb.cmd_hi);
619 e100_write_flush(nic);
620 spin_unlock_irqrestore(&nic->cmd_lock, flags);
621}
622
623static void e100_disable_irq(struct nic *nic)
624{
625 unsigned long flags;
626
627 spin_lock_irqsave(&nic->cmd_lock, flags);
628 iowrite8(irq_mask_all, &nic->csr->scb.cmd_hi);
629 e100_write_flush(nic);
630 spin_unlock_irqrestore(&nic->cmd_lock, flags);
631}
632
633static void e100_hw_reset(struct nic *nic)
634{
635
636
637 iowrite32(selective_reset, &nic->csr->port);
638 e100_write_flush(nic); udelay(20);
639
640
641 iowrite32(software_reset, &nic->csr->port);
642 e100_write_flush(nic); udelay(20);
643
644
645 e100_disable_irq(nic);
646}
647
648static int e100_self_test(struct nic *nic)
649{
650 u32 dma_addr = nic->dma_addr + offsetof(struct mem, selftest);
651
652
653
654
655 nic->mem->selftest.signature = 0;
656 nic->mem->selftest.result = 0xFFFFFFFF;
657
658 iowrite32(selftest | dma_addr, &nic->csr->port);
659 e100_write_flush(nic);
660
661 msleep(10);
662
663
664 e100_disable_irq(nic);
665
666
667 if (nic->mem->selftest.result != 0) {
668 netif_err(nic, hw, nic->netdev,
669 "Self-test failed: result=0x%08X\n",
670 nic->mem->selftest.result);
671 return -ETIMEDOUT;
672 }
673 if (nic->mem->selftest.signature == 0) {
674 netif_err(nic, hw, nic->netdev, "Self-test failed: timed out\n");
675 return -ETIMEDOUT;
676 }
677
678 return 0;
679}
680
681static void e100_eeprom_write(struct nic *nic, u16 addr_len, u16 addr, __le16 data)
682{
683 u32 cmd_addr_data[3];
684 u8 ctrl;
685 int i, j;
686
687
688 cmd_addr_data[0] = op_ewen << (addr_len - 2);
689 cmd_addr_data[1] = (((op_write << addr_len) | addr) << 16) |
690 le16_to_cpu(data);
691 cmd_addr_data[2] = op_ewds << (addr_len - 2);
692
693
694 for (j = 0; j < 3; j++) {
695
696
697 iowrite8(eecs | eesk, &nic->csr->eeprom_ctrl_lo);
698 e100_write_flush(nic); udelay(4);
699
700 for (i = 31; i >= 0; i--) {
701 ctrl = (cmd_addr_data[j] & (1 << i)) ?
702 eecs | eedi : eecs;
703 iowrite8(ctrl, &nic->csr->eeprom_ctrl_lo);
704 e100_write_flush(nic); udelay(4);
705
706 iowrite8(ctrl | eesk, &nic->csr->eeprom_ctrl_lo);
707 e100_write_flush(nic); udelay(4);
708 }
709
710 msleep(10);
711
712
713 iowrite8(0, &nic->csr->eeprom_ctrl_lo);
714 e100_write_flush(nic); udelay(4);
715 }
716};
717
718
719static __le16 e100_eeprom_read(struct nic *nic, u16 *addr_len, u16 addr)
720{
721 u32 cmd_addr_data;
722 u16 data = 0;
723 u8 ctrl;
724 int i;
725
726 cmd_addr_data = ((op_read << *addr_len) | addr) << 16;
727
728
729 iowrite8(eecs | eesk, &nic->csr->eeprom_ctrl_lo);
730 e100_write_flush(nic); udelay(4);
731
732
733 for (i = 31; i >= 0; i--) {
734 ctrl = (cmd_addr_data & (1 << i)) ? eecs | eedi : eecs;
735 iowrite8(ctrl, &nic->csr->eeprom_ctrl_lo);
736 e100_write_flush(nic); udelay(4);
737
738 iowrite8(ctrl | eesk, &nic->csr->eeprom_ctrl_lo);
739 e100_write_flush(nic); udelay(4);
740
741
742
743 ctrl = ioread8(&nic->csr->eeprom_ctrl_lo);
744 if (!(ctrl & eedo) && i > 16) {
745 *addr_len -= (i - 16);
746 i = 17;
747 }
748
749 data = (data << 1) | (ctrl & eedo ? 1 : 0);
750 }
751
752
753 iowrite8(0, &nic->csr->eeprom_ctrl_lo);
754 e100_write_flush(nic); udelay(4);
755
756 return cpu_to_le16(data);
757};
758
759
760static int e100_eeprom_load(struct nic *nic)
761{
762 u16 addr, addr_len = 8, checksum = 0;
763
764
765 e100_eeprom_read(nic, &addr_len, 0);
766 nic->eeprom_wc = 1 << addr_len;
767
768 for (addr = 0; addr < nic->eeprom_wc; addr++) {
769 nic->eeprom[addr] = e100_eeprom_read(nic, &addr_len, addr);
770 if (addr < nic->eeprom_wc - 1)
771 checksum += le16_to_cpu(nic->eeprom[addr]);
772 }
773
774
775
776 if (cpu_to_le16(0xBABA - checksum) != nic->eeprom[nic->eeprom_wc - 1]) {
777 netif_err(nic, probe, nic->netdev, "EEPROM corrupted\n");
778 if (!eeprom_bad_csum_allow)
779 return -EAGAIN;
780 }
781
782 return 0;
783}
784
785
786static int e100_eeprom_save(struct nic *nic, u16 start, u16 count)
787{
788 u16 addr, addr_len = 8, checksum = 0;
789
790
791 e100_eeprom_read(nic, &addr_len, 0);
792 nic->eeprom_wc = 1 << addr_len;
793
794 if (start + count >= nic->eeprom_wc)
795 return -EINVAL;
796
797 for (addr = start; addr < start + count; addr++)
798 e100_eeprom_write(nic, addr_len, addr, nic->eeprom[addr]);
799
800
801
802 for (addr = 0; addr < nic->eeprom_wc - 1; addr++)
803 checksum += le16_to_cpu(nic->eeprom[addr]);
804 nic->eeprom[nic->eeprom_wc - 1] = cpu_to_le16(0xBABA - checksum);
805 e100_eeprom_write(nic, addr_len, nic->eeprom_wc - 1,
806 nic->eeprom[nic->eeprom_wc - 1]);
807
808 return 0;
809}
810
811#define E100_WAIT_SCB_TIMEOUT 20000
812#define E100_WAIT_SCB_FAST 20
813static int e100_exec_cmd(struct nic *nic, u8 cmd, dma_addr_t dma_addr)
814{
815 unsigned long flags;
816 unsigned int i;
817 int err = 0;
818
819 spin_lock_irqsave(&nic->cmd_lock, flags);
820
821
822 for (i = 0; i < E100_WAIT_SCB_TIMEOUT; i++) {
823 if (likely(!ioread8(&nic->csr->scb.cmd_lo)))
824 break;
825 cpu_relax();
826 if (unlikely(i > E100_WAIT_SCB_FAST))
827 udelay(5);
828 }
829 if (unlikely(i == E100_WAIT_SCB_TIMEOUT)) {
830 err = -EAGAIN;
831 goto err_unlock;
832 }
833
834 if (unlikely(cmd != cuc_resume))
835 iowrite32(dma_addr, &nic->csr->scb.gen_ptr);
836 iowrite8(cmd, &nic->csr->scb.cmd_lo);
837
838err_unlock:
839 spin_unlock_irqrestore(&nic->cmd_lock, flags);
840
841 return err;
842}
843
844static int e100_exec_cb(struct nic *nic, struct sk_buff *skb,
845 int (*cb_prepare)(struct nic *, struct cb *, struct sk_buff *))
846{
847 struct cb *cb;
848 unsigned long flags;
849 int err;
850
851 spin_lock_irqsave(&nic->cb_lock, flags);
852
853 if (unlikely(!nic->cbs_avail)) {
854 err = -ENOMEM;
855 goto err_unlock;
856 }
857
858 cb = nic->cb_to_use;
859 nic->cb_to_use = cb->next;
860 nic->cbs_avail--;
861 cb->skb = skb;
862
863 err = cb_prepare(nic, cb, skb);
864 if (err)
865 goto err_unlock;
866
867 if (unlikely(!nic->cbs_avail))
868 err = -ENOSPC;
869
870
871
872
873 cb->command |= cpu_to_le16(cb_s);
874 dma_wmb();
875 cb->prev->command &= cpu_to_le16(~cb_s);
876
877 while (nic->cb_to_send != nic->cb_to_use) {
878 if (unlikely(e100_exec_cmd(nic, nic->cuc_cmd,
879 nic->cb_to_send->dma_addr))) {
880
881
882
883
884
885 if (err == -ENOSPC) {
886
887 schedule_work(&nic->tx_timeout_task);
888 }
889 break;
890 } else {
891 nic->cuc_cmd = cuc_resume;
892 nic->cb_to_send = nic->cb_to_send->next;
893 }
894 }
895
896err_unlock:
897 spin_unlock_irqrestore(&nic->cb_lock, flags);
898
899 return err;
900}
901
902static int mdio_read(struct net_device *netdev, int addr, int reg)
903{
904 struct nic *nic = netdev_priv(netdev);
905 return nic->mdio_ctrl(nic, addr, mdi_read, reg, 0);
906}
907
908static void mdio_write(struct net_device *netdev, int addr, int reg, int data)
909{
910 struct nic *nic = netdev_priv(netdev);
911
912 nic->mdio_ctrl(nic, addr, mdi_write, reg, data);
913}
914
915
916static u16 mdio_ctrl_hw(struct nic *nic, u32 addr, u32 dir, u32 reg, u16 data)
917{
918 u32 data_out = 0;
919 unsigned int i;
920 unsigned long flags;
921
922
923
924
925
926
927
928
929 spin_lock_irqsave(&nic->mdio_lock, flags);
930 for (i = 100; i; --i) {
931 if (ioread32(&nic->csr->mdi_ctrl) & mdi_ready)
932 break;
933 udelay(20);
934 }
935 if (unlikely(!i)) {
936 netdev_err(nic->netdev, "e100.mdio_ctrl won't go Ready\n");
937 spin_unlock_irqrestore(&nic->mdio_lock, flags);
938 return 0;
939 }
940 iowrite32((reg << 16) | (addr << 21) | dir | data, &nic->csr->mdi_ctrl);
941
942 for (i = 0; i < 100; i++) {
943 udelay(20);
944 if ((data_out = ioread32(&nic->csr->mdi_ctrl)) & mdi_ready)
945 break;
946 }
947 spin_unlock_irqrestore(&nic->mdio_lock, flags);
948 netif_printk(nic, hw, KERN_DEBUG, nic->netdev,
949 "%s:addr=%d, reg=%d, data_in=0x%04X, data_out=0x%04X\n",
950 dir == mdi_read ? "READ" : "WRITE",
951 addr, reg, data, data_out);
952 return (u16)data_out;
953}
954
955
956static u16 mdio_ctrl_phy_82552_v(struct nic *nic,
957 u32 addr,
958 u32 dir,
959 u32 reg,
960 u16 data)
961{
962 if ((reg == MII_BMCR) && (dir == mdi_write)) {
963 if (data & (BMCR_ANRESTART | BMCR_ANENABLE)) {
964 u16 advert = mdio_read(nic->netdev, nic->mii.phy_id,
965 MII_ADVERTISE);
966
967
968
969
970
971 if (advert & ADVERTISE_100FULL)
972 data |= BMCR_SPEED100 | BMCR_FULLDPLX;
973 else if (advert & ADVERTISE_100HALF)
974 data |= BMCR_SPEED100;
975 }
976 }
977 return mdio_ctrl_hw(nic, addr, dir, reg, data);
978}
979
980
981
982
983
984
985
986static u16 mdio_ctrl_phy_mii_emulated(struct nic *nic,
987 u32 addr,
988 u32 dir,
989 u32 reg,
990 u16 data)
991{
992
993
994
995
996 if (dir == mdi_read) {
997 switch (reg) {
998 case MII_BMCR:
999
1000 return BMCR_ANENABLE |
1001 BMCR_FULLDPLX;
1002 case MII_BMSR:
1003 return BMSR_LSTATUS |
1004 BMSR_ANEGCAPABLE |
1005 BMSR_10FULL;
1006 case MII_ADVERTISE:
1007
1008 return ADVERTISE_10HALF |
1009 ADVERTISE_10FULL;
1010 default:
1011 netif_printk(nic, hw, KERN_DEBUG, nic->netdev,
1012 "%s:addr=%d, reg=%d, data=0x%04X: unimplemented emulation!\n",
1013 dir == mdi_read ? "READ" : "WRITE",
1014 addr, reg, data);
1015 return 0xFFFF;
1016 }
1017 } else {
1018 switch (reg) {
1019 default:
1020 netif_printk(nic, hw, KERN_DEBUG, nic->netdev,
1021 "%s:addr=%d, reg=%d, data=0x%04X: unimplemented emulation!\n",
1022 dir == mdi_read ? "READ" : "WRITE",
1023 addr, reg, data);
1024 return 0xFFFF;
1025 }
1026 }
1027}
1028static inline int e100_phy_supports_mii(struct nic *nic)
1029{
1030
1031
1032
1033 return (nic->mdio_ctrl != mdio_ctrl_phy_mii_emulated);
1034}
1035
1036static void e100_get_defaults(struct nic *nic)
1037{
1038 struct param_range rfds = { .min = 16, .max = 256, .count = 256 };
1039 struct param_range cbs = { .min = 64, .max = 256, .count = 128 };
1040
1041
1042 nic->mac = (nic->flags & ich) ? mac_82559_D101M : nic->pdev->revision;
1043 if (nic->mac == mac_unknown)
1044 nic->mac = mac_82557_D100_A;
1045
1046 nic->params.rfds = rfds;
1047 nic->params.cbs = cbs;
1048
1049
1050 nic->tx_threshold = 0xE0;
1051
1052
1053 nic->tx_command = cpu_to_le16(cb_tx | cb_tx_sf |
1054 ((nic->mac >= mac_82558_D101_A4) ? cb_cid : cb_i));
1055
1056
1057 nic->blank_rfd.command = 0;
1058 nic->blank_rfd.rbd = cpu_to_le32(0xFFFFFFFF);
1059 nic->blank_rfd.size = cpu_to_le16(VLAN_ETH_FRAME_LEN + ETH_FCS_LEN);
1060
1061
1062 nic->mii.phy_id_mask = 0x1F;
1063 nic->mii.reg_num_mask = 0x1F;
1064 nic->mii.dev = nic->netdev;
1065 nic->mii.mdio_read = mdio_read;
1066 nic->mii.mdio_write = mdio_write;
1067}
1068
1069static int e100_configure(struct nic *nic, struct cb *cb, struct sk_buff *skb)
1070{
1071 struct config *config = &cb->u.config;
1072 u8 *c = (u8 *)config;
1073 struct net_device *netdev = nic->netdev;
1074
1075 cb->command = cpu_to_le16(cb_config);
1076
1077 memset(config, 0, sizeof(struct config));
1078
1079 config->byte_count = 0x16;
1080 config->rx_fifo_limit = 0x8;
1081 config->direct_rx_dma = 0x1;
1082 config->standard_tcb = 0x1;
1083 config->standard_stat_counter = 0x1;
1084 config->rx_discard_short_frames = 0x1;
1085 config->tx_underrun_retry = 0x3;
1086 if (e100_phy_supports_mii(nic))
1087 config->mii_mode = 1;
1088 config->pad10 = 0x6;
1089 config->no_source_addr_insertion = 0x1;
1090 config->preamble_length = 0x2;
1091 config->ifs = 0x6;
1092 config->ip_addr_hi = 0xF2;
1093 config->pad15_1 = 0x1;
1094 config->pad15_2 = 0x1;
1095 config->crs_or_cdt = 0x0;
1096 config->fc_delay_hi = 0x40;
1097 config->tx_padding = 0x1;
1098 config->fc_priority_threshold = 0x7;
1099 config->pad18 = 0x1;
1100 config->full_duplex_pin = 0x1;
1101 config->pad20_1 = 0x1F;
1102 config->fc_priority_location = 0x1;
1103 config->pad21_1 = 0x5;
1104
1105 config->adaptive_ifs = nic->adaptive_ifs;
1106 config->loopback = nic->loopback;
1107
1108 if (nic->mii.force_media && nic->mii.full_duplex)
1109 config->full_duplex_force = 0x1;
1110
1111 if (nic->flags & promiscuous || nic->loopback) {
1112 config->rx_save_bad_frames = 0x1;
1113 config->rx_discard_short_frames = 0x0;
1114 config->promiscuous_mode = 0x1;
1115 }
1116
1117 if (unlikely(netdev->features & NETIF_F_RXFCS))
1118 config->rx_crc_transfer = 0x1;
1119
1120 if (nic->flags & multicast_all)
1121 config->multicast_all = 0x1;
1122
1123
1124 if (netif_running(nic->netdev) || !(nic->flags & wol_magic))
1125 config->magic_packet_disable = 0x1;
1126
1127 if (nic->mac >= mac_82558_D101_A4) {
1128 config->fc_disable = 0x1;
1129 config->mwi_enable = 0x1;
1130 config->standard_tcb = 0x0;
1131 config->rx_long_ok = 0x1;
1132 if (nic->mac >= mac_82559_D101M) {
1133 config->tno_intr = 0x1;
1134
1135 if (nic->mac >= mac_82551_10) {
1136 config->byte_count = 0x20;
1137 config->rx_d102_mode = 0x1;
1138 }
1139 } else {
1140 config->standard_stat_counter = 0x0;
1141 }
1142 }
1143
1144 if (netdev->features & NETIF_F_RXALL) {
1145 config->rx_save_overruns = 0x1;
1146 config->rx_save_bad_frames = 0x1;
1147 config->rx_discard_short_frames = 0x0;
1148 }
1149
1150 netif_printk(nic, hw, KERN_DEBUG, nic->netdev, "[00-07]=%8ph\n",
1151 c + 0);
1152 netif_printk(nic, hw, KERN_DEBUG, nic->netdev, "[08-15]=%8ph\n",
1153 c + 8);
1154 netif_printk(nic, hw, KERN_DEBUG, nic->netdev, "[16-23]=%8ph\n",
1155 c + 16);
1156 return 0;
1157}
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214#define BUNDLESMALL 1
1215#define BUNDLEMAX (u16)6
1216#define INTDELAY (u16)1536
1217
1218
1219static const struct firmware *e100_request_firmware(struct nic *nic)
1220{
1221 const char *fw_name;
1222 const struct firmware *fw = nic->fw;
1223 u8 timer, bundle, min_size;
1224 int err = 0;
1225 bool required = false;
1226
1227
1228 if (nic->flags & ich)
1229 return NULL;
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244 if (nic->mac == mac_82559_D101M) {
1245 fw_name = FIRMWARE_D101M;
1246 } else if (nic->mac == mac_82559_D101S) {
1247 fw_name = FIRMWARE_D101S;
1248 } else if (nic->mac == mac_82551_F || nic->mac == mac_82551_10) {
1249 fw_name = FIRMWARE_D102E;
1250 required = true;
1251 } else {
1252 return NULL;
1253 }
1254
1255
1256
1257
1258
1259
1260 if (!fw)
1261 err = request_firmware(&fw, fw_name, &nic->pdev->dev);
1262
1263 if (err) {
1264 if (required) {
1265 netif_err(nic, probe, nic->netdev,
1266 "Failed to load firmware \"%s\": %d\n",
1267 fw_name, err);
1268 return ERR_PTR(err);
1269 } else {
1270 netif_info(nic, probe, nic->netdev,
1271 "CPUSaver disabled. Needs \"%s\": %d\n",
1272 fw_name, err);
1273 return NULL;
1274 }
1275 }
1276
1277
1278
1279 if (fw->size != UCODE_SIZE * 4 + 3) {
1280 netif_err(nic, probe, nic->netdev,
1281 "Firmware \"%s\" has wrong size %zu\n",
1282 fw_name, fw->size);
1283 release_firmware(fw);
1284 return ERR_PTR(-EINVAL);
1285 }
1286
1287
1288 timer = fw->data[UCODE_SIZE * 4];
1289 bundle = fw->data[UCODE_SIZE * 4 + 1];
1290 min_size = fw->data[UCODE_SIZE * 4 + 2];
1291
1292 if (timer >= UCODE_SIZE || bundle >= UCODE_SIZE ||
1293 min_size >= UCODE_SIZE) {
1294 netif_err(nic, probe, nic->netdev,
1295 "\"%s\" has bogus offset values (0x%x,0x%x,0x%x)\n",
1296 fw_name, timer, bundle, min_size);
1297 release_firmware(fw);
1298 return ERR_PTR(-EINVAL);
1299 }
1300
1301
1302
1303 nic->fw = fw;
1304 return fw;
1305}
1306
1307static int e100_setup_ucode(struct nic *nic, struct cb *cb,
1308 struct sk_buff *skb)
1309{
1310 const struct firmware *fw = (void *)skb;
1311 u8 timer, bundle, min_size;
1312
1313
1314
1315 cb->skb = NULL;
1316
1317
1318 memcpy(cb->u.ucode, fw->data, UCODE_SIZE * 4);
1319
1320
1321 timer = fw->data[UCODE_SIZE * 4];
1322 bundle = fw->data[UCODE_SIZE * 4 + 1];
1323 min_size = fw->data[UCODE_SIZE * 4 + 2];
1324
1325
1326 cb->u.ucode[timer] &= cpu_to_le32(0xFFFF0000);
1327 cb->u.ucode[timer] |= cpu_to_le32(INTDELAY);
1328 cb->u.ucode[bundle] &= cpu_to_le32(0xFFFF0000);
1329 cb->u.ucode[bundle] |= cpu_to_le32(BUNDLEMAX);
1330 cb->u.ucode[min_size] &= cpu_to_le32(0xFFFF0000);
1331 cb->u.ucode[min_size] |= cpu_to_le32((BUNDLESMALL) ? 0xFFFF : 0xFF80);
1332
1333 cb->command = cpu_to_le16(cb_ucode | cb_el);
1334 return 0;
1335}
1336
1337static inline int e100_load_ucode_wait(struct nic *nic)
1338{
1339 const struct firmware *fw;
1340 int err = 0, counter = 50;
1341 struct cb *cb = nic->cb_to_clean;
1342
1343 fw = e100_request_firmware(nic);
1344
1345 if (IS_ERR_OR_NULL(fw))
1346 return PTR_ERR_OR_ZERO(fw);
1347
1348 if ((err = e100_exec_cb(nic, (void *)fw, e100_setup_ucode)))
1349 netif_err(nic, probe, nic->netdev,
1350 "ucode cmd failed with error %d\n", err);
1351
1352
1353 nic->cuc_cmd = cuc_start;
1354
1355
1356 e100_write_flush(nic);
1357 udelay(10);
1358
1359
1360 while (!(cb->status & cpu_to_le16(cb_complete))) {
1361 msleep(10);
1362 if (!--counter) break;
1363 }
1364
1365
1366 iowrite8(~0, &nic->csr->scb.stat_ack);
1367
1368
1369 if (!counter || !(cb->status & cpu_to_le16(cb_ok))) {
1370 netif_err(nic, probe, nic->netdev, "ucode load failed\n");
1371 err = -EPERM;
1372 }
1373
1374 return err;
1375}
1376
1377static int e100_setup_iaaddr(struct nic *nic, struct cb *cb,
1378 struct sk_buff *skb)
1379{
1380 cb->command = cpu_to_le16(cb_iaaddr);
1381 memcpy(cb->u.iaaddr, nic->netdev->dev_addr, ETH_ALEN);
1382 return 0;
1383}
1384
1385static int e100_dump(struct nic *nic, struct cb *cb, struct sk_buff *skb)
1386{
1387 cb->command = cpu_to_le16(cb_dump);
1388 cb->u.dump_buffer_addr = cpu_to_le32(nic->dma_addr +
1389 offsetof(struct mem, dump_buf));
1390 return 0;
1391}
1392
1393static int e100_phy_check_without_mii(struct nic *nic)
1394{
1395 u8 phy_type;
1396 int without_mii;
1397
1398 phy_type = (le16_to_cpu(nic->eeprom[eeprom_phy_iface]) >> 8) & 0x0f;
1399
1400 switch (phy_type) {
1401 case NoSuchPhy:
1402 case I82503:
1403 case S80C24:
1404
1405
1406
1407
1408
1409
1410 netif_info(nic, probe, nic->netdev,
1411 "found MII-less i82503 or 80c24 or other PHY\n");
1412
1413 nic->mdio_ctrl = mdio_ctrl_phy_mii_emulated;
1414 nic->mii.phy_id = 0;
1415
1416
1417
1418
1419
1420 without_mii = 1;
1421 break;
1422 default:
1423 without_mii = 0;
1424 break;
1425 }
1426 return without_mii;
1427}
1428
1429#define NCONFIG_AUTO_SWITCH 0x0080
1430#define MII_NSC_CONG MII_RESV1
1431#define NSC_CONG_ENABLE 0x0100
1432#define NSC_CONG_TXREADY 0x0400
1433#define ADVERTISE_FC_SUPPORTED 0x0400
1434static int e100_phy_init(struct nic *nic)
1435{
1436 struct net_device *netdev = nic->netdev;
1437 u32 addr;
1438 u16 bmcr, stat, id_lo, id_hi, cong;
1439
1440
1441 for (addr = 0; addr < 32; addr++) {
1442 nic->mii.phy_id = (addr == 0) ? 1 : (addr == 1) ? 0 : addr;
1443 bmcr = mdio_read(netdev, nic->mii.phy_id, MII_BMCR);
1444 stat = mdio_read(netdev, nic->mii.phy_id, MII_BMSR);
1445 stat = mdio_read(netdev, nic->mii.phy_id, MII_BMSR);
1446 if (!((bmcr == 0xFFFF) || ((stat == 0) && (bmcr == 0))))
1447 break;
1448 }
1449 if (addr == 32) {
1450
1451
1452
1453
1454 if (e100_phy_check_without_mii(nic))
1455 return 0;
1456 else {
1457
1458 netif_err(nic, hw, nic->netdev,
1459 "Failed to locate any known PHY, aborting\n");
1460 return -EAGAIN;
1461 }
1462 } else
1463 netif_printk(nic, hw, KERN_DEBUG, nic->netdev,
1464 "phy_addr = %d\n", nic->mii.phy_id);
1465
1466
1467 id_lo = mdio_read(netdev, nic->mii.phy_id, MII_PHYSID1);
1468 id_hi = mdio_read(netdev, nic->mii.phy_id, MII_PHYSID2);
1469 nic->phy = (u32)id_hi << 16 | (u32)id_lo;
1470 netif_printk(nic, hw, KERN_DEBUG, nic->netdev,
1471 "phy ID = 0x%08X\n", nic->phy);
1472
1473
1474 for (addr = 0; addr < 32; addr++) {
1475 if (addr != nic->mii.phy_id) {
1476 mdio_write(netdev, addr, MII_BMCR, BMCR_ISOLATE);
1477 } else if (nic->phy != phy_82552_v) {
1478 bmcr = mdio_read(netdev, addr, MII_BMCR);
1479 mdio_write(netdev, addr, MII_BMCR,
1480 bmcr & ~BMCR_ISOLATE);
1481 }
1482 }
1483
1484
1485
1486
1487
1488 if (nic->phy == phy_82552_v)
1489 mdio_write(netdev, nic->mii.phy_id, MII_BMCR,
1490 bmcr & ~BMCR_ISOLATE);
1491
1492
1493#define NCS_PHY_MODEL_MASK 0xFFF0FFFF
1494 if ((nic->phy & NCS_PHY_MODEL_MASK) == phy_nsc_tx) {
1495
1496 cong = mdio_read(netdev, nic->mii.phy_id, MII_NSC_CONG);
1497 cong |= NSC_CONG_TXREADY;
1498 cong &= ~NSC_CONG_ENABLE;
1499 mdio_write(netdev, nic->mii.phy_id, MII_NSC_CONG, cong);
1500 }
1501
1502 if (nic->phy == phy_82552_v) {
1503 u16 advert = mdio_read(netdev, nic->mii.phy_id, MII_ADVERTISE);
1504
1505
1506 nic->mdio_ctrl = mdio_ctrl_phy_82552_v;
1507
1508
1509 advert |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
1510 mdio_write(netdev, nic->mii.phy_id, MII_ADVERTISE, advert);
1511
1512
1513 bmcr = mdio_read(netdev, nic->mii.phy_id, MII_BMCR);
1514 bmcr |= BMCR_RESET;
1515 mdio_write(netdev, nic->mii.phy_id, MII_BMCR, bmcr);
1516 } else if ((nic->mac >= mac_82550_D102) || ((nic->flags & ich) &&
1517 (mdio_read(netdev, nic->mii.phy_id, MII_TPISTATUS) & 0x8000) &&
1518 (le16_to_cpu(nic->eeprom[eeprom_cnfg_mdix]) & eeprom_mdix_enabled))) {
1519
1520 mdio_write(netdev, nic->mii.phy_id, MII_NCONFIG,
1521 nic->mii.force_media ? 0 : NCONFIG_AUTO_SWITCH);
1522 }
1523
1524 return 0;
1525}
1526
1527static int e100_hw_init(struct nic *nic)
1528{
1529 int err = 0;
1530
1531 e100_hw_reset(nic);
1532
1533 netif_err(nic, hw, nic->netdev, "e100_hw_init\n");
1534 if ((err = e100_self_test(nic)))
1535 return err;
1536
1537 if ((err = e100_phy_init(nic)))
1538 return err;
1539 if ((err = e100_exec_cmd(nic, cuc_load_base, 0)))
1540 return err;
1541 if ((err = e100_exec_cmd(nic, ruc_load_base, 0)))
1542 return err;
1543 if ((err = e100_load_ucode_wait(nic)))
1544 return err;
1545 if ((err = e100_exec_cb(nic, NULL, e100_configure)))
1546 return err;
1547 if ((err = e100_exec_cb(nic, NULL, e100_setup_iaaddr)))
1548 return err;
1549 if ((err = e100_exec_cmd(nic, cuc_dump_addr,
1550 nic->dma_addr + offsetof(struct mem, stats))))
1551 return err;
1552 if ((err = e100_exec_cmd(nic, cuc_dump_reset, 0)))
1553 return err;
1554
1555 e100_disable_irq(nic);
1556
1557 return 0;
1558}
1559
1560static int e100_multi(struct nic *nic, struct cb *cb, struct sk_buff *skb)
1561{
1562 struct net_device *netdev = nic->netdev;
1563 struct netdev_hw_addr *ha;
1564 u16 i, count = min(netdev_mc_count(netdev), E100_MAX_MULTICAST_ADDRS);
1565
1566 cb->command = cpu_to_le16(cb_multi);
1567 cb->u.multi.count = cpu_to_le16(count * ETH_ALEN);
1568 i = 0;
1569 netdev_for_each_mc_addr(ha, netdev) {
1570 if (i == count)
1571 break;
1572 memcpy(&cb->u.multi.addr[i++ * ETH_ALEN], &ha->addr,
1573 ETH_ALEN);
1574 }
1575 return 0;
1576}
1577
1578static void e100_set_multicast_list(struct net_device *netdev)
1579{
1580 struct nic *nic = netdev_priv(netdev);
1581
1582 netif_printk(nic, hw, KERN_DEBUG, nic->netdev,
1583 "mc_count=%d, flags=0x%04X\n",
1584 netdev_mc_count(netdev), netdev->flags);
1585
1586 if (netdev->flags & IFF_PROMISC)
1587 nic->flags |= promiscuous;
1588 else
1589 nic->flags &= ~promiscuous;
1590
1591 if (netdev->flags & IFF_ALLMULTI ||
1592 netdev_mc_count(netdev) > E100_MAX_MULTICAST_ADDRS)
1593 nic->flags |= multicast_all;
1594 else
1595 nic->flags &= ~multicast_all;
1596
1597 e100_exec_cb(nic, NULL, e100_configure);
1598 e100_exec_cb(nic, NULL, e100_multi);
1599}
1600
1601static void e100_update_stats(struct nic *nic)
1602{
1603 struct net_device *dev = nic->netdev;
1604 struct net_device_stats *ns = &dev->stats;
1605 struct stats *s = &nic->mem->stats;
1606 __le32 *complete = (nic->mac < mac_82558_D101_A4) ? &s->fc_xmt_pause :
1607 (nic->mac < mac_82559_D101M) ? (__le32 *)&s->xmt_tco_frames :
1608 &s->complete;
1609
1610
1611
1612
1613
1614 if (*complete == cpu_to_le32(cuc_dump_reset_complete)) {
1615 *complete = 0;
1616 nic->tx_frames = le32_to_cpu(s->tx_good_frames);
1617 nic->tx_collisions = le32_to_cpu(s->tx_total_collisions);
1618 ns->tx_aborted_errors += le32_to_cpu(s->tx_max_collisions);
1619 ns->tx_window_errors += le32_to_cpu(s->tx_late_collisions);
1620 ns->tx_carrier_errors += le32_to_cpu(s->tx_lost_crs);
1621 ns->tx_fifo_errors += le32_to_cpu(s->tx_underruns);
1622 ns->collisions += nic->tx_collisions;
1623 ns->tx_errors += le32_to_cpu(s->tx_max_collisions) +
1624 le32_to_cpu(s->tx_lost_crs);
1625 nic->rx_short_frame_errors +=
1626 le32_to_cpu(s->rx_short_frame_errors);
1627 ns->rx_length_errors = nic->rx_short_frame_errors +
1628 nic->rx_over_length_errors;
1629 ns->rx_crc_errors += le32_to_cpu(s->rx_crc_errors);
1630 ns->rx_frame_errors += le32_to_cpu(s->rx_alignment_errors);
1631 ns->rx_over_errors += le32_to_cpu(s->rx_overrun_errors);
1632 ns->rx_fifo_errors += le32_to_cpu(s->rx_overrun_errors);
1633 ns->rx_missed_errors += le32_to_cpu(s->rx_resource_errors);
1634 ns->rx_errors += le32_to_cpu(s->rx_crc_errors) +
1635 le32_to_cpu(s->rx_alignment_errors) +
1636 le32_to_cpu(s->rx_short_frame_errors) +
1637 le32_to_cpu(s->rx_cdt_errors);
1638 nic->tx_deferred += le32_to_cpu(s->tx_deferred);
1639 nic->tx_single_collisions +=
1640 le32_to_cpu(s->tx_single_collisions);
1641 nic->tx_multiple_collisions +=
1642 le32_to_cpu(s->tx_multiple_collisions);
1643 if (nic->mac >= mac_82558_D101_A4) {
1644 nic->tx_fc_pause += le32_to_cpu(s->fc_xmt_pause);
1645 nic->rx_fc_pause += le32_to_cpu(s->fc_rcv_pause);
1646 nic->rx_fc_unsupported +=
1647 le32_to_cpu(s->fc_rcv_unsupported);
1648 if (nic->mac >= mac_82559_D101M) {
1649 nic->tx_tco_frames +=
1650 le16_to_cpu(s->xmt_tco_frames);
1651 nic->rx_tco_frames +=
1652 le16_to_cpu(s->rcv_tco_frames);
1653 }
1654 }
1655 }
1656
1657
1658 if (e100_exec_cmd(nic, cuc_dump_reset, 0))
1659 netif_printk(nic, tx_err, KERN_DEBUG, nic->netdev,
1660 "exec cuc_dump_reset failed\n");
1661}
1662
1663static void e100_adjust_adaptive_ifs(struct nic *nic, int speed, int duplex)
1664{
1665
1666
1667
1668 if (duplex == DUPLEX_HALF) {
1669 u32 prev = nic->adaptive_ifs;
1670 u32 min_frames = (speed == SPEED_100) ? 1000 : 100;
1671
1672 if ((nic->tx_frames / 32 < nic->tx_collisions) &&
1673 (nic->tx_frames > min_frames)) {
1674 if (nic->adaptive_ifs < 60)
1675 nic->adaptive_ifs += 5;
1676 } else if (nic->tx_frames < min_frames) {
1677 if (nic->adaptive_ifs >= 5)
1678 nic->adaptive_ifs -= 5;
1679 }
1680 if (nic->adaptive_ifs != prev)
1681 e100_exec_cb(nic, NULL, e100_configure);
1682 }
1683}
1684
1685static void e100_watchdog(struct timer_list *t)
1686{
1687 struct nic *nic = from_timer(nic, t, watchdog);
1688 struct ethtool_cmd cmd = { .cmd = ETHTOOL_GSET };
1689 u32 speed;
1690
1691 netif_printk(nic, timer, KERN_DEBUG, nic->netdev,
1692 "right now = %ld\n", jiffies);
1693
1694
1695
1696 mii_ethtool_gset(&nic->mii, &cmd);
1697 speed = ethtool_cmd_speed(&cmd);
1698
1699 if (mii_link_ok(&nic->mii) && !netif_carrier_ok(nic->netdev)) {
1700 netdev_info(nic->netdev, "NIC Link is Up %u Mbps %s Duplex\n",
1701 speed == SPEED_100 ? 100 : 10,
1702 cmd.duplex == DUPLEX_FULL ? "Full" : "Half");
1703 } else if (!mii_link_ok(&nic->mii) && netif_carrier_ok(nic->netdev)) {
1704 netdev_info(nic->netdev, "NIC Link is Down\n");
1705 }
1706
1707 mii_check_link(&nic->mii);
1708
1709
1710
1711
1712
1713
1714 spin_lock_irq(&nic->cmd_lock);
1715 iowrite8(ioread8(&nic->csr->scb.cmd_hi) | irq_sw_gen,&nic->csr->scb.cmd_hi);
1716 e100_write_flush(nic);
1717 spin_unlock_irq(&nic->cmd_lock);
1718
1719 e100_update_stats(nic);
1720 e100_adjust_adaptive_ifs(nic, speed, cmd.duplex);
1721
1722 if (nic->mac <= mac_82557_D100_C)
1723
1724 e100_set_multicast_list(nic->netdev);
1725
1726 if (nic->flags & ich && speed == SPEED_10 && cmd.duplex == DUPLEX_HALF)
1727
1728 nic->flags |= ich_10h_workaround;
1729 else
1730 nic->flags &= ~ich_10h_workaround;
1731
1732 mod_timer(&nic->watchdog,
1733 round_jiffies(jiffies + E100_WATCHDOG_PERIOD));
1734}
1735
1736static int e100_xmit_prepare(struct nic *nic, struct cb *cb,
1737 struct sk_buff *skb)
1738{
1739 dma_addr_t dma_addr;
1740 cb->command = nic->tx_command;
1741
1742 dma_addr = dma_map_single(&nic->pdev->dev, skb->data, skb->len,
1743 DMA_TO_DEVICE);
1744
1745 if (dma_mapping_error(&nic->pdev->dev, dma_addr)) {
1746 dev_kfree_skb_any(skb);
1747 skb = NULL;
1748 return -ENOMEM;
1749 }
1750
1751
1752
1753
1754
1755 if (unlikely(skb->no_fcs))
1756 cb->command |= cpu_to_le16(cb_tx_nc);
1757 else
1758 cb->command &= ~cpu_to_le16(cb_tx_nc);
1759
1760
1761 if ((nic->cbs_avail & ~15) == nic->cbs_avail)
1762 cb->command |= cpu_to_le16(cb_i);
1763 cb->u.tcb.tbd_array = cb->dma_addr + offsetof(struct cb, u.tcb.tbd);
1764 cb->u.tcb.tcb_byte_count = 0;
1765 cb->u.tcb.threshold = nic->tx_threshold;
1766 cb->u.tcb.tbd_count = 1;
1767 cb->u.tcb.tbd.buf_addr = cpu_to_le32(dma_addr);
1768 cb->u.tcb.tbd.size = cpu_to_le16(skb->len);
1769 skb_tx_timestamp(skb);
1770 return 0;
1771}
1772
1773static netdev_tx_t e100_xmit_frame(struct sk_buff *skb,
1774 struct net_device *netdev)
1775{
1776 struct nic *nic = netdev_priv(netdev);
1777 int err;
1778
1779 if (nic->flags & ich_10h_workaround) {
1780
1781
1782
1783 if (e100_exec_cmd(nic, cuc_nop, 0))
1784 netif_printk(nic, tx_err, KERN_DEBUG, nic->netdev,
1785 "exec cuc_nop failed\n");
1786 udelay(1);
1787 }
1788
1789 err = e100_exec_cb(nic, skb, e100_xmit_prepare);
1790
1791 switch (err) {
1792 case -ENOSPC:
1793
1794 netif_printk(nic, tx_err, KERN_DEBUG, nic->netdev,
1795 "No space for CB\n");
1796 netif_stop_queue(netdev);
1797 break;
1798 case -ENOMEM:
1799
1800 netif_printk(nic, tx_err, KERN_DEBUG, nic->netdev,
1801 "Out of Tx resources, returning skb\n");
1802 netif_stop_queue(netdev);
1803 return NETDEV_TX_BUSY;
1804 }
1805
1806 return NETDEV_TX_OK;
1807}
1808
1809static int e100_tx_clean(struct nic *nic)
1810{
1811 struct net_device *dev = nic->netdev;
1812 struct cb *cb;
1813 int tx_cleaned = 0;
1814
1815 spin_lock(&nic->cb_lock);
1816
1817
1818 for (cb = nic->cb_to_clean;
1819 cb->status & cpu_to_le16(cb_complete);
1820 cb = nic->cb_to_clean = cb->next) {
1821 dma_rmb();
1822 netif_printk(nic, tx_done, KERN_DEBUG, nic->netdev,
1823 "cb[%d]->status = 0x%04X\n",
1824 (int)(((void*)cb - (void*)nic->cbs)/sizeof(struct cb)),
1825 cb->status);
1826
1827 if (likely(cb->skb != NULL)) {
1828 dev->stats.tx_packets++;
1829 dev->stats.tx_bytes += cb->skb->len;
1830
1831 dma_unmap_single(&nic->pdev->dev,
1832 le32_to_cpu(cb->u.tcb.tbd.buf_addr),
1833 le16_to_cpu(cb->u.tcb.tbd.size),
1834 DMA_TO_DEVICE);
1835 dev_kfree_skb_any(cb->skb);
1836 cb->skb = NULL;
1837 tx_cleaned = 1;
1838 }
1839 cb->status = 0;
1840 nic->cbs_avail++;
1841 }
1842
1843 spin_unlock(&nic->cb_lock);
1844
1845
1846 if (unlikely(tx_cleaned && netif_queue_stopped(nic->netdev)))
1847 netif_wake_queue(nic->netdev);
1848
1849 return tx_cleaned;
1850}
1851
1852static void e100_clean_cbs(struct nic *nic)
1853{
1854 if (nic->cbs) {
1855 while (nic->cbs_avail != nic->params.cbs.count) {
1856 struct cb *cb = nic->cb_to_clean;
1857 if (cb->skb) {
1858 dma_unmap_single(&nic->pdev->dev,
1859 le32_to_cpu(cb->u.tcb.tbd.buf_addr),
1860 le16_to_cpu(cb->u.tcb.tbd.size),
1861 DMA_TO_DEVICE);
1862 dev_kfree_skb(cb->skb);
1863 }
1864 nic->cb_to_clean = nic->cb_to_clean->next;
1865 nic->cbs_avail++;
1866 }
1867 dma_pool_free(nic->cbs_pool, nic->cbs, nic->cbs_dma_addr);
1868 nic->cbs = NULL;
1869 nic->cbs_avail = 0;
1870 }
1871 nic->cuc_cmd = cuc_start;
1872 nic->cb_to_use = nic->cb_to_send = nic->cb_to_clean =
1873 nic->cbs;
1874}
1875
1876static int e100_alloc_cbs(struct nic *nic)
1877{
1878 struct cb *cb;
1879 unsigned int i, count = nic->params.cbs.count;
1880
1881 nic->cuc_cmd = cuc_start;
1882 nic->cb_to_use = nic->cb_to_send = nic->cb_to_clean = NULL;
1883 nic->cbs_avail = 0;
1884
1885 nic->cbs = dma_pool_zalloc(nic->cbs_pool, GFP_KERNEL,
1886 &nic->cbs_dma_addr);
1887 if (!nic->cbs)
1888 return -ENOMEM;
1889
1890 for (cb = nic->cbs, i = 0; i < count; cb++, i++) {
1891 cb->next = (i + 1 < count) ? cb + 1 : nic->cbs;
1892 cb->prev = (i == 0) ? nic->cbs + count - 1 : cb - 1;
1893
1894 cb->dma_addr = nic->cbs_dma_addr + i * sizeof(struct cb);
1895 cb->link = cpu_to_le32(nic->cbs_dma_addr +
1896 ((i+1) % count) * sizeof(struct cb));
1897 }
1898
1899 nic->cb_to_use = nic->cb_to_send = nic->cb_to_clean = nic->cbs;
1900 nic->cbs_avail = count;
1901
1902 return 0;
1903}
1904
1905static inline void e100_start_receiver(struct nic *nic, struct rx *rx)
1906{
1907 if (!nic->rxs) return;
1908 if (RU_SUSPENDED != nic->ru_running) return;
1909
1910
1911 if (!rx) rx = nic->rxs;
1912
1913
1914 if (rx->skb) {
1915 e100_exec_cmd(nic, ruc_start, rx->dma_addr);
1916 nic->ru_running = RU_RUNNING;
1917 }
1918}
1919
1920#define RFD_BUF_LEN (sizeof(struct rfd) + VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
1921static int e100_rx_alloc_skb(struct nic *nic, struct rx *rx)
1922{
1923 if (!(rx->skb = netdev_alloc_skb_ip_align(nic->netdev, RFD_BUF_LEN)))
1924 return -ENOMEM;
1925
1926
1927 skb_copy_to_linear_data(rx->skb, &nic->blank_rfd, sizeof(struct rfd));
1928 rx->dma_addr = dma_map_single(&nic->pdev->dev, rx->skb->data,
1929 RFD_BUF_LEN, DMA_BIDIRECTIONAL);
1930
1931 if (dma_mapping_error(&nic->pdev->dev, rx->dma_addr)) {
1932 dev_kfree_skb_any(rx->skb);
1933 rx->skb = NULL;
1934 rx->dma_addr = 0;
1935 return -ENOMEM;
1936 }
1937
1938
1939
1940
1941 if (rx->prev->skb) {
1942 struct rfd *prev_rfd = (struct rfd *)rx->prev->skb->data;
1943 put_unaligned_le32(rx->dma_addr, &prev_rfd->link);
1944 dma_sync_single_for_device(&nic->pdev->dev,
1945 rx->prev->dma_addr,
1946 sizeof(struct rfd),
1947 DMA_BIDIRECTIONAL);
1948 }
1949
1950 return 0;
1951}
1952
1953static int e100_rx_indicate(struct nic *nic, struct rx *rx,
1954 unsigned int *work_done, unsigned int work_to_do)
1955{
1956 struct net_device *dev = nic->netdev;
1957 struct sk_buff *skb = rx->skb;
1958 struct rfd *rfd = (struct rfd *)skb->data;
1959 u16 rfd_status, actual_size;
1960 u16 fcs_pad = 0;
1961
1962 if (unlikely(work_done && *work_done >= work_to_do))
1963 return -EAGAIN;
1964
1965
1966 dma_sync_single_for_cpu(&nic->pdev->dev, rx->dma_addr,
1967 sizeof(struct rfd), DMA_BIDIRECTIONAL);
1968 rfd_status = le16_to_cpu(rfd->status);
1969
1970 netif_printk(nic, rx_status, KERN_DEBUG, nic->netdev,
1971 "status=0x%04X\n", rfd_status);
1972 dma_rmb();
1973
1974
1975 if (unlikely(!(rfd_status & cb_complete))) {
1976
1977
1978
1979
1980
1981 if ((le16_to_cpu(rfd->command) & cb_el) &&
1982 (RU_RUNNING == nic->ru_running))
1983
1984 if (ioread8(&nic->csr->scb.status) & rus_no_res)
1985 nic->ru_running = RU_SUSPENDED;
1986 dma_sync_single_for_device(&nic->pdev->dev, rx->dma_addr,
1987 sizeof(struct rfd),
1988 DMA_FROM_DEVICE);
1989 return -ENODATA;
1990 }
1991
1992
1993 if (unlikely(dev->features & NETIF_F_RXFCS))
1994 fcs_pad = 4;
1995 actual_size = le16_to_cpu(rfd->actual_size) & 0x3FFF;
1996 if (unlikely(actual_size > RFD_BUF_LEN - sizeof(struct rfd)))
1997 actual_size = RFD_BUF_LEN - sizeof(struct rfd);
1998
1999
2000 dma_unmap_single(&nic->pdev->dev, rx->dma_addr, RFD_BUF_LEN,
2001 DMA_BIDIRECTIONAL);
2002
2003
2004
2005
2006
2007
2008
2009 if ((le16_to_cpu(rfd->command) & cb_el) &&
2010 (RU_RUNNING == nic->ru_running)) {
2011
2012 if (ioread8(&nic->csr->scb.status) & rus_no_res)
2013 nic->ru_running = RU_SUSPENDED;
2014 }
2015
2016
2017 skb_reserve(skb, sizeof(struct rfd));
2018 skb_put(skb, actual_size);
2019 skb->protocol = eth_type_trans(skb, nic->netdev);
2020
2021
2022
2023
2024 if (unlikely(dev->features & NETIF_F_RXALL)) {
2025 if (actual_size > ETH_DATA_LEN + VLAN_ETH_HLEN + fcs_pad)
2026
2027 nic->rx_over_length_errors++;
2028 goto process_skb;
2029 }
2030
2031 if (unlikely(!(rfd_status & cb_ok))) {
2032
2033 dev_kfree_skb_any(skb);
2034 } else if (actual_size > ETH_DATA_LEN + VLAN_ETH_HLEN + fcs_pad) {
2035
2036 nic->rx_over_length_errors++;
2037 dev_kfree_skb_any(skb);
2038 } else {
2039process_skb:
2040 dev->stats.rx_packets++;
2041 dev->stats.rx_bytes += (actual_size - fcs_pad);
2042 netif_receive_skb(skb);
2043 if (work_done)
2044 (*work_done)++;
2045 }
2046
2047 rx->skb = NULL;
2048
2049 return 0;
2050}
2051
2052static void e100_rx_clean(struct nic *nic, unsigned int *work_done,
2053 unsigned int work_to_do)
2054{
2055 struct rx *rx;
2056 int restart_required = 0, err = 0;
2057 struct rx *old_before_last_rx, *new_before_last_rx;
2058 struct rfd *old_before_last_rfd, *new_before_last_rfd;
2059
2060
2061 for (rx = nic->rx_to_clean; rx->skb; rx = nic->rx_to_clean = rx->next) {
2062 err = e100_rx_indicate(nic, rx, work_done, work_to_do);
2063
2064 if (-EAGAIN == err || -ENODATA == err)
2065 break;
2066 }
2067
2068
2069
2070
2071
2072
2073
2074
2075 if (-EAGAIN != err && RU_SUSPENDED == nic->ru_running)
2076 restart_required = 1;
2077
2078 old_before_last_rx = nic->rx_to_use->prev->prev;
2079 old_before_last_rfd = (struct rfd *)old_before_last_rx->skb->data;
2080
2081
2082 for (rx = nic->rx_to_use; !rx->skb; rx = nic->rx_to_use = rx->next) {
2083 if (unlikely(e100_rx_alloc_skb(nic, rx)))
2084 break;
2085 }
2086
2087 new_before_last_rx = nic->rx_to_use->prev->prev;
2088 if (new_before_last_rx != old_before_last_rx) {
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098 new_before_last_rfd =
2099 (struct rfd *)new_before_last_rx->skb->data;
2100 new_before_last_rfd->size = 0;
2101 new_before_last_rfd->command |= cpu_to_le16(cb_el);
2102 dma_sync_single_for_device(&nic->pdev->dev,
2103 new_before_last_rx->dma_addr,
2104 sizeof(struct rfd),
2105 DMA_BIDIRECTIONAL);
2106
2107
2108
2109
2110 old_before_last_rfd->command &= ~cpu_to_le16(cb_el);
2111 dma_sync_single_for_device(&nic->pdev->dev,
2112 old_before_last_rx->dma_addr,
2113 sizeof(struct rfd),
2114 DMA_BIDIRECTIONAL);
2115 old_before_last_rfd->size = cpu_to_le16(VLAN_ETH_FRAME_LEN
2116 + ETH_FCS_LEN);
2117 dma_sync_single_for_device(&nic->pdev->dev,
2118 old_before_last_rx->dma_addr,
2119 sizeof(struct rfd),
2120 DMA_BIDIRECTIONAL);
2121 }
2122
2123 if (restart_required) {
2124
2125 iowrite8(stat_ack_rnr, &nic->csr->scb.stat_ack);
2126 e100_start_receiver(nic, nic->rx_to_clean);
2127 if (work_done)
2128 (*work_done)++;
2129 }
2130}
2131
2132static void e100_rx_clean_list(struct nic *nic)
2133{
2134 struct rx *rx;
2135 unsigned int i, count = nic->params.rfds.count;
2136
2137 nic->ru_running = RU_UNINITIALIZED;
2138
2139 if (nic->rxs) {
2140 for (rx = nic->rxs, i = 0; i < count; rx++, i++) {
2141 if (rx->skb) {
2142 dma_unmap_single(&nic->pdev->dev,
2143 rx->dma_addr, RFD_BUF_LEN,
2144 DMA_BIDIRECTIONAL);
2145 dev_kfree_skb(rx->skb);
2146 }
2147 }
2148 kfree(nic->rxs);
2149 nic->rxs = NULL;
2150 }
2151
2152 nic->rx_to_use = nic->rx_to_clean = NULL;
2153}
2154
2155static int e100_rx_alloc_list(struct nic *nic)
2156{
2157 struct rx *rx;
2158 unsigned int i, count = nic->params.rfds.count;
2159 struct rfd *before_last;
2160
2161 nic->rx_to_use = nic->rx_to_clean = NULL;
2162 nic->ru_running = RU_UNINITIALIZED;
2163
2164 if (!(nic->rxs = kcalloc(count, sizeof(struct rx), GFP_KERNEL)))
2165 return -ENOMEM;
2166
2167 for (rx = nic->rxs, i = 0; i < count; rx++, i++) {
2168 rx->next = (i + 1 < count) ? rx + 1 : nic->rxs;
2169 rx->prev = (i == 0) ? nic->rxs + count - 1 : rx - 1;
2170 if (e100_rx_alloc_skb(nic, rx)) {
2171 e100_rx_clean_list(nic);
2172 return -ENOMEM;
2173 }
2174 }
2175
2176
2177
2178
2179
2180
2181
2182 rx = nic->rxs->prev->prev;
2183 before_last = (struct rfd *)rx->skb->data;
2184 before_last->command |= cpu_to_le16(cb_el);
2185 before_last->size = 0;
2186 dma_sync_single_for_device(&nic->pdev->dev, rx->dma_addr,
2187 sizeof(struct rfd), DMA_BIDIRECTIONAL);
2188
2189 nic->rx_to_use = nic->rx_to_clean = nic->rxs;
2190 nic->ru_running = RU_SUSPENDED;
2191
2192 return 0;
2193}
2194
2195static irqreturn_t e100_intr(int irq, void *dev_id)
2196{
2197 struct net_device *netdev = dev_id;
2198 struct nic *nic = netdev_priv(netdev);
2199 u8 stat_ack = ioread8(&nic->csr->scb.stat_ack);
2200
2201 netif_printk(nic, intr, KERN_DEBUG, nic->netdev,
2202 "stat_ack = 0x%02X\n", stat_ack);
2203
2204 if (stat_ack == stat_ack_not_ours ||
2205 stat_ack == stat_ack_not_present)
2206 return IRQ_NONE;
2207
2208
2209 iowrite8(stat_ack, &nic->csr->scb.stat_ack);
2210
2211
2212 if (stat_ack & stat_ack_rnr)
2213 nic->ru_running = RU_SUSPENDED;
2214
2215 if (likely(napi_schedule_prep(&nic->napi))) {
2216 e100_disable_irq(nic);
2217 __napi_schedule(&nic->napi);
2218 }
2219
2220 return IRQ_HANDLED;
2221}
2222
2223static int e100_poll(struct napi_struct *napi, int budget)
2224{
2225 struct nic *nic = container_of(napi, struct nic, napi);
2226 unsigned int work_done = 0;
2227
2228 e100_rx_clean(nic, &work_done, budget);
2229 e100_tx_clean(nic);
2230
2231
2232 if (work_done == budget)
2233 return budget;
2234
2235
2236 if (likely(napi_complete_done(napi, work_done)))
2237 e100_enable_irq(nic);
2238
2239 return work_done;
2240}
2241
2242#ifdef CONFIG_NET_POLL_CONTROLLER
2243static void e100_netpoll(struct net_device *netdev)
2244{
2245 struct nic *nic = netdev_priv(netdev);
2246
2247 e100_disable_irq(nic);
2248 e100_intr(nic->pdev->irq, netdev);
2249 e100_tx_clean(nic);
2250 e100_enable_irq(nic);
2251}
2252#endif
2253
2254static int e100_set_mac_address(struct net_device *netdev, void *p)
2255{
2256 struct nic *nic = netdev_priv(netdev);
2257 struct sockaddr *addr = p;
2258
2259 if (!is_valid_ether_addr(addr->sa_data))
2260 return -EADDRNOTAVAIL;
2261
2262 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2263 e100_exec_cb(nic, NULL, e100_setup_iaaddr);
2264
2265 return 0;
2266}
2267
2268static int e100_asf(struct nic *nic)
2269{
2270
2271 return (nic->pdev->device >= 0x1050) && (nic->pdev->device <= 0x1057) &&
2272 (le16_to_cpu(nic->eeprom[eeprom_config_asf]) & eeprom_asf) &&
2273 !(le16_to_cpu(nic->eeprom[eeprom_config_asf]) & eeprom_gcl) &&
2274 ((le16_to_cpu(nic->eeprom[eeprom_smbus_addr]) & 0xFF) != 0xFE);
2275}
2276
2277static int e100_up(struct nic *nic)
2278{
2279 int err;
2280
2281 if ((err = e100_rx_alloc_list(nic)))
2282 return err;
2283 if ((err = e100_alloc_cbs(nic)))
2284 goto err_rx_clean_list;
2285 if ((err = e100_hw_init(nic)))
2286 goto err_clean_cbs;
2287 e100_set_multicast_list(nic->netdev);
2288 e100_start_receiver(nic, NULL);
2289 mod_timer(&nic->watchdog, jiffies);
2290 if ((err = request_irq(nic->pdev->irq, e100_intr, IRQF_SHARED,
2291 nic->netdev->name, nic->netdev)))
2292 goto err_no_irq;
2293 netif_wake_queue(nic->netdev);
2294 napi_enable(&nic->napi);
2295
2296
2297 e100_enable_irq(nic);
2298 return 0;
2299
2300err_no_irq:
2301 del_timer_sync(&nic->watchdog);
2302err_clean_cbs:
2303 e100_clean_cbs(nic);
2304err_rx_clean_list:
2305 e100_rx_clean_list(nic);
2306 return err;
2307}
2308
2309static void e100_down(struct nic *nic)
2310{
2311
2312 napi_disable(&nic->napi);
2313 netif_stop_queue(nic->netdev);
2314 e100_hw_reset(nic);
2315 free_irq(nic->pdev->irq, nic->netdev);
2316 del_timer_sync(&nic->watchdog);
2317 netif_carrier_off(nic->netdev);
2318 e100_clean_cbs(nic);
2319 e100_rx_clean_list(nic);
2320}
2321
2322static void e100_tx_timeout(struct net_device *netdev, unsigned int txqueue)
2323{
2324 struct nic *nic = netdev_priv(netdev);
2325
2326
2327
2328 schedule_work(&nic->tx_timeout_task);
2329}
2330
2331static void e100_tx_timeout_task(struct work_struct *work)
2332{
2333 struct nic *nic = container_of(work, struct nic, tx_timeout_task);
2334 struct net_device *netdev = nic->netdev;
2335
2336 netif_printk(nic, tx_err, KERN_DEBUG, nic->netdev,
2337 "scb.status=0x%02X\n", ioread8(&nic->csr->scb.status));
2338
2339 rtnl_lock();
2340 if (netif_running(netdev)) {
2341 e100_down(netdev_priv(netdev));
2342 e100_up(netdev_priv(netdev));
2343 }
2344 rtnl_unlock();
2345}
2346
2347static int e100_loopback_test(struct nic *nic, enum loopback loopback_mode)
2348{
2349 int err;
2350 struct sk_buff *skb;
2351
2352
2353
2354
2355
2356
2357 if ((err = e100_rx_alloc_list(nic)))
2358 return err;
2359 if ((err = e100_alloc_cbs(nic)))
2360 goto err_clean_rx;
2361
2362
2363 if (nic->flags & ich && loopback_mode == lb_phy)
2364 loopback_mode = lb_mac;
2365
2366 nic->loopback = loopback_mode;
2367 if ((err = e100_hw_init(nic)))
2368 goto err_loopback_none;
2369
2370 if (loopback_mode == lb_phy)
2371 mdio_write(nic->netdev, nic->mii.phy_id, MII_BMCR,
2372 BMCR_LOOPBACK);
2373
2374 e100_start_receiver(nic, NULL);
2375
2376 if (!(skb = netdev_alloc_skb(nic->netdev, ETH_DATA_LEN))) {
2377 err = -ENOMEM;
2378 goto err_loopback_none;
2379 }
2380 skb_put(skb, ETH_DATA_LEN);
2381 memset(skb->data, 0xFF, ETH_DATA_LEN);
2382 e100_xmit_frame(skb, nic->netdev);
2383
2384 msleep(10);
2385
2386 dma_sync_single_for_cpu(&nic->pdev->dev, nic->rx_to_clean->dma_addr,
2387 RFD_BUF_LEN, DMA_BIDIRECTIONAL);
2388
2389 if (memcmp(nic->rx_to_clean->skb->data + sizeof(struct rfd),
2390 skb->data, ETH_DATA_LEN))
2391 err = -EAGAIN;
2392
2393err_loopback_none:
2394 mdio_write(nic->netdev, nic->mii.phy_id, MII_BMCR, 0);
2395 nic->loopback = lb_none;
2396 e100_clean_cbs(nic);
2397 e100_hw_reset(nic);
2398err_clean_rx:
2399 e100_rx_clean_list(nic);
2400 return err;
2401}
2402
2403#define MII_LED_CONTROL 0x1B
2404#define E100_82552_LED_OVERRIDE 0x19
2405#define E100_82552_LED_ON 0x000F
2406#define E100_82552_LED_OFF 0x000A
2407
2408static int e100_get_link_ksettings(struct net_device *netdev,
2409 struct ethtool_link_ksettings *cmd)
2410{
2411 struct nic *nic = netdev_priv(netdev);
2412
2413 mii_ethtool_get_link_ksettings(&nic->mii, cmd);
2414
2415 return 0;
2416}
2417
2418static int e100_set_link_ksettings(struct net_device *netdev,
2419 const struct ethtool_link_ksettings *cmd)
2420{
2421 struct nic *nic = netdev_priv(netdev);
2422 int err;
2423
2424 mdio_write(netdev, nic->mii.phy_id, MII_BMCR, BMCR_RESET);
2425 err = mii_ethtool_set_link_ksettings(&nic->mii, cmd);
2426 e100_exec_cb(nic, NULL, e100_configure);
2427
2428 return err;
2429}
2430
2431static void e100_get_drvinfo(struct net_device *netdev,
2432 struct ethtool_drvinfo *info)
2433{
2434 struct nic *nic = netdev_priv(netdev);
2435 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
2436 strlcpy(info->bus_info, pci_name(nic->pdev),
2437 sizeof(info->bus_info));
2438}
2439
2440#define E100_PHY_REGS 0x1D
2441static int e100_get_regs_len(struct net_device *netdev)
2442{
2443 struct nic *nic = netdev_priv(netdev);
2444
2445
2446
2447
2448 return (1 + E100_PHY_REGS) * sizeof(u32) + sizeof(nic->mem->dump_buf);
2449}
2450
2451static void e100_get_regs(struct net_device *netdev,
2452 struct ethtool_regs *regs, void *p)
2453{
2454 struct nic *nic = netdev_priv(netdev);
2455 u32 *buff = p;
2456 int i;
2457
2458 regs->version = (1 << 24) | nic->pdev->revision;
2459 buff[0] = ioread8(&nic->csr->scb.cmd_hi) << 24 |
2460 ioread8(&nic->csr->scb.cmd_lo) << 16 |
2461 ioread16(&nic->csr->scb.status);
2462 for (i = 0; i < E100_PHY_REGS; i++)
2463
2464
2465
2466
2467 buff[1 + i] = mdio_read(netdev, nic->mii.phy_id,
2468 E100_PHY_REGS - 1 - i);
2469 memset(nic->mem->dump_buf, 0, sizeof(nic->mem->dump_buf));
2470 e100_exec_cb(nic, NULL, e100_dump);
2471 msleep(10);
2472 memcpy(&buff[1 + E100_PHY_REGS], nic->mem->dump_buf,
2473 sizeof(nic->mem->dump_buf));
2474}
2475
2476static void e100_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2477{
2478 struct nic *nic = netdev_priv(netdev);
2479 wol->supported = (nic->mac >= mac_82558_D101_A4) ? WAKE_MAGIC : 0;
2480 wol->wolopts = (nic->flags & wol_magic) ? WAKE_MAGIC : 0;
2481}
2482
2483static int e100_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2484{
2485 struct nic *nic = netdev_priv(netdev);
2486
2487 if ((wol->wolopts && wol->wolopts != WAKE_MAGIC) ||
2488 !device_can_wakeup(&nic->pdev->dev))
2489 return -EOPNOTSUPP;
2490
2491 if (wol->wolopts)
2492 nic->flags |= wol_magic;
2493 else
2494 nic->flags &= ~wol_magic;
2495
2496 device_set_wakeup_enable(&nic->pdev->dev, wol->wolopts);
2497
2498 e100_exec_cb(nic, NULL, e100_configure);
2499
2500 return 0;
2501}
2502
2503static u32 e100_get_msglevel(struct net_device *netdev)
2504{
2505 struct nic *nic = netdev_priv(netdev);
2506 return nic->msg_enable;
2507}
2508
2509static void e100_set_msglevel(struct net_device *netdev, u32 value)
2510{
2511 struct nic *nic = netdev_priv(netdev);
2512 nic->msg_enable = value;
2513}
2514
2515static int e100_nway_reset(struct net_device *netdev)
2516{
2517 struct nic *nic = netdev_priv(netdev);
2518 return mii_nway_restart(&nic->mii);
2519}
2520
2521static u32 e100_get_link(struct net_device *netdev)
2522{
2523 struct nic *nic = netdev_priv(netdev);
2524 return mii_link_ok(&nic->mii);
2525}
2526
2527static int e100_get_eeprom_len(struct net_device *netdev)
2528{
2529 struct nic *nic = netdev_priv(netdev);
2530 return nic->eeprom_wc << 1;
2531}
2532
2533#define E100_EEPROM_MAGIC 0x1234
2534static int e100_get_eeprom(struct net_device *netdev,
2535 struct ethtool_eeprom *eeprom, u8 *bytes)
2536{
2537 struct nic *nic = netdev_priv(netdev);
2538
2539 eeprom->magic = E100_EEPROM_MAGIC;
2540 memcpy(bytes, &((u8 *)nic->eeprom)[eeprom->offset], eeprom->len);
2541
2542 return 0;
2543}
2544
2545static int e100_set_eeprom(struct net_device *netdev,
2546 struct ethtool_eeprom *eeprom, u8 *bytes)
2547{
2548 struct nic *nic = netdev_priv(netdev);
2549
2550 if (eeprom->magic != E100_EEPROM_MAGIC)
2551 return -EINVAL;
2552
2553 memcpy(&((u8 *)nic->eeprom)[eeprom->offset], bytes, eeprom->len);
2554
2555 return e100_eeprom_save(nic, eeprom->offset >> 1,
2556 (eeprom->len >> 1) + 1);
2557}
2558
2559static void e100_get_ringparam(struct net_device *netdev,
2560 struct ethtool_ringparam *ring)
2561{
2562 struct nic *nic = netdev_priv(netdev);
2563 struct param_range *rfds = &nic->params.rfds;
2564 struct param_range *cbs = &nic->params.cbs;
2565
2566 ring->rx_max_pending = rfds->max;
2567 ring->tx_max_pending = cbs->max;
2568 ring->rx_pending = rfds->count;
2569 ring->tx_pending = cbs->count;
2570}
2571
2572static int e100_set_ringparam(struct net_device *netdev,
2573 struct ethtool_ringparam *ring)
2574{
2575 struct nic *nic = netdev_priv(netdev);
2576 struct param_range *rfds = &nic->params.rfds;
2577 struct param_range *cbs = &nic->params.cbs;
2578
2579 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
2580 return -EINVAL;
2581
2582 if (netif_running(netdev))
2583 e100_down(nic);
2584 rfds->count = max(ring->rx_pending, rfds->min);
2585 rfds->count = min(rfds->count, rfds->max);
2586 cbs->count = max(ring->tx_pending, cbs->min);
2587 cbs->count = min(cbs->count, cbs->max);
2588 netif_info(nic, drv, nic->netdev, "Ring Param settings: rx: %d, tx %d\n",
2589 rfds->count, cbs->count);
2590 if (netif_running(netdev))
2591 e100_up(nic);
2592
2593 return 0;
2594}
2595
2596static const char e100_gstrings_test[][ETH_GSTRING_LEN] = {
2597 "Link test (on/offline)",
2598 "Eeprom test (on/offline)",
2599 "Self test (offline)",
2600 "Mac loopback (offline)",
2601 "Phy loopback (offline)",
2602};
2603#define E100_TEST_LEN ARRAY_SIZE(e100_gstrings_test)
2604
2605static void e100_diag_test(struct net_device *netdev,
2606 struct ethtool_test *test, u64 *data)
2607{
2608 struct ethtool_cmd cmd;
2609 struct nic *nic = netdev_priv(netdev);
2610 int i;
2611
2612 memset(data, 0, E100_TEST_LEN * sizeof(u64));
2613 data[0] = !mii_link_ok(&nic->mii);
2614 data[1] = e100_eeprom_load(nic);
2615 if (test->flags & ETH_TEST_FL_OFFLINE) {
2616
2617
2618 mii_ethtool_gset(&nic->mii, &cmd);
2619
2620 if (netif_running(netdev))
2621 e100_down(nic);
2622 data[2] = e100_self_test(nic);
2623 data[3] = e100_loopback_test(nic, lb_mac);
2624 data[4] = e100_loopback_test(nic, lb_phy);
2625
2626
2627 mii_ethtool_sset(&nic->mii, &cmd);
2628
2629 if (netif_running(netdev))
2630 e100_up(nic);
2631 }
2632 for (i = 0; i < E100_TEST_LEN; i++)
2633 test->flags |= data[i] ? ETH_TEST_FL_FAILED : 0;
2634
2635 msleep_interruptible(4 * 1000);
2636}
2637
2638static int e100_set_phys_id(struct net_device *netdev,
2639 enum ethtool_phys_id_state state)
2640{
2641 struct nic *nic = netdev_priv(netdev);
2642 enum led_state {
2643 led_on = 0x01,
2644 led_off = 0x04,
2645 led_on_559 = 0x05,
2646 led_on_557 = 0x07,
2647 };
2648 u16 led_reg = (nic->phy == phy_82552_v) ? E100_82552_LED_OVERRIDE :
2649 MII_LED_CONTROL;
2650 u16 leds = 0;
2651
2652 switch (state) {
2653 case ETHTOOL_ID_ACTIVE:
2654 return 2;
2655
2656 case ETHTOOL_ID_ON:
2657 leds = (nic->phy == phy_82552_v) ? E100_82552_LED_ON :
2658 (nic->mac < mac_82559_D101M) ? led_on_557 : led_on_559;
2659 break;
2660
2661 case ETHTOOL_ID_OFF:
2662 leds = (nic->phy == phy_82552_v) ? E100_82552_LED_OFF : led_off;
2663 break;
2664
2665 case ETHTOOL_ID_INACTIVE:
2666 break;
2667 }
2668
2669 mdio_write(netdev, nic->mii.phy_id, led_reg, leds);
2670 return 0;
2671}
2672
2673static const char e100_gstrings_stats[][ETH_GSTRING_LEN] = {
2674 "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
2675 "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
2676 "rx_length_errors", "rx_over_errors", "rx_crc_errors",
2677 "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
2678 "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
2679 "tx_heartbeat_errors", "tx_window_errors",
2680
2681 "tx_deferred", "tx_single_collisions", "tx_multi_collisions",
2682 "tx_flow_control_pause", "rx_flow_control_pause",
2683 "rx_flow_control_unsupported", "tx_tco_packets", "rx_tco_packets",
2684 "rx_short_frame_errors", "rx_over_length_errors",
2685};
2686#define E100_NET_STATS_LEN 21
2687#define E100_STATS_LEN ARRAY_SIZE(e100_gstrings_stats)
2688
2689static int e100_get_sset_count(struct net_device *netdev, int sset)
2690{
2691 switch (sset) {
2692 case ETH_SS_TEST:
2693 return E100_TEST_LEN;
2694 case ETH_SS_STATS:
2695 return E100_STATS_LEN;
2696 default:
2697 return -EOPNOTSUPP;
2698 }
2699}
2700
2701static void e100_get_ethtool_stats(struct net_device *netdev,
2702 struct ethtool_stats *stats, u64 *data)
2703{
2704 struct nic *nic = netdev_priv(netdev);
2705 int i;
2706
2707 for (i = 0; i < E100_NET_STATS_LEN; i++)
2708 data[i] = ((unsigned long *)&netdev->stats)[i];
2709
2710 data[i++] = nic->tx_deferred;
2711 data[i++] = nic->tx_single_collisions;
2712 data[i++] = nic->tx_multiple_collisions;
2713 data[i++] = nic->tx_fc_pause;
2714 data[i++] = nic->rx_fc_pause;
2715 data[i++] = nic->rx_fc_unsupported;
2716 data[i++] = nic->tx_tco_frames;
2717 data[i++] = nic->rx_tco_frames;
2718 data[i++] = nic->rx_short_frame_errors;
2719 data[i++] = nic->rx_over_length_errors;
2720}
2721
2722static void e100_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
2723{
2724 switch (stringset) {
2725 case ETH_SS_TEST:
2726 memcpy(data, e100_gstrings_test, sizeof(e100_gstrings_test));
2727 break;
2728 case ETH_SS_STATS:
2729 memcpy(data, e100_gstrings_stats, sizeof(e100_gstrings_stats));
2730 break;
2731 }
2732}
2733
2734static const struct ethtool_ops e100_ethtool_ops = {
2735 .get_drvinfo = e100_get_drvinfo,
2736 .get_regs_len = e100_get_regs_len,
2737 .get_regs = e100_get_regs,
2738 .get_wol = e100_get_wol,
2739 .set_wol = e100_set_wol,
2740 .get_msglevel = e100_get_msglevel,
2741 .set_msglevel = e100_set_msglevel,
2742 .nway_reset = e100_nway_reset,
2743 .get_link = e100_get_link,
2744 .get_eeprom_len = e100_get_eeprom_len,
2745 .get_eeprom = e100_get_eeprom,
2746 .set_eeprom = e100_set_eeprom,
2747 .get_ringparam = e100_get_ringparam,
2748 .set_ringparam = e100_set_ringparam,
2749 .self_test = e100_diag_test,
2750 .get_strings = e100_get_strings,
2751 .set_phys_id = e100_set_phys_id,
2752 .get_ethtool_stats = e100_get_ethtool_stats,
2753 .get_sset_count = e100_get_sset_count,
2754 .get_ts_info = ethtool_op_get_ts_info,
2755 .get_link_ksettings = e100_get_link_ksettings,
2756 .set_link_ksettings = e100_set_link_ksettings,
2757};
2758
2759static int e100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2760{
2761 struct nic *nic = netdev_priv(netdev);
2762
2763 return generic_mii_ioctl(&nic->mii, if_mii(ifr), cmd, NULL);
2764}
2765
2766static int e100_alloc(struct nic *nic)
2767{
2768 nic->mem = dma_alloc_coherent(&nic->pdev->dev, sizeof(struct mem),
2769 &nic->dma_addr, GFP_KERNEL);
2770 return nic->mem ? 0 : -ENOMEM;
2771}
2772
2773static void e100_free(struct nic *nic)
2774{
2775 if (nic->mem) {
2776 dma_free_coherent(&nic->pdev->dev, sizeof(struct mem),
2777 nic->mem, nic->dma_addr);
2778 nic->mem = NULL;
2779 }
2780}
2781
2782static int e100_open(struct net_device *netdev)
2783{
2784 struct nic *nic = netdev_priv(netdev);
2785 int err = 0;
2786
2787 netif_carrier_off(netdev);
2788 if ((err = e100_up(nic)))
2789 netif_err(nic, ifup, nic->netdev, "Cannot open interface, aborting\n");
2790 return err;
2791}
2792
2793static int e100_close(struct net_device *netdev)
2794{
2795 e100_down(netdev_priv(netdev));
2796 return 0;
2797}
2798
2799static int e100_set_features(struct net_device *netdev,
2800 netdev_features_t features)
2801{
2802 struct nic *nic = netdev_priv(netdev);
2803 netdev_features_t changed = features ^ netdev->features;
2804
2805 if (!(changed & (NETIF_F_RXFCS | NETIF_F_RXALL)))
2806 return 0;
2807
2808 netdev->features = features;
2809 e100_exec_cb(nic, NULL, e100_configure);
2810 return 1;
2811}
2812
2813static const struct net_device_ops e100_netdev_ops = {
2814 .ndo_open = e100_open,
2815 .ndo_stop = e100_close,
2816 .ndo_start_xmit = e100_xmit_frame,
2817 .ndo_validate_addr = eth_validate_addr,
2818 .ndo_set_rx_mode = e100_set_multicast_list,
2819 .ndo_set_mac_address = e100_set_mac_address,
2820 .ndo_eth_ioctl = e100_do_ioctl,
2821 .ndo_tx_timeout = e100_tx_timeout,
2822#ifdef CONFIG_NET_POLL_CONTROLLER
2823 .ndo_poll_controller = e100_netpoll,
2824#endif
2825 .ndo_set_features = e100_set_features,
2826};
2827
2828static int e100_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2829{
2830 struct net_device *netdev;
2831 struct nic *nic;
2832 int err;
2833
2834 if (!(netdev = alloc_etherdev(sizeof(struct nic))))
2835 return -ENOMEM;
2836
2837 netdev->hw_features |= NETIF_F_RXFCS;
2838 netdev->priv_flags |= IFF_SUPP_NOFCS;
2839 netdev->hw_features |= NETIF_F_RXALL;
2840
2841 netdev->netdev_ops = &e100_netdev_ops;
2842 netdev->ethtool_ops = &e100_ethtool_ops;
2843 netdev->watchdog_timeo = E100_WATCHDOG_PERIOD;
2844 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2845
2846 nic = netdev_priv(netdev);
2847 netif_napi_add(netdev, &nic->napi, e100_poll, E100_NAPI_WEIGHT);
2848 nic->netdev = netdev;
2849 nic->pdev = pdev;
2850 nic->msg_enable = (1 << debug) - 1;
2851 nic->mdio_ctrl = mdio_ctrl_hw;
2852 pci_set_drvdata(pdev, netdev);
2853
2854 if ((err = pci_enable_device(pdev))) {
2855 netif_err(nic, probe, nic->netdev, "Cannot enable PCI device, aborting\n");
2856 goto err_out_free_dev;
2857 }
2858
2859 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
2860 netif_err(nic, probe, nic->netdev, "Cannot find proper PCI device base address, aborting\n");
2861 err = -ENODEV;
2862 goto err_out_disable_pdev;
2863 }
2864
2865 if ((err = pci_request_regions(pdev, DRV_NAME))) {
2866 netif_err(nic, probe, nic->netdev, "Cannot obtain PCI resources, aborting\n");
2867 goto err_out_disable_pdev;
2868 }
2869
2870 if ((err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)))) {
2871 netif_err(nic, probe, nic->netdev, "No usable DMA configuration, aborting\n");
2872 goto err_out_free_res;
2873 }
2874
2875 SET_NETDEV_DEV(netdev, &pdev->dev);
2876
2877 if (use_io)
2878 netif_info(nic, probe, nic->netdev, "using i/o access mode\n");
2879
2880 nic->csr = pci_iomap(pdev, (use_io ? 1 : 0), sizeof(struct csr));
2881 if (!nic->csr) {
2882 netif_err(nic, probe, nic->netdev, "Cannot map device registers, aborting\n");
2883 err = -ENOMEM;
2884 goto err_out_free_res;
2885 }
2886
2887 if (ent->driver_data)
2888 nic->flags |= ich;
2889 else
2890 nic->flags &= ~ich;
2891
2892 e100_get_defaults(nic);
2893
2894
2895 if (nic->mac < mac_82558_D101_A4)
2896 netdev->features |= NETIF_F_VLAN_CHALLENGED;
2897
2898
2899 spin_lock_init(&nic->cb_lock);
2900 spin_lock_init(&nic->cmd_lock);
2901 spin_lock_init(&nic->mdio_lock);
2902
2903
2904
2905
2906 e100_hw_reset(nic);
2907
2908 pci_set_master(pdev);
2909
2910 timer_setup(&nic->watchdog, e100_watchdog, 0);
2911
2912 INIT_WORK(&nic->tx_timeout_task, e100_tx_timeout_task);
2913
2914 if ((err = e100_alloc(nic))) {
2915 netif_err(nic, probe, nic->netdev, "Cannot alloc driver memory, aborting\n");
2916 goto err_out_iounmap;
2917 }
2918
2919 if ((err = e100_eeprom_load(nic)))
2920 goto err_out_free;
2921
2922 e100_phy_init(nic);
2923
2924 memcpy(netdev->dev_addr, nic->eeprom, ETH_ALEN);
2925 if (!is_valid_ether_addr(netdev->dev_addr)) {
2926 if (!eeprom_bad_csum_allow) {
2927 netif_err(nic, probe, nic->netdev, "Invalid MAC address from EEPROM, aborting\n");
2928 err = -EAGAIN;
2929 goto err_out_free;
2930 } else {
2931 netif_err(nic, probe, nic->netdev, "Invalid MAC address from EEPROM, you MUST configure one.\n");
2932 }
2933 }
2934
2935
2936 if ((nic->mac >= mac_82558_D101_A4) &&
2937 (le16_to_cpu(nic->eeprom[eeprom_id]) & eeprom_id_wol)) {
2938 nic->flags |= wol_magic;
2939 device_set_wakeup_enable(&pdev->dev, true);
2940 }
2941
2942
2943 pci_pme_active(pdev, false);
2944
2945 strcpy(netdev->name, "eth%d");
2946 if ((err = register_netdev(netdev))) {
2947 netif_err(nic, probe, nic->netdev, "Cannot register net device, aborting\n");
2948 goto err_out_free;
2949 }
2950 nic->cbs_pool = dma_pool_create(netdev->name,
2951 &nic->pdev->dev,
2952 nic->params.cbs.max * sizeof(struct cb),
2953 sizeof(u32),
2954 0);
2955 if (!nic->cbs_pool) {
2956 netif_err(nic, probe, nic->netdev, "Cannot create DMA pool, aborting\n");
2957 err = -ENOMEM;
2958 goto err_out_pool;
2959 }
2960 netif_info(nic, probe, nic->netdev,
2961 "addr 0x%llx, irq %d, MAC addr %pM\n",
2962 (unsigned long long)pci_resource_start(pdev, use_io ? 1 : 0),
2963 pdev->irq, netdev->dev_addr);
2964
2965 return 0;
2966
2967err_out_pool:
2968 unregister_netdev(netdev);
2969err_out_free:
2970 e100_free(nic);
2971err_out_iounmap:
2972 pci_iounmap(pdev, nic->csr);
2973err_out_free_res:
2974 pci_release_regions(pdev);
2975err_out_disable_pdev:
2976 pci_disable_device(pdev);
2977err_out_free_dev:
2978 free_netdev(netdev);
2979 return err;
2980}
2981
2982static void e100_remove(struct pci_dev *pdev)
2983{
2984 struct net_device *netdev = pci_get_drvdata(pdev);
2985
2986 if (netdev) {
2987 struct nic *nic = netdev_priv(netdev);
2988 unregister_netdev(netdev);
2989 e100_free(nic);
2990 pci_iounmap(pdev, nic->csr);
2991 dma_pool_destroy(nic->cbs_pool);
2992 free_netdev(netdev);
2993 pci_release_regions(pdev);
2994 pci_disable_device(pdev);
2995 }
2996}
2997
2998#define E100_82552_SMARTSPEED 0x14
2999#define E100_82552_REV_ANEG 0x0200
3000#define E100_82552_ANEG_NOW 0x0400
3001static void __e100_shutdown(struct pci_dev *pdev, bool *enable_wake)
3002{
3003 struct net_device *netdev = pci_get_drvdata(pdev);
3004 struct nic *nic = netdev_priv(netdev);
3005
3006 if (netif_running(netdev))
3007 e100_down(nic);
3008 netif_device_detach(netdev);
3009
3010 if ((nic->flags & wol_magic) | e100_asf(nic)) {
3011
3012 if (nic->phy == phy_82552_v) {
3013 u16 smartspeed = mdio_read(netdev, nic->mii.phy_id,
3014 E100_82552_SMARTSPEED);
3015
3016 mdio_write(netdev, nic->mii.phy_id,
3017 E100_82552_SMARTSPEED, smartspeed |
3018 E100_82552_REV_ANEG | E100_82552_ANEG_NOW);
3019 }
3020 *enable_wake = true;
3021 } else {
3022 *enable_wake = false;
3023 }
3024
3025 pci_clear_master(pdev);
3026}
3027
3028static int __e100_power_off(struct pci_dev *pdev, bool wake)
3029{
3030 if (wake)
3031 return pci_prepare_to_sleep(pdev);
3032
3033 pci_wake_from_d3(pdev, false);
3034 pci_set_power_state(pdev, PCI_D3hot);
3035
3036 return 0;
3037}
3038
3039static int __maybe_unused e100_suspend(struct device *dev_d)
3040{
3041 bool wake;
3042
3043 __e100_shutdown(to_pci_dev(dev_d), &wake);
3044
3045 device_wakeup_disable(dev_d);
3046
3047 return 0;
3048}
3049
3050static int __maybe_unused e100_resume(struct device *dev_d)
3051{
3052 struct net_device *netdev = dev_get_drvdata(dev_d);
3053 struct nic *nic = netdev_priv(netdev);
3054
3055
3056 if (nic->phy == phy_82552_v) {
3057 u16 smartspeed = mdio_read(netdev, nic->mii.phy_id,
3058 E100_82552_SMARTSPEED);
3059
3060 mdio_write(netdev, nic->mii.phy_id,
3061 E100_82552_SMARTSPEED,
3062 smartspeed & ~(E100_82552_REV_ANEG));
3063 }
3064
3065 netif_device_attach(netdev);
3066 if (netif_running(netdev))
3067 e100_up(nic);
3068
3069 return 0;
3070}
3071
3072static void e100_shutdown(struct pci_dev *pdev)
3073{
3074 bool wake;
3075 __e100_shutdown(pdev, &wake);
3076 if (system_state == SYSTEM_POWER_OFF)
3077 __e100_power_off(pdev, wake);
3078}
3079
3080
3081
3082
3083
3084
3085
3086static pci_ers_result_t e100_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
3087{
3088 struct net_device *netdev = pci_get_drvdata(pdev);
3089 struct nic *nic = netdev_priv(netdev);
3090
3091 netif_device_detach(netdev);
3092
3093 if (state == pci_channel_io_perm_failure)
3094 return PCI_ERS_RESULT_DISCONNECT;
3095
3096 if (netif_running(netdev))
3097 e100_down(nic);
3098 pci_disable_device(pdev);
3099
3100
3101 return PCI_ERS_RESULT_NEED_RESET;
3102}
3103
3104
3105
3106
3107
3108
3109
3110static pci_ers_result_t e100_io_slot_reset(struct pci_dev *pdev)
3111{
3112 struct net_device *netdev = pci_get_drvdata(pdev);
3113 struct nic *nic = netdev_priv(netdev);
3114
3115 if (pci_enable_device(pdev)) {
3116 pr_err("Cannot re-enable PCI device after reset\n");
3117 return PCI_ERS_RESULT_DISCONNECT;
3118 }
3119 pci_set_master(pdev);
3120
3121
3122 if (0 != PCI_FUNC(pdev->devfn))
3123 return PCI_ERS_RESULT_RECOVERED;
3124 e100_hw_reset(nic);
3125 e100_phy_init(nic);
3126
3127 return PCI_ERS_RESULT_RECOVERED;
3128}
3129
3130
3131
3132
3133
3134
3135
3136
3137static void e100_io_resume(struct pci_dev *pdev)
3138{
3139 struct net_device *netdev = pci_get_drvdata(pdev);
3140 struct nic *nic = netdev_priv(netdev);
3141
3142
3143 pci_enable_wake(pdev, PCI_D0, 0);
3144
3145 netif_device_attach(netdev);
3146 if (netif_running(netdev)) {
3147 e100_open(netdev);
3148 mod_timer(&nic->watchdog, jiffies);
3149 }
3150}
3151
3152static const struct pci_error_handlers e100_err_handler = {
3153 .error_detected = e100_io_error_detected,
3154 .slot_reset = e100_io_slot_reset,
3155 .resume = e100_io_resume,
3156};
3157
3158static SIMPLE_DEV_PM_OPS(e100_pm_ops, e100_suspend, e100_resume);
3159
3160static struct pci_driver e100_driver = {
3161 .name = DRV_NAME,
3162 .id_table = e100_id_table,
3163 .probe = e100_probe,
3164 .remove = e100_remove,
3165
3166
3167 .driver.pm = &e100_pm_ops,
3168
3169 .shutdown = e100_shutdown,
3170 .err_handler = &e100_err_handler,
3171};
3172
3173static int __init e100_init_module(void)
3174{
3175 if (((1 << debug) - 1) & NETIF_MSG_DRV) {
3176 pr_info("%s\n", DRV_DESCRIPTION);
3177 pr_info("%s\n", DRV_COPYRIGHT);
3178 }
3179 return pci_register_driver(&e100_driver);
3180}
3181
3182static void __exit e100_cleanup_module(void)
3183{
3184 pci_unregister_driver(&e100_driver);
3185}
3186
3187module_init(e100_init_module);
3188module_exit(e100_cleanup_module);
3189