1
2
3
4#include <linux/bpf_trace.h>
5#include <linux/stringify.h>
6#include <net/xdp_sock_drv.h>
7#include <net/xdp.h>
8
9#include "i40e.h"
10#include "i40e_txrx_common.h"
11#include "i40e_xsk.h"
12
13int i40e_alloc_rx_bi_zc(struct i40e_ring *rx_ring)
14{
15 unsigned long sz = sizeof(*rx_ring->rx_bi_zc) * rx_ring->count;
16
17 rx_ring->rx_bi_zc = kzalloc(sz, GFP_KERNEL);
18 return rx_ring->rx_bi_zc ? 0 : -ENOMEM;
19}
20
21void i40e_clear_rx_bi_zc(struct i40e_ring *rx_ring)
22{
23 memset(rx_ring->rx_bi_zc, 0,
24 sizeof(*rx_ring->rx_bi_zc) * rx_ring->count);
25}
26
27static struct xdp_buff **i40e_rx_bi(struct i40e_ring *rx_ring, u32 idx)
28{
29 return &rx_ring->rx_bi_zc[idx];
30}
31
32
33
34
35
36
37
38
39
40
41static int i40e_xsk_pool_enable(struct i40e_vsi *vsi,
42 struct xsk_buff_pool *pool,
43 u16 qid)
44{
45 struct net_device *netdev = vsi->netdev;
46 bool if_running;
47 int err;
48
49 if (vsi->type != I40E_VSI_MAIN)
50 return -EINVAL;
51
52 if (qid >= vsi->num_queue_pairs)
53 return -EINVAL;
54
55 if (qid >= netdev->real_num_rx_queues ||
56 qid >= netdev->real_num_tx_queues)
57 return -EINVAL;
58
59 err = xsk_pool_dma_map(pool, &vsi->back->pdev->dev, I40E_RX_DMA_ATTR);
60 if (err)
61 return err;
62
63 set_bit(qid, vsi->af_xdp_zc_qps);
64
65 if_running = netif_running(vsi->netdev) && i40e_enabled_xdp_vsi(vsi);
66
67 if (if_running) {
68 err = i40e_queue_pair_disable(vsi, qid);
69 if (err)
70 return err;
71
72 err = i40e_queue_pair_enable(vsi, qid);
73 if (err)
74 return err;
75
76
77 err = i40e_xsk_wakeup(vsi->netdev, qid, XDP_WAKEUP_RX);
78 if (err)
79 return err;
80 }
81
82 return 0;
83}
84
85
86
87
88
89
90
91
92
93static int i40e_xsk_pool_disable(struct i40e_vsi *vsi, u16 qid)
94{
95 struct net_device *netdev = vsi->netdev;
96 struct xsk_buff_pool *pool;
97 bool if_running;
98 int err;
99
100 pool = xsk_get_pool_from_qid(netdev, qid);
101 if (!pool)
102 return -EINVAL;
103
104 if_running = netif_running(vsi->netdev) && i40e_enabled_xdp_vsi(vsi);
105
106 if (if_running) {
107 err = i40e_queue_pair_disable(vsi, qid);
108 if (err)
109 return err;
110 }
111
112 clear_bit(qid, vsi->af_xdp_zc_qps);
113 xsk_pool_dma_unmap(pool, I40E_RX_DMA_ATTR);
114
115 if (if_running) {
116 err = i40e_queue_pair_enable(vsi, qid);
117 if (err)
118 return err;
119 }
120
121 return 0;
122}
123
124
125
126
127
128
129
130
131
132
133
134
135int i40e_xsk_pool_setup(struct i40e_vsi *vsi, struct xsk_buff_pool *pool,
136 u16 qid)
137{
138 return pool ? i40e_xsk_pool_enable(vsi, pool, qid) :
139 i40e_xsk_pool_disable(vsi, qid);
140}
141
142
143
144
145
146
147
148
149static int i40e_run_xdp_zc(struct i40e_ring *rx_ring, struct xdp_buff *xdp)
150{
151 int err, result = I40E_XDP_PASS;
152 struct i40e_ring *xdp_ring;
153 struct bpf_prog *xdp_prog;
154 u32 act;
155
156
157
158
159 xdp_prog = READ_ONCE(rx_ring->xdp_prog);
160 act = bpf_prog_run_xdp(xdp_prog, xdp);
161
162 if (likely(act == XDP_REDIRECT)) {
163 err = xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog);
164 if (err)
165 goto out_failure;
166 return I40E_XDP_REDIR;
167 }
168
169 switch (act) {
170 case XDP_PASS:
171 break;
172 case XDP_TX:
173 xdp_ring = rx_ring->vsi->xdp_rings[rx_ring->queue_index];
174 result = i40e_xmit_xdp_tx_ring(xdp, xdp_ring);
175 if (result == I40E_XDP_CONSUMED)
176 goto out_failure;
177 break;
178 default:
179 bpf_warn_invalid_xdp_action(act);
180 fallthrough;
181 case XDP_ABORTED:
182out_failure:
183 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
184 fallthrough;
185 case XDP_DROP:
186 result = I40E_XDP_CONSUMED;
187 break;
188 }
189 return result;
190}
191
192bool i40e_alloc_rx_buffers_zc(struct i40e_ring *rx_ring, u16 count)
193{
194 u16 ntu = rx_ring->next_to_use;
195 union i40e_rx_desc *rx_desc;
196 struct xdp_buff **bi, *xdp;
197 dma_addr_t dma;
198 bool ok = true;
199
200 rx_desc = I40E_RX_DESC(rx_ring, ntu);
201 bi = i40e_rx_bi(rx_ring, ntu);
202 do {
203 xdp = xsk_buff_alloc(rx_ring->xsk_pool);
204 if (!xdp) {
205 ok = false;
206 goto no_buffers;
207 }
208 *bi = xdp;
209 dma = xsk_buff_xdp_get_dma(xdp);
210 rx_desc->read.pkt_addr = cpu_to_le64(dma);
211 rx_desc->read.hdr_addr = 0;
212
213 rx_desc++;
214 bi++;
215 ntu++;
216
217 if (unlikely(ntu == rx_ring->count)) {
218 rx_desc = I40E_RX_DESC(rx_ring, 0);
219 bi = i40e_rx_bi(rx_ring, 0);
220 ntu = 0;
221 }
222 } while (--count);
223
224no_buffers:
225 if (rx_ring->next_to_use != ntu) {
226
227 rx_desc->wb.qword1.status_error_len = 0;
228 i40e_release_rx_desc(rx_ring, ntu);
229 }
230
231 return ok;
232}
233
234
235
236
237
238
239
240
241
242
243static struct sk_buff *i40e_construct_skb_zc(struct i40e_ring *rx_ring,
244 struct xdp_buff *xdp)
245{
246 unsigned int metasize = xdp->data - xdp->data_meta;
247 unsigned int datasize = xdp->data_end - xdp->data;
248 struct sk_buff *skb;
249
250
251 skb = __napi_alloc_skb(&rx_ring->q_vector->napi,
252 xdp->data_end - xdp->data_hard_start,
253 GFP_ATOMIC | __GFP_NOWARN);
254 if (unlikely(!skb))
255 goto out;
256
257 skb_reserve(skb, xdp->data - xdp->data_hard_start);
258 memcpy(__skb_put(skb, datasize), xdp->data, datasize);
259 if (metasize)
260 skb_metadata_set(skb, metasize);
261
262out:
263 xsk_buff_free(xdp);
264 return skb;
265}
266
267static void i40e_handle_xdp_result_zc(struct i40e_ring *rx_ring,
268 struct xdp_buff *xdp_buff,
269 union i40e_rx_desc *rx_desc,
270 unsigned int *rx_packets,
271 unsigned int *rx_bytes,
272 unsigned int size,
273 unsigned int xdp_res)
274{
275 struct sk_buff *skb;
276
277 *rx_packets = 1;
278 *rx_bytes = size;
279
280 if (likely(xdp_res == I40E_XDP_REDIR) || xdp_res == I40E_XDP_TX)
281 return;
282
283 if (xdp_res == I40E_XDP_CONSUMED) {
284 xsk_buff_free(xdp_buff);
285 return;
286 }
287
288 if (xdp_res == I40E_XDP_PASS) {
289
290
291
292
293
294 skb = i40e_construct_skb_zc(rx_ring, xdp_buff);
295 if (!skb) {
296 rx_ring->rx_stats.alloc_buff_failed++;
297 *rx_packets = 0;
298 *rx_bytes = 0;
299 return;
300 }
301
302 if (eth_skb_pad(skb)) {
303 *rx_packets = 0;
304 *rx_bytes = 0;
305 return;
306 }
307
308 *rx_bytes = skb->len;
309 i40e_process_skb_fields(rx_ring, rx_desc, skb);
310 napi_gro_receive(&rx_ring->q_vector->napi, skb);
311 return;
312 }
313
314
315
316 WARN_ON_ONCE(1);
317}
318
319
320
321
322
323
324
325
326int i40e_clean_rx_irq_zc(struct i40e_ring *rx_ring, int budget)
327{
328 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
329 u16 cleaned_count = I40E_DESC_UNUSED(rx_ring);
330 u16 next_to_clean = rx_ring->next_to_clean;
331 u16 count_mask = rx_ring->count - 1;
332 unsigned int xdp_res, xdp_xmit = 0;
333 bool failure = false;
334
335 while (likely(total_rx_packets < (unsigned int)budget)) {
336 union i40e_rx_desc *rx_desc;
337 unsigned int rx_packets;
338 unsigned int rx_bytes;
339 struct xdp_buff *bi;
340 unsigned int size;
341 u64 qword;
342
343 rx_desc = I40E_RX_DESC(rx_ring, next_to_clean);
344 qword = le64_to_cpu(rx_desc->wb.qword1.status_error_len);
345
346
347
348
349
350 dma_rmb();
351
352 if (i40e_rx_is_programming_status(qword)) {
353 i40e_clean_programming_status(rx_ring,
354 rx_desc->raw.qword[0],
355 qword);
356 bi = *i40e_rx_bi(rx_ring, next_to_clean);
357 xsk_buff_free(bi);
358 next_to_clean = (next_to_clean + 1) & count_mask;
359 continue;
360 }
361
362 size = (qword & I40E_RXD_QW1_LENGTH_PBUF_MASK) >>
363 I40E_RXD_QW1_LENGTH_PBUF_SHIFT;
364 if (!size)
365 break;
366
367 bi = *i40e_rx_bi(rx_ring, next_to_clean);
368 bi->data_end = bi->data + size;
369 xsk_buff_dma_sync_for_cpu(bi, rx_ring->xsk_pool);
370
371 xdp_res = i40e_run_xdp_zc(rx_ring, bi);
372 i40e_handle_xdp_result_zc(rx_ring, bi, rx_desc, &rx_packets,
373 &rx_bytes, size, xdp_res);
374 total_rx_packets += rx_packets;
375 total_rx_bytes += rx_bytes;
376 xdp_xmit |= xdp_res & (I40E_XDP_TX | I40E_XDP_REDIR);
377 next_to_clean = (next_to_clean + 1) & count_mask;
378 }
379
380 rx_ring->next_to_clean = next_to_clean;
381 cleaned_count = (next_to_clean - rx_ring->next_to_use - 1) & count_mask;
382
383 if (cleaned_count >= I40E_RX_BUFFER_WRITE)
384 failure = !i40e_alloc_rx_buffers_zc(rx_ring, cleaned_count);
385
386 i40e_finalize_xdp_rx(rx_ring, xdp_xmit);
387 i40e_update_rx_stats(rx_ring, total_rx_bytes, total_rx_packets);
388
389 if (xsk_uses_need_wakeup(rx_ring->xsk_pool)) {
390 if (failure || next_to_clean == rx_ring->next_to_use)
391 xsk_set_rx_need_wakeup(rx_ring->xsk_pool);
392 else
393 xsk_clear_rx_need_wakeup(rx_ring->xsk_pool);
394
395 return (int)total_rx_packets;
396 }
397 return failure ? budget : (int)total_rx_packets;
398}
399
400static void i40e_xmit_pkt(struct i40e_ring *xdp_ring, struct xdp_desc *desc,
401 unsigned int *total_bytes)
402{
403 struct i40e_tx_desc *tx_desc;
404 dma_addr_t dma;
405
406 dma = xsk_buff_raw_get_dma(xdp_ring->xsk_pool, desc->addr);
407 xsk_buff_raw_dma_sync_for_device(xdp_ring->xsk_pool, dma, desc->len);
408
409 tx_desc = I40E_TX_DESC(xdp_ring, xdp_ring->next_to_use++);
410 tx_desc->buffer_addr = cpu_to_le64(dma);
411 tx_desc->cmd_type_offset_bsz = build_ctob(I40E_TX_DESC_CMD_ICRC | I40E_TX_DESC_CMD_EOP,
412 0, desc->len, 0);
413
414 *total_bytes += desc->len;
415}
416
417static void i40e_xmit_pkt_batch(struct i40e_ring *xdp_ring, struct xdp_desc *desc,
418 unsigned int *total_bytes)
419{
420 u16 ntu = xdp_ring->next_to_use;
421 struct i40e_tx_desc *tx_desc;
422 dma_addr_t dma;
423 u32 i;
424
425 loop_unrolled_for(i = 0; i < PKTS_PER_BATCH; i++) {
426 dma = xsk_buff_raw_get_dma(xdp_ring->xsk_pool, desc[i].addr);
427 xsk_buff_raw_dma_sync_for_device(xdp_ring->xsk_pool, dma, desc[i].len);
428
429 tx_desc = I40E_TX_DESC(xdp_ring, ntu++);
430 tx_desc->buffer_addr = cpu_to_le64(dma);
431 tx_desc->cmd_type_offset_bsz = build_ctob(I40E_TX_DESC_CMD_ICRC |
432 I40E_TX_DESC_CMD_EOP,
433 0, desc[i].len, 0);
434
435 *total_bytes += desc[i].len;
436 }
437
438 xdp_ring->next_to_use = ntu;
439}
440
441static void i40e_fill_tx_hw_ring(struct i40e_ring *xdp_ring, struct xdp_desc *descs, u32 nb_pkts,
442 unsigned int *total_bytes)
443{
444 u32 batched, leftover, i;
445
446 batched = nb_pkts & ~(PKTS_PER_BATCH - 1);
447 leftover = nb_pkts & (PKTS_PER_BATCH - 1);
448 for (i = 0; i < batched; i += PKTS_PER_BATCH)
449 i40e_xmit_pkt_batch(xdp_ring, &descs[i], total_bytes);
450 for (i = batched; i < batched + leftover; i++)
451 i40e_xmit_pkt(xdp_ring, &descs[i], total_bytes);
452}
453
454static void i40e_set_rs_bit(struct i40e_ring *xdp_ring)
455{
456 u16 ntu = xdp_ring->next_to_use ? xdp_ring->next_to_use - 1 : xdp_ring->count - 1;
457 struct i40e_tx_desc *tx_desc;
458
459 tx_desc = I40E_TX_DESC(xdp_ring, ntu);
460 tx_desc->cmd_type_offset_bsz |= cpu_to_le64(I40E_TX_DESC_CMD_RS << I40E_TXD_QW1_CMD_SHIFT);
461}
462
463
464
465
466
467
468
469
470static bool i40e_xmit_zc(struct i40e_ring *xdp_ring, unsigned int budget)
471{
472 struct xdp_desc *descs = xdp_ring->xsk_descs;
473 u32 nb_pkts, nb_processed = 0;
474 unsigned int total_bytes = 0;
475
476 nb_pkts = xsk_tx_peek_release_desc_batch(xdp_ring->xsk_pool, descs, budget);
477 if (!nb_pkts)
478 return true;
479
480 if (xdp_ring->next_to_use + nb_pkts >= xdp_ring->count) {
481 nb_processed = xdp_ring->count - xdp_ring->next_to_use;
482 i40e_fill_tx_hw_ring(xdp_ring, descs, nb_processed, &total_bytes);
483 xdp_ring->next_to_use = 0;
484 }
485
486 i40e_fill_tx_hw_ring(xdp_ring, &descs[nb_processed], nb_pkts - nb_processed,
487 &total_bytes);
488
489
490 i40e_set_rs_bit(xdp_ring);
491 i40e_xdp_ring_update_tail(xdp_ring);
492
493 i40e_update_tx_stats(xdp_ring, nb_pkts, total_bytes);
494
495 return nb_pkts < budget;
496}
497
498
499
500
501
502
503static void i40e_clean_xdp_tx_buffer(struct i40e_ring *tx_ring,
504 struct i40e_tx_buffer *tx_bi)
505{
506 xdp_return_frame(tx_bi->xdpf);
507 tx_ring->xdp_tx_active--;
508 dma_unmap_single(tx_ring->dev,
509 dma_unmap_addr(tx_bi, dma),
510 dma_unmap_len(tx_bi, len), DMA_TO_DEVICE);
511 dma_unmap_len_set(tx_bi, len, 0);
512}
513
514
515
516
517
518
519
520
521bool i40e_clean_xdp_tx_irq(struct i40e_vsi *vsi, struct i40e_ring *tx_ring)
522{
523 struct xsk_buff_pool *bp = tx_ring->xsk_pool;
524 u32 i, completed_frames, xsk_frames = 0;
525 u32 head_idx = i40e_get_head(tx_ring);
526 struct i40e_tx_buffer *tx_bi;
527 unsigned int ntc;
528
529 if (head_idx < tx_ring->next_to_clean)
530 head_idx += tx_ring->count;
531 completed_frames = head_idx - tx_ring->next_to_clean;
532
533 if (completed_frames == 0)
534 goto out_xmit;
535
536 if (likely(!tx_ring->xdp_tx_active)) {
537 xsk_frames = completed_frames;
538 goto skip;
539 }
540
541 ntc = tx_ring->next_to_clean;
542
543 for (i = 0; i < completed_frames; i++) {
544 tx_bi = &tx_ring->tx_bi[ntc];
545
546 if (tx_bi->xdpf) {
547 i40e_clean_xdp_tx_buffer(tx_ring, tx_bi);
548 tx_bi->xdpf = NULL;
549 } else {
550 xsk_frames++;
551 }
552
553 if (++ntc >= tx_ring->count)
554 ntc = 0;
555 }
556
557skip:
558 tx_ring->next_to_clean += completed_frames;
559 if (unlikely(tx_ring->next_to_clean >= tx_ring->count))
560 tx_ring->next_to_clean -= tx_ring->count;
561
562 if (xsk_frames)
563 xsk_tx_completed(bp, xsk_frames);
564
565 i40e_arm_wb(tx_ring, vsi, completed_frames);
566
567out_xmit:
568 if (xsk_uses_need_wakeup(tx_ring->xsk_pool))
569 xsk_set_tx_need_wakeup(tx_ring->xsk_pool);
570
571 return i40e_xmit_zc(tx_ring, I40E_DESC_UNUSED(tx_ring));
572}
573
574
575
576
577
578
579
580
581
582int i40e_xsk_wakeup(struct net_device *dev, u32 queue_id, u32 flags)
583{
584 struct i40e_netdev_priv *np = netdev_priv(dev);
585 struct i40e_vsi *vsi = np->vsi;
586 struct i40e_pf *pf = vsi->back;
587 struct i40e_ring *ring;
588
589 if (test_bit(__I40E_CONFIG_BUSY, pf->state))
590 return -EAGAIN;
591
592 if (test_bit(__I40E_VSI_DOWN, vsi->state))
593 return -ENETDOWN;
594
595 if (!i40e_enabled_xdp_vsi(vsi))
596 return -ENXIO;
597
598 if (queue_id >= vsi->num_queue_pairs)
599 return -ENXIO;
600
601 if (!vsi->xdp_rings[queue_id]->xsk_pool)
602 return -ENXIO;
603
604 ring = vsi->xdp_rings[queue_id];
605
606
607
608
609
610
611
612 if (!napi_if_scheduled_mark_missed(&ring->q_vector->napi))
613 i40e_force_wb(vsi, ring->q_vector);
614
615 return 0;
616}
617
618void i40e_xsk_clean_rx_ring(struct i40e_ring *rx_ring)
619{
620 u16 count_mask = rx_ring->count - 1;
621 u16 ntc = rx_ring->next_to_clean;
622 u16 ntu = rx_ring->next_to_use;
623
624 for ( ; ntc != ntu; ntc = (ntc + 1) & count_mask) {
625 struct xdp_buff *rx_bi = *i40e_rx_bi(rx_ring, ntc);
626
627 xsk_buff_free(rx_bi);
628 }
629}
630
631
632
633
634
635void i40e_xsk_clean_tx_ring(struct i40e_ring *tx_ring)
636{
637 u16 ntc = tx_ring->next_to_clean, ntu = tx_ring->next_to_use;
638 struct xsk_buff_pool *bp = tx_ring->xsk_pool;
639 struct i40e_tx_buffer *tx_bi;
640 u32 xsk_frames = 0;
641
642 while (ntc != ntu) {
643 tx_bi = &tx_ring->tx_bi[ntc];
644
645 if (tx_bi->xdpf)
646 i40e_clean_xdp_tx_buffer(tx_ring, tx_bi);
647 else
648 xsk_frames++;
649
650 tx_bi->xdpf = NULL;
651
652 ntc++;
653 if (ntc >= tx_ring->count)
654 ntc = 0;
655 }
656
657 if (xsk_frames)
658 xsk_tx_completed(bp, xsk_frames);
659}
660
661
662
663
664
665
666
667
668bool i40e_xsk_any_rx_ring_enabled(struct i40e_vsi *vsi)
669{
670 struct net_device *netdev = vsi->netdev;
671 int i;
672
673 for (i = 0; i < vsi->num_queue_pairs; i++) {
674 if (xsk_get_pool_from_qid(netdev, i))
675 return true;
676 }
677
678 return false;
679}
680