LXR linux/drivers/net/ethernet/intel/ice/ice_sbq

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/* Copyright (C) 2021, Intel Corporation. */
   3
   4#ifndef _ICE_SBQ_CMD_H_
   5#define _ICE_SBQ_CMD_H_
   6
   7/* This header file defines the Sideband Queue commands, error codes and
   8 * descriptor format. It is shared between Firmware and Software.
   9 */
  10
  11/* Sideband Queue command structure and opcodes */
  12enum ice_sbq_opc {
  13        /* Sideband Queue commands */
  14        ice_sbq_opc_neigh_dev_req                       = 0x0C00,
  15        ice_sbq_opc_neigh_dev_ev                        = 0x0C01
  16};
  17
  18/* Sideband Queue descriptor. Indirect command
  19 * and non posted
  20 */
  21struct ice_sbq_cmd_desc {
  22        __le16 flags;
  23        __le16 opcode;
  24        __le16 datalen;
  25        __le16 cmd_retval;
  26
  27        /* Opaque message data */
  28        __le32 cookie_high;
  29        __le32 cookie_low;
  30
  31        union {
  32                __le16 cmd_len;
  33                __le16 cmpl_len;
  34        } param0;
  35
  36        u8 reserved[6];
  37        __le32 addr_high;
  38        __le32 addr_low;
  39};
  40
  41struct ice_sbq_evt_desc {
  42        __le16 flags;
  43        __le16 opcode;
  44        __le16 datalen;
  45        __le16 cmd_retval;
  46        u8 data[24];
  47};
  48
  49enum ice_sbq_msg_dev {
  50        rmn_0   = 0x02,
  51        rmn_1   = 0x03,
  52        rmn_2   = 0x04,
  53        cgu     = 0x06
  54};
  55
  56enum ice_sbq_msg_opcode {
  57        ice_sbq_msg_rd  = 0x00,
  58        ice_sbq_msg_wr  = 0x01
  59};
  60
  61#define ICE_SBQ_MSG_FLAGS       0x40
  62#define ICE_SBQ_MSG_SBE_FBE     0x0F
  63
  64struct ice_sbq_msg_req {
  65        u8 dest_dev;
  66        u8 src_dev;
  67        u8 opcode;
  68        u8 flags;
  69        u8 sbe_fbe;
  70        u8 func_id;
  71        __le16 msg_addr_low;
  72        __le32 msg_addr_high;
  73        __le32 data;
  74};
  75
  76struct ice_sbq_msg_cmpl {
  77        u8 dest_dev;
  78        u8 src_dev;
  79        u8 opcode;
  80        u8 flags;
  81        __le32 data;
  82};
  83
  84/* Internal struct */
  85struct ice_sbq_msg_input {
  86        u8 dest_dev;
  87        u8 opcode;
  88        u16 msg_addr_low;
  89        u32 msg_addr_high;
  90        u32 data;
  91};
  92#endif /* _ICE_SBQ_CMD_H_ */
  93