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4#include "e1000_mbx.h"
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16s32 igb_read_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id,
17 bool unlock)
18{
19 struct e1000_mbx_info *mbx = &hw->mbx;
20 s32 ret_val = -E1000_ERR_MBX;
21
22
23 if (size > mbx->size)
24 size = mbx->size;
25
26 if (mbx->ops.read)
27 ret_val = mbx->ops.read(hw, msg, size, mbx_id, unlock);
28
29 return ret_val;
30}
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41s32 igb_write_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id)
42{
43 struct e1000_mbx_info *mbx = &hw->mbx;
44 s32 ret_val = 0;
45
46 if (size > mbx->size)
47 ret_val = -E1000_ERR_MBX;
48
49 else if (mbx->ops.write)
50 ret_val = mbx->ops.write(hw, msg, size, mbx_id);
51
52 return ret_val;
53}
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62s32 igb_check_for_msg(struct e1000_hw *hw, u16 mbx_id)
63{
64 struct e1000_mbx_info *mbx = &hw->mbx;
65 s32 ret_val = -E1000_ERR_MBX;
66
67 if (mbx->ops.check_for_msg)
68 ret_val = mbx->ops.check_for_msg(hw, mbx_id);
69
70 return ret_val;
71}
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80s32 igb_check_for_ack(struct e1000_hw *hw, u16 mbx_id)
81{
82 struct e1000_mbx_info *mbx = &hw->mbx;
83 s32 ret_val = -E1000_ERR_MBX;
84
85 if (mbx->ops.check_for_ack)
86 ret_val = mbx->ops.check_for_ack(hw, mbx_id);
87
88 return ret_val;
89}
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98s32 igb_check_for_rst(struct e1000_hw *hw, u16 mbx_id)
99{
100 struct e1000_mbx_info *mbx = &hw->mbx;
101 s32 ret_val = -E1000_ERR_MBX;
102
103 if (mbx->ops.check_for_rst)
104 ret_val = mbx->ops.check_for_rst(hw, mbx_id);
105
106 return ret_val;
107}
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116s32 igb_unlock_mbx(struct e1000_hw *hw, u16 mbx_id)
117{
118 struct e1000_mbx_info *mbx = &hw->mbx;
119 s32 ret_val = -E1000_ERR_MBX;
120
121 if (mbx->ops.unlock)
122 ret_val = mbx->ops.unlock(hw, mbx_id);
123
124 return ret_val;
125}
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133
134static s32 igb_poll_for_msg(struct e1000_hw *hw, u16 mbx_id)
135{
136 struct e1000_mbx_info *mbx = &hw->mbx;
137 int countdown = mbx->timeout;
138
139 if (!countdown || !mbx->ops.check_for_msg)
140 goto out;
141
142 while (countdown && mbx->ops.check_for_msg(hw, mbx_id)) {
143 countdown--;
144 if (!countdown)
145 break;
146 udelay(mbx->usec_delay);
147 }
148
149
150 if (!countdown)
151 mbx->timeout = 0;
152out:
153 return countdown ? 0 : -E1000_ERR_MBX;
154}
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162
163static s32 igb_poll_for_ack(struct e1000_hw *hw, u16 mbx_id)
164{
165 struct e1000_mbx_info *mbx = &hw->mbx;
166 int countdown = mbx->timeout;
167
168 if (!countdown || !mbx->ops.check_for_ack)
169 goto out;
170
171 while (countdown && mbx->ops.check_for_ack(hw, mbx_id)) {
172 countdown--;
173 if (!countdown)
174 break;
175 udelay(mbx->usec_delay);
176 }
177
178
179 if (!countdown)
180 mbx->timeout = 0;
181out:
182 return countdown ? 0 : -E1000_ERR_MBX;
183}
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194
195static s32 igb_read_posted_mbx(struct e1000_hw *hw, u32 *msg, u16 size,
196 u16 mbx_id)
197{
198 struct e1000_mbx_info *mbx = &hw->mbx;
199 s32 ret_val = -E1000_ERR_MBX;
200
201 if (!mbx->ops.read)
202 goto out;
203
204 ret_val = igb_poll_for_msg(hw, mbx_id);
205
206 if (!ret_val)
207 ret_val = mbx->ops.read(hw, msg, size, mbx_id, true);
208out:
209 return ret_val;
210}
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221
222static s32 igb_write_posted_mbx(struct e1000_hw *hw, u32 *msg, u16 size,
223 u16 mbx_id)
224{
225 struct e1000_mbx_info *mbx = &hw->mbx;
226 s32 ret_val = -E1000_ERR_MBX;
227
228
229 if (!mbx->ops.write || !mbx->timeout)
230 goto out;
231
232
233 ret_val = mbx->ops.write(hw, msg, size, mbx_id);
234
235
236 if (!ret_val)
237 ret_val = igb_poll_for_ack(hw, mbx_id);
238out:
239 return ret_val;
240}
241
242static s32 igb_check_for_bit_pf(struct e1000_hw *hw, u32 mask)
243{
244 u32 mbvficr = rd32(E1000_MBVFICR);
245 s32 ret_val = -E1000_ERR_MBX;
246
247 if (mbvficr & mask) {
248 ret_val = 0;
249 wr32(E1000_MBVFICR, mask);
250 }
251
252 return ret_val;
253}
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261
262static s32 igb_check_for_msg_pf(struct e1000_hw *hw, u16 vf_number)
263{
264 s32 ret_val = -E1000_ERR_MBX;
265
266 if (!igb_check_for_bit_pf(hw, E1000_MBVFICR_VFREQ_VF1 << vf_number)) {
267 ret_val = 0;
268 hw->mbx.stats.reqs++;
269 }
270
271 return ret_val;
272}
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280
281static s32 igb_check_for_ack_pf(struct e1000_hw *hw, u16 vf_number)
282{
283 s32 ret_val = -E1000_ERR_MBX;
284
285 if (!igb_check_for_bit_pf(hw, E1000_MBVFICR_VFACK_VF1 << vf_number)) {
286 ret_val = 0;
287 hw->mbx.stats.acks++;
288 }
289
290 return ret_val;
291}
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299
300static s32 igb_check_for_rst_pf(struct e1000_hw *hw, u16 vf_number)
301{
302 u32 vflre = rd32(E1000_VFLRE);
303 s32 ret_val = -E1000_ERR_MBX;
304
305 if (vflre & BIT(vf_number)) {
306 ret_val = 0;
307 wr32(E1000_VFLRE, BIT(vf_number));
308 hw->mbx.stats.rsts++;
309 }
310
311 return ret_val;
312}
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320
321static s32 igb_obtain_mbx_lock_pf(struct e1000_hw *hw, u16 vf_number)
322{
323 s32 ret_val = -E1000_ERR_MBX;
324 u32 p2v_mailbox;
325 int count = 10;
326
327 do {
328
329 wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_PFU);
330
331
332 p2v_mailbox = rd32(E1000_P2VMAILBOX(vf_number));
333 if (p2v_mailbox & E1000_P2VMAILBOX_PFU) {
334 ret_val = 0;
335 break;
336 }
337 udelay(1000);
338 } while (count-- > 0);
339
340 return ret_val;
341}
342
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349
350static s32 igb_release_mbx_lock_pf(struct e1000_hw *hw, u16 vf_number)
351{
352 u32 p2v_mailbox;
353
354
355 p2v_mailbox = rd32(E1000_P2VMAILBOX(vf_number));
356 if (p2v_mailbox & E1000_P2VMAILBOX_PFU)
357 wr32(E1000_P2VMAILBOX(vf_number),
358 p2v_mailbox & ~E1000_P2VMAILBOX_PFU);
359
360 return 0;
361}
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371
372static s32 igb_write_mbx_pf(struct e1000_hw *hw, u32 *msg, u16 size,
373 u16 vf_number)
374{
375 s32 ret_val;
376 u16 i;
377
378
379 ret_val = igb_obtain_mbx_lock_pf(hw, vf_number);
380 if (ret_val)
381 goto out_no_write;
382
383
384 igb_check_for_msg_pf(hw, vf_number);
385 igb_check_for_ack_pf(hw, vf_number);
386
387
388 for (i = 0; i < size; i++)
389 array_wr32(E1000_VMBMEM(vf_number), i, msg[i]);
390
391
392 wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_STS);
393
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395 hw->mbx.stats.msgs_tx++;
396
397out_no_write:
398 return ret_val;
399
400}
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414static s32 igb_read_mbx_pf(struct e1000_hw *hw, u32 *msg, u16 size,
415 u16 vf_number, bool unlock)
416{
417 s32 ret_val;
418 u16 i;
419
420
421 ret_val = igb_obtain_mbx_lock_pf(hw, vf_number);
422 if (ret_val)
423 goto out_no_read;
424
425
426 for (i = 0; i < size; i++)
427 msg[i] = array_rd32(E1000_VMBMEM(vf_number), i);
428
429
430 if (unlock)
431 wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_ACK);
432 else
433 wr32(E1000_P2VMAILBOX(vf_number),
434 E1000_P2VMAILBOX_ACK | E1000_P2VMAILBOX_PFU);
435
436
437 hw->mbx.stats.msgs_rx++;
438
439out_no_read:
440 return ret_val;
441}
442
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448
449s32 igb_init_mbx_params_pf(struct e1000_hw *hw)
450{
451 struct e1000_mbx_info *mbx = &hw->mbx;
452
453 mbx->timeout = 0;
454 mbx->usec_delay = 0;
455
456 mbx->size = E1000_VFMAILBOX_SIZE;
457
458 mbx->ops.read = igb_read_mbx_pf;
459 mbx->ops.write = igb_write_mbx_pf;
460 mbx->ops.read_posted = igb_read_posted_mbx;
461 mbx->ops.write_posted = igb_write_posted_mbx;
462 mbx->ops.check_for_msg = igb_check_for_msg_pf;
463 mbx->ops.check_for_ack = igb_check_for_ack_pf;
464 mbx->ops.check_for_rst = igb_check_for_rst_pf;
465 mbx->ops.unlock = igb_release_mbx_lock_pf;
466
467 mbx->stats.msgs_tx = 0;
468 mbx->stats.msgs_rx = 0;
469 mbx->stats.reqs = 0;
470 mbx->stats.acks = 0;
471 mbx->stats.rsts = 0;
472
473 return 0;
474}
475
476