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33#include <linux/etherdevice.h>
34#include <linux/mlx5/driver.h>
35#include <linux/mlx5/mlx5_ifc.h>
36#include <linux/mlx5/vport.h>
37#include <linux/mlx5/fs.h>
38#include <linux/mlx5/mpfs.h>
39#include "esw/acl/lgcy.h"
40#include "esw/legacy.h"
41#include "esw/qos.h"
42#include "mlx5_core.h"
43#include "lib/eq.h"
44#include "eswitch.h"
45#include "fs_core.h"
46#include "devlink.h"
47#include "ecpf.h"
48#include "en/mod_hdr.h"
49
50enum {
51 MLX5_ACTION_NONE = 0,
52 MLX5_ACTION_ADD = 1,
53 MLX5_ACTION_DEL = 2,
54};
55
56
57struct vport_addr {
58 struct l2addr_node node;
59 u8 action;
60 u16 vport;
61 struct mlx5_flow_handle *flow_rule;
62 bool mpfs;
63
64 bool mc_promisc;
65};
66
67static int mlx5_eswitch_check(const struct mlx5_core_dev *dev)
68{
69 if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
70 return -EOPNOTSUPP;
71
72 if (!MLX5_ESWITCH_MANAGER(dev))
73 return -EOPNOTSUPP;
74
75 return 0;
76}
77
78struct mlx5_eswitch *mlx5_devlink_eswitch_get(struct devlink *devlink)
79{
80 struct mlx5_core_dev *dev = devlink_priv(devlink);
81 int err;
82
83 err = mlx5_eswitch_check(dev);
84 if (err)
85 return ERR_PTR(err);
86
87 return dev->priv.eswitch;
88}
89
90struct mlx5_vport *__must_check
91mlx5_eswitch_get_vport(struct mlx5_eswitch *esw, u16 vport_num)
92{
93 struct mlx5_vport *vport;
94
95 if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager))
96 return ERR_PTR(-EPERM);
97
98 vport = xa_load(&esw->vports, vport_num);
99 if (!vport) {
100 esw_debug(esw->dev, "vport out of range: num(0x%x)\n", vport_num);
101 return ERR_PTR(-EINVAL);
102 }
103 return vport;
104}
105
106static int arm_vport_context_events_cmd(struct mlx5_core_dev *dev, u16 vport,
107 u32 events_mask)
108{
109 u32 in[MLX5_ST_SZ_DW(modify_nic_vport_context_in)] = {};
110 void *nic_vport_ctx;
111
112 MLX5_SET(modify_nic_vport_context_in, in,
113 opcode, MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
114 MLX5_SET(modify_nic_vport_context_in, in, field_select.change_event, 1);
115 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
116 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
117 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in,
118 in, nic_vport_context);
119
120 MLX5_SET(nic_vport_context, nic_vport_ctx, arm_change_event, 1);
121
122 if (events_mask & MLX5_VPORT_UC_ADDR_CHANGE)
123 MLX5_SET(nic_vport_context, nic_vport_ctx,
124 event_on_uc_address_change, 1);
125 if (events_mask & MLX5_VPORT_MC_ADDR_CHANGE)
126 MLX5_SET(nic_vport_context, nic_vport_ctx,
127 event_on_mc_address_change, 1);
128 if (events_mask & MLX5_VPORT_PROMISC_CHANGE)
129 MLX5_SET(nic_vport_context, nic_vport_ctx,
130 event_on_promisc_change, 1);
131
132 return mlx5_cmd_exec_in(dev, modify_nic_vport_context, in);
133}
134
135
136int mlx5_eswitch_modify_esw_vport_context(struct mlx5_core_dev *dev, u16 vport,
137 bool other_vport, void *in)
138{
139 MLX5_SET(modify_esw_vport_context_in, in, opcode,
140 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT);
141 MLX5_SET(modify_esw_vport_context_in, in, vport_number, vport);
142 MLX5_SET(modify_esw_vport_context_in, in, other_vport, other_vport);
143 return mlx5_cmd_exec_in(dev, modify_esw_vport_context, in);
144}
145
146static int modify_esw_vport_cvlan(struct mlx5_core_dev *dev, u16 vport,
147 u16 vlan, u8 qos, u8 set_flags)
148{
149 u32 in[MLX5_ST_SZ_DW(modify_esw_vport_context_in)] = {};
150
151 if (!MLX5_CAP_ESW(dev, vport_cvlan_strip) ||
152 !MLX5_CAP_ESW(dev, vport_cvlan_insert_if_not_exist))
153 return -EOPNOTSUPP;
154
155 esw_debug(dev, "Set Vport[%d] VLAN %d qos %d set=%x\n",
156 vport, vlan, qos, set_flags);
157
158 if (set_flags & SET_VLAN_STRIP)
159 MLX5_SET(modify_esw_vport_context_in, in,
160 esw_vport_context.vport_cvlan_strip, 1);
161
162 if (set_flags & SET_VLAN_INSERT) {
163
164 MLX5_SET(modify_esw_vport_context_in, in,
165 esw_vport_context.vport_cvlan_insert, 1);
166
167 MLX5_SET(modify_esw_vport_context_in, in,
168 esw_vport_context.cvlan_pcp, qos);
169 MLX5_SET(modify_esw_vport_context_in, in,
170 esw_vport_context.cvlan_id, vlan);
171 }
172
173 MLX5_SET(modify_esw_vport_context_in, in,
174 field_select.vport_cvlan_strip, 1);
175 MLX5_SET(modify_esw_vport_context_in, in,
176 field_select.vport_cvlan_insert, 1);
177
178 return mlx5_eswitch_modify_esw_vport_context(dev, vport, true, in);
179}
180
181
182static struct mlx5_flow_handle *
183__esw_fdb_set_vport_rule(struct mlx5_eswitch *esw, u16 vport, bool rx_rule,
184 u8 mac_c[ETH_ALEN], u8 mac_v[ETH_ALEN])
185{
186 int match_header = (is_zero_ether_addr(mac_c) ? 0 :
187 MLX5_MATCH_OUTER_HEADERS);
188 struct mlx5_flow_handle *flow_rule = NULL;
189 struct mlx5_flow_act flow_act = {0};
190 struct mlx5_flow_destination dest = {};
191 struct mlx5_flow_spec *spec;
192 void *mv_misc = NULL;
193 void *mc_misc = NULL;
194 u8 *dmac_v = NULL;
195 u8 *dmac_c = NULL;
196
197 if (rx_rule)
198 match_header |= MLX5_MATCH_MISC_PARAMETERS;
199
200 spec = kvzalloc(sizeof(*spec), GFP_KERNEL);
201 if (!spec)
202 return NULL;
203
204 dmac_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
205 outer_headers.dmac_47_16);
206 dmac_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
207 outer_headers.dmac_47_16);
208
209 if (match_header & MLX5_MATCH_OUTER_HEADERS) {
210 ether_addr_copy(dmac_v, mac_v);
211 ether_addr_copy(dmac_c, mac_c);
212 }
213
214 if (match_header & MLX5_MATCH_MISC_PARAMETERS) {
215 mv_misc = MLX5_ADDR_OF(fte_match_param, spec->match_value,
216 misc_parameters);
217 mc_misc = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
218 misc_parameters);
219 MLX5_SET(fte_match_set_misc, mv_misc, source_port, MLX5_VPORT_UPLINK);
220 MLX5_SET_TO_ONES(fte_match_set_misc, mc_misc, source_port);
221 }
222
223 dest.type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
224 dest.vport.num = vport;
225
226 esw_debug(esw->dev,
227 "\tFDB add rule dmac_v(%pM) dmac_c(%pM) -> vport(%d)\n",
228 dmac_v, dmac_c, vport);
229 spec->match_criteria_enable = match_header;
230 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
231 flow_rule =
232 mlx5_add_flow_rules(esw->fdb_table.legacy.fdb, spec,
233 &flow_act, &dest, 1);
234 if (IS_ERR(flow_rule)) {
235 esw_warn(esw->dev,
236 "FDB: Failed to add flow rule: dmac_v(%pM) dmac_c(%pM) -> vport(%d), err(%ld)\n",
237 dmac_v, dmac_c, vport, PTR_ERR(flow_rule));
238 flow_rule = NULL;
239 }
240
241 kvfree(spec);
242 return flow_rule;
243}
244
245static struct mlx5_flow_handle *
246esw_fdb_set_vport_rule(struct mlx5_eswitch *esw, u8 mac[ETH_ALEN], u16 vport)
247{
248 u8 mac_c[ETH_ALEN];
249
250 eth_broadcast_addr(mac_c);
251 return __esw_fdb_set_vport_rule(esw, vport, false, mac_c, mac);
252}
253
254static struct mlx5_flow_handle *
255esw_fdb_set_vport_allmulti_rule(struct mlx5_eswitch *esw, u16 vport)
256{
257 u8 mac_c[ETH_ALEN];
258 u8 mac_v[ETH_ALEN];
259
260 eth_zero_addr(mac_c);
261 eth_zero_addr(mac_v);
262 mac_c[0] = 0x01;
263 mac_v[0] = 0x01;
264 return __esw_fdb_set_vport_rule(esw, vport, false, mac_c, mac_v);
265}
266
267static struct mlx5_flow_handle *
268esw_fdb_set_vport_promisc_rule(struct mlx5_eswitch *esw, u16 vport)
269{
270 u8 mac_c[ETH_ALEN];
271 u8 mac_v[ETH_ALEN];
272
273 eth_zero_addr(mac_c);
274 eth_zero_addr(mac_v);
275 return __esw_fdb_set_vport_rule(esw, vport, true, mac_c, mac_v);
276}
277
278
279typedef int (*vport_addr_action)(struct mlx5_eswitch *esw,
280 struct vport_addr *vaddr);
281
282static int esw_add_uc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
283{
284 u8 *mac = vaddr->node.addr;
285 u16 vport = vaddr->vport;
286 int err;
287
288
289
290
291 if (mlx5_esw_is_manager_vport(esw, vport))
292 goto fdb_add;
293
294 err = mlx5_mpfs_add_mac(esw->dev, mac);
295 if (err) {
296 esw_warn(esw->dev,
297 "Failed to add L2 table mac(%pM) for vport(0x%x), err(%d)\n",
298 mac, vport, err);
299 return err;
300 }
301 vaddr->mpfs = true;
302
303fdb_add:
304
305 if (esw->fdb_table.legacy.fdb && esw->mode == MLX5_ESWITCH_LEGACY)
306 vaddr->flow_rule = esw_fdb_set_vport_rule(esw, mac, vport);
307
308 esw_debug(esw->dev, "\tADDED UC MAC: vport[%d] %pM fr(%p)\n",
309 vport, mac, vaddr->flow_rule);
310
311 return 0;
312}
313
314static int esw_del_uc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
315{
316 u8 *mac = vaddr->node.addr;
317 u16 vport = vaddr->vport;
318 int err = 0;
319
320
321
322
323 if (!vaddr->mpfs || mlx5_esw_is_manager_vport(esw, vport))
324 goto fdb_del;
325
326 err = mlx5_mpfs_del_mac(esw->dev, mac);
327 if (err)
328 esw_warn(esw->dev,
329 "Failed to del L2 table mac(%pM) for vport(%d), err(%d)\n",
330 mac, vport, err);
331 vaddr->mpfs = false;
332
333fdb_del:
334 if (vaddr->flow_rule)
335 mlx5_del_flow_rules(vaddr->flow_rule);
336 vaddr->flow_rule = NULL;
337
338 return 0;
339}
340
341static void update_allmulti_vports(struct mlx5_eswitch *esw,
342 struct vport_addr *vaddr,
343 struct esw_mc_addr *esw_mc)
344{
345 u8 *mac = vaddr->node.addr;
346 struct mlx5_vport *vport;
347 unsigned long i;
348 u16 vport_num;
349
350 mlx5_esw_for_each_vport(esw, i, vport) {
351 struct hlist_head *vport_hash = vport->mc_list;
352 struct vport_addr *iter_vaddr =
353 l2addr_hash_find(vport_hash,
354 mac,
355 struct vport_addr);
356 vport_num = vport->vport;
357 if (IS_ERR_OR_NULL(vport->allmulti_rule) ||
358 vaddr->vport == vport_num)
359 continue;
360 switch (vaddr->action) {
361 case MLX5_ACTION_ADD:
362 if (iter_vaddr)
363 continue;
364 iter_vaddr = l2addr_hash_add(vport_hash, mac,
365 struct vport_addr,
366 GFP_KERNEL);
367 if (!iter_vaddr) {
368 esw_warn(esw->dev,
369 "ALL-MULTI: Failed to add MAC(%pM) to vport[%d] DB\n",
370 mac, vport_num);
371 continue;
372 }
373 iter_vaddr->vport = vport_num;
374 iter_vaddr->flow_rule =
375 esw_fdb_set_vport_rule(esw,
376 mac,
377 vport_num);
378 iter_vaddr->mc_promisc = true;
379 break;
380 case MLX5_ACTION_DEL:
381 if (!iter_vaddr)
382 continue;
383 mlx5_del_flow_rules(iter_vaddr->flow_rule);
384 l2addr_hash_del(iter_vaddr);
385 break;
386 }
387 }
388}
389
390static int esw_add_mc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
391{
392 struct hlist_head *hash = esw->mc_table;
393 struct esw_mc_addr *esw_mc;
394 u8 *mac = vaddr->node.addr;
395 u16 vport = vaddr->vport;
396
397 if (!esw->fdb_table.legacy.fdb)
398 return 0;
399
400 esw_mc = l2addr_hash_find(hash, mac, struct esw_mc_addr);
401 if (esw_mc)
402 goto add;
403
404 esw_mc = l2addr_hash_add(hash, mac, struct esw_mc_addr, GFP_KERNEL);
405 if (!esw_mc)
406 return -ENOMEM;
407
408 esw_mc->uplink_rule =
409 esw_fdb_set_vport_rule(esw, mac, MLX5_VPORT_UPLINK);
410
411
412 update_allmulti_vports(esw, vaddr, esw_mc);
413
414add:
415
416
417
418 if (!vaddr->mc_promisc)
419 esw_mc->refcnt++;
420
421
422 vaddr->flow_rule = esw_fdb_set_vport_rule(esw, mac, vport);
423 esw_debug(esw->dev,
424 "\tADDED MC MAC: vport[%d] %pM fr(%p) refcnt(%d) uplinkfr(%p)\n",
425 vport, mac, vaddr->flow_rule,
426 esw_mc->refcnt, esw_mc->uplink_rule);
427 return 0;
428}
429
430static int esw_del_mc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
431{
432 struct hlist_head *hash = esw->mc_table;
433 struct esw_mc_addr *esw_mc;
434 u8 *mac = vaddr->node.addr;
435 u16 vport = vaddr->vport;
436
437 if (!esw->fdb_table.legacy.fdb)
438 return 0;
439
440 esw_mc = l2addr_hash_find(hash, mac, struct esw_mc_addr);
441 if (!esw_mc) {
442 esw_warn(esw->dev,
443 "Failed to find eswitch MC addr for MAC(%pM) vport(%d)",
444 mac, vport);
445 return -EINVAL;
446 }
447 esw_debug(esw->dev,
448 "\tDELETE MC MAC: vport[%d] %pM fr(%p) refcnt(%d) uplinkfr(%p)\n",
449 vport, mac, vaddr->flow_rule, esw_mc->refcnt,
450 esw_mc->uplink_rule);
451
452 if (vaddr->flow_rule)
453 mlx5_del_flow_rules(vaddr->flow_rule);
454 vaddr->flow_rule = NULL;
455
456
457
458
459 if (vaddr->mc_promisc || (--esw_mc->refcnt > 0))
460 return 0;
461
462
463 update_allmulti_vports(esw, vaddr, esw_mc);
464
465 if (esw_mc->uplink_rule)
466 mlx5_del_flow_rules(esw_mc->uplink_rule);
467
468 l2addr_hash_del(esw_mc);
469 return 0;
470}
471
472
473static void esw_apply_vport_addr_list(struct mlx5_eswitch *esw,
474 struct mlx5_vport *vport, int list_type)
475{
476 bool is_uc = list_type == MLX5_NVPRT_LIST_TYPE_UC;
477 vport_addr_action vport_addr_add;
478 vport_addr_action vport_addr_del;
479 struct vport_addr *addr;
480 struct l2addr_node *node;
481 struct hlist_head *hash;
482 struct hlist_node *tmp;
483 int hi;
484
485 vport_addr_add = is_uc ? esw_add_uc_addr :
486 esw_add_mc_addr;
487 vport_addr_del = is_uc ? esw_del_uc_addr :
488 esw_del_mc_addr;
489
490 hash = is_uc ? vport->uc_list : vport->mc_list;
491 for_each_l2hash_node(node, tmp, hash, hi) {
492 addr = container_of(node, struct vport_addr, node);
493 switch (addr->action) {
494 case MLX5_ACTION_ADD:
495 vport_addr_add(esw, addr);
496 addr->action = MLX5_ACTION_NONE;
497 break;
498 case MLX5_ACTION_DEL:
499 vport_addr_del(esw, addr);
500 l2addr_hash_del(addr);
501 break;
502 }
503 }
504}
505
506
507static void esw_update_vport_addr_list(struct mlx5_eswitch *esw,
508 struct mlx5_vport *vport, int list_type)
509{
510 bool is_uc = list_type == MLX5_NVPRT_LIST_TYPE_UC;
511 u8 (*mac_list)[ETH_ALEN];
512 struct l2addr_node *node;
513 struct vport_addr *addr;
514 struct hlist_head *hash;
515 struct hlist_node *tmp;
516 int size;
517 int err;
518 int hi;
519 int i;
520
521 size = is_uc ? MLX5_MAX_UC_PER_VPORT(esw->dev) :
522 MLX5_MAX_MC_PER_VPORT(esw->dev);
523
524 mac_list = kcalloc(size, ETH_ALEN, GFP_KERNEL);
525 if (!mac_list)
526 return;
527
528 hash = is_uc ? vport->uc_list : vport->mc_list;
529
530 for_each_l2hash_node(node, tmp, hash, hi) {
531 addr = container_of(node, struct vport_addr, node);
532 addr->action = MLX5_ACTION_DEL;
533 }
534
535 if (!vport->enabled)
536 goto out;
537
538 err = mlx5_query_nic_vport_mac_list(esw->dev, vport->vport, list_type,
539 mac_list, &size);
540 if (err)
541 goto out;
542 esw_debug(esw->dev, "vport[%d] context update %s list size (%d)\n",
543 vport->vport, is_uc ? "UC" : "MC", size);
544
545 for (i = 0; i < size; i++) {
546 if (is_uc && !is_valid_ether_addr(mac_list[i]))
547 continue;
548
549 if (!is_uc && !is_multicast_ether_addr(mac_list[i]))
550 continue;
551
552 addr = l2addr_hash_find(hash, mac_list[i], struct vport_addr);
553 if (addr) {
554 addr->action = MLX5_ACTION_NONE;
555
556
557
558
559 if (addr->mc_promisc) {
560 struct esw_mc_addr *esw_mc =
561 l2addr_hash_find(esw->mc_table,
562 mac_list[i],
563 struct esw_mc_addr);
564 if (!esw_mc) {
565 esw_warn(esw->dev,
566 "Failed to MAC(%pM) in mcast DB\n",
567 mac_list[i]);
568 continue;
569 }
570 esw_mc->refcnt++;
571 addr->mc_promisc = false;
572 }
573 continue;
574 }
575
576 addr = l2addr_hash_add(hash, mac_list[i], struct vport_addr,
577 GFP_KERNEL);
578 if (!addr) {
579 esw_warn(esw->dev,
580 "Failed to add MAC(%pM) to vport[%d] DB\n",
581 mac_list[i], vport->vport);
582 continue;
583 }
584 addr->vport = vport->vport;
585 addr->action = MLX5_ACTION_ADD;
586 }
587out:
588 kfree(mac_list);
589}
590
591
592
593
594static void esw_update_vport_mc_promisc(struct mlx5_eswitch *esw,
595 struct mlx5_vport *vport)
596{
597 struct l2addr_node *node;
598 struct vport_addr *addr;
599 struct hlist_head *hash;
600 struct hlist_node *tmp;
601 int hi;
602
603 hash = vport->mc_list;
604
605 for_each_l2hash_node(node, tmp, esw->mc_table, hi) {
606 u8 *mac = node->addr;
607
608 addr = l2addr_hash_find(hash, mac, struct vport_addr);
609 if (addr) {
610 if (addr->action == MLX5_ACTION_DEL)
611 addr->action = MLX5_ACTION_NONE;
612 continue;
613 }
614 addr = l2addr_hash_add(hash, mac, struct vport_addr,
615 GFP_KERNEL);
616 if (!addr) {
617 esw_warn(esw->dev,
618 "Failed to add allmulti MAC(%pM) to vport[%d] DB\n",
619 mac, vport->vport);
620 continue;
621 }
622 addr->vport = vport->vport;
623 addr->action = MLX5_ACTION_ADD;
624 addr->mc_promisc = true;
625 }
626}
627
628
629static void esw_apply_vport_rx_mode(struct mlx5_eswitch *esw,
630 struct mlx5_vport *vport,
631 bool promisc, bool mc_promisc)
632{
633 struct esw_mc_addr *allmulti_addr = &esw->mc_promisc;
634
635 if (IS_ERR_OR_NULL(vport->allmulti_rule) != mc_promisc)
636 goto promisc;
637
638 if (mc_promisc) {
639 vport->allmulti_rule =
640 esw_fdb_set_vport_allmulti_rule(esw, vport->vport);
641 if (!allmulti_addr->uplink_rule)
642 allmulti_addr->uplink_rule =
643 esw_fdb_set_vport_allmulti_rule(esw,
644 MLX5_VPORT_UPLINK);
645 allmulti_addr->refcnt++;
646 } else if (vport->allmulti_rule) {
647 mlx5_del_flow_rules(vport->allmulti_rule);
648 vport->allmulti_rule = NULL;
649
650 if (--allmulti_addr->refcnt > 0)
651 goto promisc;
652
653 if (allmulti_addr->uplink_rule)
654 mlx5_del_flow_rules(allmulti_addr->uplink_rule);
655 allmulti_addr->uplink_rule = NULL;
656 }
657
658promisc:
659 if (IS_ERR_OR_NULL(vport->promisc_rule) != promisc)
660 return;
661
662 if (promisc) {
663 vport->promisc_rule =
664 esw_fdb_set_vport_promisc_rule(esw, vport->vport);
665 } else if (vport->promisc_rule) {
666 mlx5_del_flow_rules(vport->promisc_rule);
667 vport->promisc_rule = NULL;
668 }
669}
670
671
672static void esw_update_vport_rx_mode(struct mlx5_eswitch *esw,
673 struct mlx5_vport *vport)
674{
675 int promisc_all = 0;
676 int promisc_uc = 0;
677 int promisc_mc = 0;
678 int err;
679
680 err = mlx5_query_nic_vport_promisc(esw->dev,
681 vport->vport,
682 &promisc_uc,
683 &promisc_mc,
684 &promisc_all);
685 if (err)
686 return;
687 esw_debug(esw->dev, "vport[%d] context update rx mode promisc_all=%d, all_multi=%d\n",
688 vport->vport, promisc_all, promisc_mc);
689
690 if (!vport->info.trusted || !vport->enabled) {
691 promisc_uc = 0;
692 promisc_mc = 0;
693 promisc_all = 0;
694 }
695
696 esw_apply_vport_rx_mode(esw, vport, promisc_all,
697 (promisc_all || promisc_mc));
698}
699
700void esw_vport_change_handle_locked(struct mlx5_vport *vport)
701{
702 struct mlx5_core_dev *dev = vport->dev;
703 struct mlx5_eswitch *esw = dev->priv.eswitch;
704 u8 mac[ETH_ALEN];
705
706 mlx5_query_nic_vport_mac_address(dev, vport->vport, true, mac);
707 esw_debug(dev, "vport[%d] Context Changed: perm mac: %pM\n",
708 vport->vport, mac);
709
710 if (vport->enabled_events & MLX5_VPORT_UC_ADDR_CHANGE) {
711 esw_update_vport_addr_list(esw, vport, MLX5_NVPRT_LIST_TYPE_UC);
712 esw_apply_vport_addr_list(esw, vport, MLX5_NVPRT_LIST_TYPE_UC);
713 }
714
715 if (vport->enabled_events & MLX5_VPORT_MC_ADDR_CHANGE)
716 esw_update_vport_addr_list(esw, vport, MLX5_NVPRT_LIST_TYPE_MC);
717
718 if (vport->enabled_events & MLX5_VPORT_PROMISC_CHANGE) {
719 esw_update_vport_rx_mode(esw, vport);
720 if (!IS_ERR_OR_NULL(vport->allmulti_rule))
721 esw_update_vport_mc_promisc(esw, vport);
722 }
723
724 if (vport->enabled_events & (MLX5_VPORT_PROMISC_CHANGE | MLX5_VPORT_MC_ADDR_CHANGE))
725 esw_apply_vport_addr_list(esw, vport, MLX5_NVPRT_LIST_TYPE_MC);
726
727 esw_debug(esw->dev, "vport[%d] Context Changed: Done\n", vport->vport);
728 if (vport->enabled)
729 arm_vport_context_events_cmd(dev, vport->vport,
730 vport->enabled_events);
731}
732
733static void esw_vport_change_handler(struct work_struct *work)
734{
735 struct mlx5_vport *vport =
736 container_of(work, struct mlx5_vport, vport_change_handler);
737 struct mlx5_eswitch *esw = vport->dev->priv.eswitch;
738
739 mutex_lock(&esw->state_lock);
740 esw_vport_change_handle_locked(vport);
741 mutex_unlock(&esw->state_lock);
742}
743
744static void node_guid_gen_from_mac(u64 *node_guid, const u8 *mac)
745{
746 ((u8 *)node_guid)[7] = mac[0];
747 ((u8 *)node_guid)[6] = mac[1];
748 ((u8 *)node_guid)[5] = mac[2];
749 ((u8 *)node_guid)[4] = 0xff;
750 ((u8 *)node_guid)[3] = 0xfe;
751 ((u8 *)node_guid)[2] = mac[3];
752 ((u8 *)node_guid)[1] = mac[4];
753 ((u8 *)node_guid)[0] = mac[5];
754}
755
756static int esw_vport_setup_acl(struct mlx5_eswitch *esw,
757 struct mlx5_vport *vport)
758{
759 if (esw->mode == MLX5_ESWITCH_LEGACY)
760 return esw_legacy_vport_acl_setup(esw, vport);
761 else
762 return esw_vport_create_offloads_acl_tables(esw, vport);
763}
764
765static void esw_vport_cleanup_acl(struct mlx5_eswitch *esw,
766 struct mlx5_vport *vport)
767{
768 if (esw->mode == MLX5_ESWITCH_LEGACY)
769 esw_legacy_vport_acl_cleanup(esw, vport);
770 else
771 esw_vport_destroy_offloads_acl_tables(esw, vport);
772}
773
774static int esw_vport_setup(struct mlx5_eswitch *esw, struct mlx5_vport *vport)
775{
776 u16 vport_num = vport->vport;
777 int flags;
778 int err;
779
780 err = esw_vport_setup_acl(esw, vport);
781 if (err)
782 return err;
783
784
785 mlx5_esw_qos_vport_enable(esw, vport, vport->qos.max_rate, vport->qos.bw_share);
786
787 if (mlx5_esw_is_manager_vport(esw, vport_num))
788 return 0;
789
790 mlx5_modify_vport_admin_state(esw->dev,
791 MLX5_VPORT_STATE_OP_MOD_ESW_VPORT,
792 vport_num, 1,
793 vport->info.link_state);
794
795
796 if (vport_num) {
797 mlx5_modify_nic_vport_mac_address(esw->dev, vport_num,
798 vport->info.mac);
799 mlx5_modify_nic_vport_node_guid(esw->dev, vport_num,
800 vport->info.node_guid);
801 }
802
803 flags = (vport->info.vlan || vport->info.qos) ?
804 SET_VLAN_STRIP | SET_VLAN_INSERT : 0;
805 modify_esw_vport_cvlan(esw->dev, vport_num, vport->info.vlan,
806 vport->info.qos, flags);
807
808 return 0;
809}
810
811
812static void esw_vport_cleanup(struct mlx5_eswitch *esw, struct mlx5_vport *vport)
813{
814 u16 vport_num = vport->vport;
815
816 if (!mlx5_esw_is_manager_vport(esw, vport_num))
817 mlx5_modify_vport_admin_state(esw->dev,
818 MLX5_VPORT_STATE_OP_MOD_ESW_VPORT,
819 vport_num, 1,
820 MLX5_VPORT_ADMIN_STATE_DOWN);
821
822 mlx5_esw_qos_vport_disable(esw, vport);
823 esw_vport_cleanup_acl(esw, vport);
824}
825
826int mlx5_esw_vport_enable(struct mlx5_eswitch *esw, u16 vport_num,
827 enum mlx5_eswitch_vport_event enabled_events)
828{
829 struct mlx5_vport *vport;
830 int ret;
831
832 vport = mlx5_eswitch_get_vport(esw, vport_num);
833 if (IS_ERR(vport))
834 return PTR_ERR(vport);
835
836 mutex_lock(&esw->state_lock);
837 WARN_ON(vport->enabled);
838
839 esw_debug(esw->dev, "Enabling VPORT(%d)\n", vport_num);
840
841 ret = esw_vport_setup(esw, vport);
842 if (ret)
843 goto done;
844
845
846 vport->enabled_events = enabled_events;
847 vport->enabled = true;
848
849
850
851
852 if (mlx5_esw_is_manager_vport(esw, vport_num) ||
853 (!vport_num && mlx5_core_is_ecpf(esw->dev)))
854 vport->info.trusted = true;
855
856 if (!mlx5_esw_is_manager_vport(esw, vport->vport) &&
857 MLX5_CAP_GEN(esw->dev, vhca_resource_manager)) {
858 ret = mlx5_esw_vport_vhca_id_set(esw, vport_num);
859 if (ret)
860 goto err_vhca_mapping;
861 }
862
863
864
865
866 if (mlx5_core_is_ecpf(esw->dev) && vport_num == MLX5_VPORT_PF)
867 mlx5_query_nic_vport_mac_address(esw->dev, vport_num, true, vport->info.mac);
868
869 esw_vport_change_handle_locked(vport);
870
871 esw->enabled_vports++;
872 esw_debug(esw->dev, "Enabled VPORT(%d)\n", vport_num);
873done:
874 mutex_unlock(&esw->state_lock);
875 return ret;
876
877err_vhca_mapping:
878 esw_vport_cleanup(esw, vport);
879 mutex_unlock(&esw->state_lock);
880 return ret;
881}
882
883void mlx5_esw_vport_disable(struct mlx5_eswitch *esw, u16 vport_num)
884{
885 struct mlx5_vport *vport;
886
887 vport = mlx5_eswitch_get_vport(esw, vport_num);
888 if (IS_ERR(vport))
889 return;
890
891 mutex_lock(&esw->state_lock);
892 if (!vport->enabled)
893 goto done;
894
895 esw_debug(esw->dev, "Disabling vport(%d)\n", vport_num);
896
897 vport->enabled = false;
898
899
900 arm_vport_context_events_cmd(esw->dev, vport->vport, 0);
901
902 if (!mlx5_esw_is_manager_vport(esw, vport->vport) &&
903 MLX5_CAP_GEN(esw->dev, vhca_resource_manager))
904 mlx5_esw_vport_vhca_id_clear(esw, vport_num);
905
906
907
908
909
910 esw_vport_change_handle_locked(vport);
911 vport->enabled_events = 0;
912 esw_vport_cleanup(esw, vport);
913 esw->enabled_vports--;
914
915done:
916 mutex_unlock(&esw->state_lock);
917}
918
919static int eswitch_vport_event(struct notifier_block *nb,
920 unsigned long type, void *data)
921{
922 struct mlx5_eswitch *esw = mlx5_nb_cof(nb, struct mlx5_eswitch, nb);
923 struct mlx5_eqe *eqe = data;
924 struct mlx5_vport *vport;
925 u16 vport_num;
926
927 vport_num = be16_to_cpu(eqe->data.vport_change.vport_num);
928 vport = mlx5_eswitch_get_vport(esw, vport_num);
929 if (!IS_ERR(vport))
930 queue_work(esw->work_queue, &vport->vport_change_handler);
931 return NOTIFY_OK;
932}
933
934
935
936
937
938
939
940
941
942const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev)
943{
944 int outlen = MLX5_ST_SZ_BYTES(query_esw_functions_out);
945 u32 in[MLX5_ST_SZ_DW(query_esw_functions_in)] = {};
946 u32 *out;
947 int err;
948
949 out = kvzalloc(outlen, GFP_KERNEL);
950 if (!out)
951 return ERR_PTR(-ENOMEM);
952
953 MLX5_SET(query_esw_functions_in, in, opcode,
954 MLX5_CMD_OP_QUERY_ESW_FUNCTIONS);
955
956 err = mlx5_cmd_exec(dev, in, sizeof(in), out, outlen);
957 if (!err)
958 return out;
959
960 kvfree(out);
961 return ERR_PTR(err);
962}
963
964static void mlx5_eswitch_event_handlers_register(struct mlx5_eswitch *esw)
965{
966 MLX5_NB_INIT(&esw->nb, eswitch_vport_event, NIC_VPORT_CHANGE);
967 mlx5_eq_notifier_register(esw->dev, &esw->nb);
968
969 if (esw->mode == MLX5_ESWITCH_OFFLOADS && mlx5_eswitch_is_funcs_handler(esw->dev)) {
970 MLX5_NB_INIT(&esw->esw_funcs.nb, mlx5_esw_funcs_changed_handler,
971 ESW_FUNCTIONS_CHANGED);
972 mlx5_eq_notifier_register(esw->dev, &esw->esw_funcs.nb);
973 }
974}
975
976static void mlx5_eswitch_event_handlers_unregister(struct mlx5_eswitch *esw)
977{
978 if (esw->mode == MLX5_ESWITCH_OFFLOADS && mlx5_eswitch_is_funcs_handler(esw->dev))
979 mlx5_eq_notifier_unregister(esw->dev, &esw->esw_funcs.nb);
980
981 mlx5_eq_notifier_unregister(esw->dev, &esw->nb);
982
983 flush_workqueue(esw->work_queue);
984}
985
986static void mlx5_eswitch_clear_vf_vports_info(struct mlx5_eswitch *esw)
987{
988 struct mlx5_vport *vport;
989 unsigned long i;
990
991 mlx5_esw_for_each_vf_vport(esw, i, vport, esw->esw_funcs.num_vfs) {
992 memset(&vport->qos, 0, sizeof(vport->qos));
993 memset(&vport->info, 0, sizeof(vport->info));
994 vport->info.link_state = MLX5_VPORT_ADMIN_STATE_AUTO;
995 }
996}
997
998
999int mlx5_eswitch_load_vport(struct mlx5_eswitch *esw, u16 vport_num,
1000 enum mlx5_eswitch_vport_event enabled_events)
1001{
1002 int err;
1003
1004 err = mlx5_esw_vport_enable(esw, vport_num, enabled_events);
1005 if (err)
1006 return err;
1007
1008 err = esw_offloads_load_rep(esw, vport_num);
1009 if (err)
1010 goto err_rep;
1011
1012 return err;
1013
1014err_rep:
1015 mlx5_esw_vport_disable(esw, vport_num);
1016 return err;
1017}
1018
1019void mlx5_eswitch_unload_vport(struct mlx5_eswitch *esw, u16 vport_num)
1020{
1021 esw_offloads_unload_rep(esw, vport_num);
1022 mlx5_esw_vport_disable(esw, vport_num);
1023}
1024
1025void mlx5_eswitch_unload_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs)
1026{
1027 struct mlx5_vport *vport;
1028 unsigned long i;
1029
1030 mlx5_esw_for_each_vf_vport(esw, i, vport, num_vfs) {
1031 if (!vport->enabled)
1032 continue;
1033 mlx5_eswitch_unload_vport(esw, vport->vport);
1034 }
1035}
1036
1037int mlx5_eswitch_load_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs,
1038 enum mlx5_eswitch_vport_event enabled_events)
1039{
1040 struct mlx5_vport *vport;
1041 unsigned long i;
1042 int err;
1043
1044 mlx5_esw_for_each_vf_vport(esw, i, vport, num_vfs) {
1045 err = mlx5_eswitch_load_vport(esw, vport->vport, enabled_events);
1046 if (err)
1047 goto vf_err;
1048 }
1049
1050 return 0;
1051
1052vf_err:
1053 mlx5_eswitch_unload_vf_vports(esw, num_vfs);
1054 return err;
1055}
1056
1057static int host_pf_enable_hca(struct mlx5_core_dev *dev)
1058{
1059 if (!mlx5_core_is_ecpf(dev))
1060 return 0;
1061
1062
1063
1064
1065
1066 return mlx5_cmd_host_pf_enable_hca(dev);
1067}
1068
1069static void host_pf_disable_hca(struct mlx5_core_dev *dev)
1070{
1071 if (!mlx5_core_is_ecpf(dev))
1072 return;
1073
1074 mlx5_cmd_host_pf_disable_hca(dev);
1075}
1076
1077
1078
1079
1080int
1081mlx5_eswitch_enable_pf_vf_vports(struct mlx5_eswitch *esw,
1082 enum mlx5_eswitch_vport_event enabled_events)
1083{
1084 int ret;
1085
1086
1087 ret = mlx5_eswitch_load_vport(esw, MLX5_VPORT_PF, enabled_events);
1088 if (ret)
1089 return ret;
1090
1091
1092 ret = host_pf_enable_hca(esw->dev);
1093 if (ret)
1094 goto pf_hca_err;
1095
1096
1097 if (mlx5_ecpf_vport_exists(esw->dev)) {
1098 ret = mlx5_eswitch_load_vport(esw, MLX5_VPORT_ECPF, enabled_events);
1099 if (ret)
1100 goto ecpf_err;
1101 }
1102
1103
1104 ret = mlx5_eswitch_load_vf_vports(esw, esw->esw_funcs.num_vfs,
1105 enabled_events);
1106 if (ret)
1107 goto vf_err;
1108 return 0;
1109
1110vf_err:
1111 if (mlx5_ecpf_vport_exists(esw->dev))
1112 mlx5_eswitch_unload_vport(esw, MLX5_VPORT_ECPF);
1113ecpf_err:
1114 host_pf_disable_hca(esw->dev);
1115pf_hca_err:
1116 mlx5_eswitch_unload_vport(esw, MLX5_VPORT_PF);
1117 return ret;
1118}
1119
1120
1121
1122
1123void mlx5_eswitch_disable_pf_vf_vports(struct mlx5_eswitch *esw)
1124{
1125 mlx5_eswitch_unload_vf_vports(esw, esw->esw_funcs.num_vfs);
1126
1127 if (mlx5_ecpf_vport_exists(esw->dev))
1128 mlx5_eswitch_unload_vport(esw, MLX5_VPORT_ECPF);
1129
1130 host_pf_disable_hca(esw->dev);
1131 mlx5_eswitch_unload_vport(esw, MLX5_VPORT_PF);
1132}
1133
1134static void mlx5_eswitch_get_devlink_param(struct mlx5_eswitch *esw)
1135{
1136 struct devlink *devlink = priv_to_devlink(esw->dev);
1137 union devlink_param_value val;
1138 int err;
1139
1140 err = devlink_param_driverinit_value_get(devlink,
1141 MLX5_DEVLINK_PARAM_ID_ESW_LARGE_GROUP_NUM,
1142 &val);
1143 if (!err) {
1144 esw->params.large_group_num = val.vu32;
1145 } else {
1146 esw_warn(esw->dev,
1147 "Devlink can't get param fdb_large_groups, uses default (%d).\n",
1148 ESW_OFFLOADS_DEFAULT_NUM_GROUPS);
1149 esw->params.large_group_num = ESW_OFFLOADS_DEFAULT_NUM_GROUPS;
1150 }
1151}
1152
1153static void
1154mlx5_eswitch_update_num_of_vfs(struct mlx5_eswitch *esw, int num_vfs)
1155{
1156 const u32 *out;
1157
1158 WARN_ON_ONCE(esw->mode != MLX5_ESWITCH_NONE);
1159
1160 if (num_vfs < 0)
1161 return;
1162
1163 if (!mlx5_core_is_ecpf_esw_manager(esw->dev)) {
1164 esw->esw_funcs.num_vfs = num_vfs;
1165 return;
1166 }
1167
1168 out = mlx5_esw_query_functions(esw->dev);
1169 if (IS_ERR(out))
1170 return;
1171
1172 esw->esw_funcs.num_vfs = MLX5_GET(query_esw_functions_out, out,
1173 host_params_context.host_num_of_vfs);
1174 kvfree(out);
1175}
1176
1177static void mlx5_esw_mode_change_notify(struct mlx5_eswitch *esw, u16 mode)
1178{
1179 struct mlx5_esw_event_info info = {};
1180
1181 info.new_mode = mode;
1182
1183 blocking_notifier_call_chain(&esw->n_head, 0, &info);
1184}
1185
1186static int mlx5_esw_acls_ns_init(struct mlx5_eswitch *esw)
1187{
1188 struct mlx5_core_dev *dev = esw->dev;
1189 int total_vports;
1190 int err;
1191
1192 total_vports = mlx5_eswitch_get_total_vports(dev);
1193
1194 if (MLX5_CAP_ESW_EGRESS_ACL(dev, ft_support)) {
1195 err = mlx5_fs_egress_acls_init(dev, total_vports);
1196 if (err)
1197 return err;
1198 } else {
1199 esw_warn(dev, "engress ACL is not supported by FW\n");
1200 }
1201
1202 if (MLX5_CAP_ESW_INGRESS_ACL(dev, ft_support)) {
1203 err = mlx5_fs_ingress_acls_init(dev, total_vports);
1204 if (err)
1205 goto err;
1206 } else {
1207 esw_warn(dev, "ingress ACL is not supported by FW\n");
1208 }
1209 return 0;
1210
1211err:
1212 if (MLX5_CAP_ESW_EGRESS_ACL(dev, ft_support))
1213 mlx5_fs_egress_acls_cleanup(dev);
1214 return err;
1215}
1216
1217static void mlx5_esw_acls_ns_cleanup(struct mlx5_eswitch *esw)
1218{
1219 struct mlx5_core_dev *dev = esw->dev;
1220
1221 if (MLX5_CAP_ESW_INGRESS_ACL(dev, ft_support))
1222 mlx5_fs_ingress_acls_cleanup(dev);
1223 if (MLX5_CAP_ESW_EGRESS_ACL(dev, ft_support))
1224 mlx5_fs_egress_acls_cleanup(dev);
1225}
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244int mlx5_eswitch_enable_locked(struct mlx5_eswitch *esw, int mode, int num_vfs)
1245{
1246 int err;
1247
1248 lockdep_assert_held(&esw->mode_lock);
1249
1250 if (!MLX5_CAP_ESW_FLOWTABLE_FDB(esw->dev, ft_support)) {
1251 esw_warn(esw->dev, "FDB is not supported, aborting ...\n");
1252 return -EOPNOTSUPP;
1253 }
1254
1255 mlx5_eswitch_get_devlink_param(esw);
1256
1257 err = mlx5_esw_acls_ns_init(esw);
1258 if (err)
1259 return err;
1260
1261 mlx5_eswitch_update_num_of_vfs(esw, num_vfs);
1262
1263 mlx5_esw_qos_create(esw);
1264
1265 esw->mode = mode;
1266
1267 if (mode == MLX5_ESWITCH_LEGACY) {
1268 err = esw_legacy_enable(esw);
1269 } else {
1270 mlx5_rescan_drivers(esw->dev);
1271 err = esw_offloads_enable(esw);
1272 }
1273
1274 if (err)
1275 goto abort;
1276
1277 mlx5_eswitch_event_handlers_register(esw);
1278
1279 esw_info(esw->dev, "Enable: mode(%s), nvfs(%d), active vports(%d)\n",
1280 mode == MLX5_ESWITCH_LEGACY ? "LEGACY" : "OFFLOADS",
1281 esw->esw_funcs.num_vfs, esw->enabled_vports);
1282
1283 mlx5_esw_mode_change_notify(esw, mode);
1284
1285 return 0;
1286
1287abort:
1288 esw->mode = MLX5_ESWITCH_NONE;
1289
1290 if (mode == MLX5_ESWITCH_OFFLOADS)
1291 mlx5_rescan_drivers(esw->dev);
1292
1293 mlx5_esw_qos_destroy(esw);
1294 mlx5_esw_acls_ns_cleanup(esw);
1295 return err;
1296}
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs)
1307{
1308 int ret;
1309
1310 if (!mlx5_esw_allowed(esw))
1311 return 0;
1312
1313 mlx5_lag_disable_change(esw->dev);
1314 down_write(&esw->mode_lock);
1315 if (esw->mode == MLX5_ESWITCH_NONE) {
1316 ret = mlx5_eswitch_enable_locked(esw, MLX5_ESWITCH_LEGACY, num_vfs);
1317 } else {
1318 enum mlx5_eswitch_vport_event vport_events;
1319
1320 vport_events = (esw->mode == MLX5_ESWITCH_LEGACY) ?
1321 MLX5_LEGACY_SRIOV_VPORT_EVENTS : MLX5_VPORT_UC_ADDR_CHANGE;
1322 ret = mlx5_eswitch_load_vf_vports(esw, num_vfs, vport_events);
1323 if (!ret)
1324 esw->esw_funcs.num_vfs = num_vfs;
1325 }
1326 up_write(&esw->mode_lock);
1327 mlx5_lag_enable_change(esw->dev);
1328 return ret;
1329}
1330
1331void mlx5_eswitch_disable_locked(struct mlx5_eswitch *esw, bool clear_vf)
1332{
1333 int old_mode;
1334
1335 lockdep_assert_held_write(&esw->mode_lock);
1336
1337 if (esw->mode == MLX5_ESWITCH_NONE)
1338 return;
1339
1340 esw_info(esw->dev, "Disable: mode(%s), nvfs(%d), active vports(%d)\n",
1341 esw->mode == MLX5_ESWITCH_LEGACY ? "LEGACY" : "OFFLOADS",
1342 esw->esw_funcs.num_vfs, esw->enabled_vports);
1343
1344
1345
1346
1347 mlx5_esw_mode_change_notify(esw, MLX5_ESWITCH_NONE);
1348
1349 mlx5_eswitch_event_handlers_unregister(esw);
1350
1351 if (esw->mode == MLX5_ESWITCH_LEGACY)
1352 esw_legacy_disable(esw);
1353 else if (esw->mode == MLX5_ESWITCH_OFFLOADS)
1354 esw_offloads_disable(esw);
1355
1356 old_mode = esw->mode;
1357 esw->mode = MLX5_ESWITCH_NONE;
1358
1359 if (old_mode == MLX5_ESWITCH_OFFLOADS)
1360 mlx5_rescan_drivers(esw->dev);
1361
1362 mlx5_esw_qos_destroy(esw);
1363 mlx5_esw_acls_ns_cleanup(esw);
1364
1365 if (clear_vf)
1366 mlx5_eswitch_clear_vf_vports_info(esw);
1367}
1368
1369void mlx5_eswitch_disable(struct mlx5_eswitch *esw, bool clear_vf)
1370{
1371 if (!mlx5_esw_allowed(esw))
1372 return;
1373
1374 mlx5_lag_disable_change(esw->dev);
1375 down_write(&esw->mode_lock);
1376 mlx5_eswitch_disable_locked(esw, clear_vf);
1377 esw->esw_funcs.num_vfs = 0;
1378 up_write(&esw->mode_lock);
1379 mlx5_lag_enable_change(esw->dev);
1380}
1381
1382static int mlx5_query_hca_cap_host_pf(struct mlx5_core_dev *dev, void *out)
1383{
1384 u16 opmod = (MLX5_CAP_GENERAL << 1) | (HCA_CAP_OPMOD_GET_MAX & 0x01);
1385 u8 in[MLX5_ST_SZ_BYTES(query_hca_cap_in)] = {};
1386
1387 MLX5_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP);
1388 MLX5_SET(query_hca_cap_in, in, op_mod, opmod);
1389 MLX5_SET(query_hca_cap_in, in, function_id, MLX5_VPORT_PF);
1390 MLX5_SET(query_hca_cap_in, in, other_function, true);
1391 return mlx5_cmd_exec_inout(dev, query_hca_cap, in, out);
1392}
1393
1394int mlx5_esw_sf_max_hpf_functions(struct mlx5_core_dev *dev, u16 *max_sfs, u16 *sf_base_id)
1395
1396{
1397 int query_out_sz = MLX5_ST_SZ_BYTES(query_hca_cap_out);
1398 void *query_ctx;
1399 void *hca_caps;
1400 int err;
1401
1402 if (!mlx5_core_is_ecpf(dev)) {
1403 *max_sfs = 0;
1404 return 0;
1405 }
1406
1407 query_ctx = kzalloc(query_out_sz, GFP_KERNEL);
1408 if (!query_ctx)
1409 return -ENOMEM;
1410
1411 err = mlx5_query_hca_cap_host_pf(dev, query_ctx);
1412 if (err)
1413 goto out_free;
1414
1415 hca_caps = MLX5_ADDR_OF(query_hca_cap_out, query_ctx, capability);
1416 *max_sfs = MLX5_GET(cmd_hca_cap, hca_caps, max_num_sf);
1417 *sf_base_id = MLX5_GET(cmd_hca_cap, hca_caps, sf_base_id);
1418
1419out_free:
1420 kfree(query_ctx);
1421 return err;
1422}
1423
1424static int mlx5_esw_vport_alloc(struct mlx5_eswitch *esw, struct mlx5_core_dev *dev,
1425 int index, u16 vport_num)
1426{
1427 struct mlx5_vport *vport;
1428 int err;
1429
1430 vport = kzalloc(sizeof(*vport), GFP_KERNEL);
1431 if (!vport)
1432 return -ENOMEM;
1433
1434 vport->dev = esw->dev;
1435 vport->vport = vport_num;
1436 vport->index = index;
1437 vport->info.link_state = MLX5_VPORT_ADMIN_STATE_AUTO;
1438 INIT_WORK(&vport->vport_change_handler, esw_vport_change_handler);
1439 err = xa_insert(&esw->vports, vport_num, vport, GFP_KERNEL);
1440 if (err)
1441 goto insert_err;
1442
1443 esw->total_vports++;
1444 return 0;
1445
1446insert_err:
1447 kfree(vport);
1448 return err;
1449}
1450
1451static void mlx5_esw_vport_free(struct mlx5_eswitch *esw, struct mlx5_vport *vport)
1452{
1453 xa_erase(&esw->vports, vport->vport);
1454 kfree(vport);
1455}
1456
1457static void mlx5_esw_vports_cleanup(struct mlx5_eswitch *esw)
1458{
1459 struct mlx5_vport *vport;
1460 unsigned long i;
1461
1462 mlx5_esw_for_each_vport(esw, i, vport)
1463 mlx5_esw_vport_free(esw, vport);
1464 xa_destroy(&esw->vports);
1465}
1466
1467static int mlx5_esw_vports_init(struct mlx5_eswitch *esw)
1468{
1469 struct mlx5_core_dev *dev = esw->dev;
1470 u16 max_host_pf_sfs;
1471 u16 base_sf_num;
1472 int idx = 0;
1473 int err;
1474 int i;
1475
1476 xa_init(&esw->vports);
1477
1478 err = mlx5_esw_vport_alloc(esw, dev, idx, MLX5_VPORT_PF);
1479 if (err)
1480 goto err;
1481 if (esw->first_host_vport == MLX5_VPORT_PF)
1482 xa_set_mark(&esw->vports, idx, MLX5_ESW_VPT_HOST_FN);
1483 idx++;
1484
1485 for (i = 0; i < mlx5_core_max_vfs(dev); i++) {
1486 err = mlx5_esw_vport_alloc(esw, dev, idx, idx);
1487 if (err)
1488 goto err;
1489 xa_set_mark(&esw->vports, idx, MLX5_ESW_VPT_VF);
1490 xa_set_mark(&esw->vports, idx, MLX5_ESW_VPT_HOST_FN);
1491 idx++;
1492 }
1493 base_sf_num = mlx5_sf_start_function_id(dev);
1494 for (i = 0; i < mlx5_sf_max_functions(dev); i++) {
1495 err = mlx5_esw_vport_alloc(esw, dev, idx, base_sf_num + i);
1496 if (err)
1497 goto err;
1498 xa_set_mark(&esw->vports, base_sf_num + i, MLX5_ESW_VPT_SF);
1499 idx++;
1500 }
1501
1502 err = mlx5_esw_sf_max_hpf_functions(dev, &max_host_pf_sfs, &base_sf_num);
1503 if (err)
1504 goto err;
1505 for (i = 0; i < max_host_pf_sfs; i++) {
1506 err = mlx5_esw_vport_alloc(esw, dev, idx, base_sf_num + i);
1507 if (err)
1508 goto err;
1509 xa_set_mark(&esw->vports, base_sf_num + i, MLX5_ESW_VPT_SF);
1510 idx++;
1511 }
1512
1513 if (mlx5_ecpf_vport_exists(dev)) {
1514 err = mlx5_esw_vport_alloc(esw, dev, idx, MLX5_VPORT_ECPF);
1515 if (err)
1516 goto err;
1517 idx++;
1518 }
1519 err = mlx5_esw_vport_alloc(esw, dev, idx, MLX5_VPORT_UPLINK);
1520 if (err)
1521 goto err;
1522 return 0;
1523
1524err:
1525 mlx5_esw_vports_cleanup(esw);
1526 return err;
1527}
1528
1529int mlx5_eswitch_init(struct mlx5_core_dev *dev)
1530{
1531 struct mlx5_eswitch *esw;
1532 int err;
1533
1534 if (!MLX5_VPORT_MANAGER(dev))
1535 return 0;
1536
1537 esw = kzalloc(sizeof(*esw), GFP_KERNEL);
1538 if (!esw)
1539 return -ENOMEM;
1540
1541 esw->dev = dev;
1542 esw->manager_vport = mlx5_eswitch_manager_vport(dev);
1543 esw->first_host_vport = mlx5_eswitch_first_host_vport_num(dev);
1544
1545 esw->work_queue = create_singlethread_workqueue("mlx5_esw_wq");
1546 if (!esw->work_queue) {
1547 err = -ENOMEM;
1548 goto abort;
1549 }
1550
1551 err = mlx5_esw_vports_init(esw);
1552 if (err)
1553 goto abort;
1554
1555 err = esw_offloads_init_reps(esw);
1556 if (err)
1557 goto reps_err;
1558
1559 mutex_init(&esw->offloads.encap_tbl_lock);
1560 hash_init(esw->offloads.encap_tbl);
1561 mutex_init(&esw->offloads.decap_tbl_lock);
1562 hash_init(esw->offloads.decap_tbl);
1563 mlx5e_mod_hdr_tbl_init(&esw->offloads.mod_hdr);
1564 atomic64_set(&esw->offloads.num_flows, 0);
1565 ida_init(&esw->offloads.vport_metadata_ida);
1566 xa_init_flags(&esw->offloads.vhca_map, XA_FLAGS_ALLOC);
1567 mutex_init(&esw->state_lock);
1568 lockdep_register_key(&esw->mode_lock_key);
1569 init_rwsem(&esw->mode_lock);
1570 lockdep_set_class(&esw->mode_lock, &esw->mode_lock_key);
1571
1572 esw->enabled_vports = 0;
1573 esw->mode = MLX5_ESWITCH_NONE;
1574 esw->offloads.inline_mode = MLX5_INLINE_MODE_NONE;
1575
1576 dev->priv.eswitch = esw;
1577 BLOCKING_INIT_NOTIFIER_HEAD(&esw->n_head);
1578
1579 esw_info(dev,
1580 "Total vports %d, per vport: max uc(%d) max mc(%d)\n",
1581 esw->total_vports,
1582 MLX5_MAX_UC_PER_VPORT(dev),
1583 MLX5_MAX_MC_PER_VPORT(dev));
1584 return 0;
1585
1586reps_err:
1587 mlx5_esw_vports_cleanup(esw);
1588abort:
1589 if (esw->work_queue)
1590 destroy_workqueue(esw->work_queue);
1591 kfree(esw);
1592 return err;
1593}
1594
1595void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw)
1596{
1597 if (!esw || !MLX5_VPORT_MANAGER(esw->dev))
1598 return;
1599
1600 esw_info(esw->dev, "cleanup\n");
1601
1602 esw->dev->priv.eswitch = NULL;
1603 destroy_workqueue(esw->work_queue);
1604 lockdep_unregister_key(&esw->mode_lock_key);
1605 mutex_destroy(&esw->state_lock);
1606 WARN_ON(!xa_empty(&esw->offloads.vhca_map));
1607 xa_destroy(&esw->offloads.vhca_map);
1608 ida_destroy(&esw->offloads.vport_metadata_ida);
1609 mlx5e_mod_hdr_tbl_destroy(&esw->offloads.mod_hdr);
1610 mutex_destroy(&esw->offloads.encap_tbl_lock);
1611 mutex_destroy(&esw->offloads.decap_tbl_lock);
1612 esw_offloads_cleanup_reps(esw);
1613 mlx5_esw_vports_cleanup(esw);
1614 kfree(esw);
1615}
1616
1617
1618static int
1619mlx5_esw_set_vport_mac_locked(struct mlx5_eswitch *esw,
1620 struct mlx5_vport *evport, const u8 *mac)
1621{
1622 u16 vport_num = evport->vport;
1623 u64 node_guid;
1624 int err = 0;
1625
1626 if (is_multicast_ether_addr(mac))
1627 return -EINVAL;
1628
1629 if (evport->info.spoofchk && !is_valid_ether_addr(mac))
1630 mlx5_core_warn(esw->dev,
1631 "Set invalid MAC while spoofchk is on, vport(%d)\n",
1632 vport_num);
1633
1634 err = mlx5_modify_nic_vport_mac_address(esw->dev, vport_num, mac);
1635 if (err) {
1636 mlx5_core_warn(esw->dev,
1637 "Failed to mlx5_modify_nic_vport_mac vport(%d) err=(%d)\n",
1638 vport_num, err);
1639 return err;
1640 }
1641
1642 node_guid_gen_from_mac(&node_guid, mac);
1643 err = mlx5_modify_nic_vport_node_guid(esw->dev, vport_num, node_guid);
1644 if (err)
1645 mlx5_core_warn(esw->dev,
1646 "Failed to set vport %d node guid, err = %d. RDMA_CM will not function properly for this VF.\n",
1647 vport_num, err);
1648
1649 ether_addr_copy(evport->info.mac, mac);
1650 evport->info.node_guid = node_guid;
1651 if (evport->enabled && esw->mode == MLX5_ESWITCH_LEGACY)
1652 err = esw_acl_ingress_lgcy_setup(esw, evport);
1653
1654 return err;
1655}
1656
1657int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
1658 u16 vport, const u8 *mac)
1659{
1660 struct mlx5_vport *evport = mlx5_eswitch_get_vport(esw, vport);
1661 int err = 0;
1662
1663 if (IS_ERR(evport))
1664 return PTR_ERR(evport);
1665
1666 mutex_lock(&esw->state_lock);
1667 err = mlx5_esw_set_vport_mac_locked(esw, evport, mac);
1668 mutex_unlock(&esw->state_lock);
1669 return err;
1670}
1671
1672static bool mlx5_esw_check_port_type(struct mlx5_eswitch *esw, u16 vport_num, xa_mark_t mark)
1673{
1674 struct mlx5_vport *vport;
1675
1676 vport = mlx5_eswitch_get_vport(esw, vport_num);
1677 if (IS_ERR(vport))
1678 return false;
1679
1680 return xa_get_mark(&esw->vports, vport_num, mark);
1681}
1682
1683bool mlx5_eswitch_is_vf_vport(struct mlx5_eswitch *esw, u16 vport_num)
1684{
1685 return mlx5_esw_check_port_type(esw, vport_num, MLX5_ESW_VPT_VF);
1686}
1687
1688bool mlx5_esw_is_sf_vport(struct mlx5_eswitch *esw, u16 vport_num)
1689{
1690 return mlx5_esw_check_port_type(esw, vport_num, MLX5_ESW_VPT_SF);
1691}
1692
1693static bool
1694is_port_function_supported(struct mlx5_eswitch *esw, u16 vport_num)
1695{
1696 return vport_num == MLX5_VPORT_PF ||
1697 mlx5_eswitch_is_vf_vport(esw, vport_num) ||
1698 mlx5_esw_is_sf_vport(esw, vport_num);
1699}
1700
1701int mlx5_devlink_port_function_hw_addr_get(struct devlink_port *port,
1702 u8 *hw_addr, int *hw_addr_len,
1703 struct netlink_ext_ack *extack)
1704{
1705 struct mlx5_eswitch *esw;
1706 struct mlx5_vport *vport;
1707 int err = -EOPNOTSUPP;
1708 u16 vport_num;
1709
1710 esw = mlx5_devlink_eswitch_get(port->devlink);
1711 if (IS_ERR(esw))
1712 return PTR_ERR(esw);
1713
1714 vport_num = mlx5_esw_devlink_port_index_to_vport_num(port->index);
1715 if (!is_port_function_supported(esw, vport_num))
1716 return -EOPNOTSUPP;
1717
1718 vport = mlx5_eswitch_get_vport(esw, vport_num);
1719 if (IS_ERR(vport)) {
1720 NL_SET_ERR_MSG_MOD(extack, "Invalid port");
1721 return PTR_ERR(vport);
1722 }
1723
1724 mutex_lock(&esw->state_lock);
1725 if (vport->enabled) {
1726 ether_addr_copy(hw_addr, vport->info.mac);
1727 *hw_addr_len = ETH_ALEN;
1728 err = 0;
1729 }
1730 mutex_unlock(&esw->state_lock);
1731 return err;
1732}
1733
1734int mlx5_devlink_port_function_hw_addr_set(struct devlink_port *port,
1735 const u8 *hw_addr, int hw_addr_len,
1736 struct netlink_ext_ack *extack)
1737{
1738 struct mlx5_eswitch *esw;
1739 struct mlx5_vport *vport;
1740 int err = -EOPNOTSUPP;
1741 u16 vport_num;
1742
1743 esw = mlx5_devlink_eswitch_get(port->devlink);
1744 if (IS_ERR(esw)) {
1745 NL_SET_ERR_MSG_MOD(extack, "Eswitch doesn't support set hw_addr");
1746 return PTR_ERR(esw);
1747 }
1748
1749 vport_num = mlx5_esw_devlink_port_index_to_vport_num(port->index);
1750 if (!is_port_function_supported(esw, vport_num)) {
1751 NL_SET_ERR_MSG_MOD(extack, "Port doesn't support set hw_addr");
1752 return -EINVAL;
1753 }
1754 vport = mlx5_eswitch_get_vport(esw, vport_num);
1755 if (IS_ERR(vport)) {
1756 NL_SET_ERR_MSG_MOD(extack, "Invalid port");
1757 return PTR_ERR(vport);
1758 }
1759
1760 mutex_lock(&esw->state_lock);
1761 if (vport->enabled)
1762 err = mlx5_esw_set_vport_mac_locked(esw, vport, hw_addr);
1763 else
1764 NL_SET_ERR_MSG_MOD(extack, "Eswitch vport is disabled");
1765 mutex_unlock(&esw->state_lock);
1766 return err;
1767}
1768
1769int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
1770 u16 vport, int link_state)
1771{
1772 struct mlx5_vport *evport = mlx5_eswitch_get_vport(esw, vport);
1773 int opmod = MLX5_VPORT_STATE_OP_MOD_ESW_VPORT;
1774 int other_vport = 1;
1775 int err = 0;
1776
1777 if (!mlx5_esw_allowed(esw))
1778 return -EPERM;
1779 if (IS_ERR(evport))
1780 return PTR_ERR(evport);
1781
1782 if (vport == MLX5_VPORT_UPLINK) {
1783 opmod = MLX5_VPORT_STATE_OP_MOD_UPLINK;
1784 other_vport = 0;
1785 vport = 0;
1786 }
1787 mutex_lock(&esw->state_lock);
1788 if (esw->mode != MLX5_ESWITCH_LEGACY) {
1789 err = -EOPNOTSUPP;
1790 goto unlock;
1791 }
1792
1793 err = mlx5_modify_vport_admin_state(esw->dev, opmod, vport, other_vport, link_state);
1794 if (err) {
1795 mlx5_core_warn(esw->dev, "Failed to set vport %d link state, opmod = %d, err = %d",
1796 vport, opmod, err);
1797 goto unlock;
1798 }
1799
1800 evport->info.link_state = link_state;
1801
1802unlock:
1803 mutex_unlock(&esw->state_lock);
1804 return err;
1805}
1806
1807int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
1808 u16 vport, struct ifla_vf_info *ivi)
1809{
1810 struct mlx5_vport *evport = mlx5_eswitch_get_vport(esw, vport);
1811
1812 if (IS_ERR(evport))
1813 return PTR_ERR(evport);
1814
1815 memset(ivi, 0, sizeof(*ivi));
1816 ivi->vf = vport - 1;
1817
1818 mutex_lock(&esw->state_lock);
1819 ether_addr_copy(ivi->mac, evport->info.mac);
1820 ivi->linkstate = evport->info.link_state;
1821 ivi->vlan = evport->info.vlan;
1822 ivi->qos = evport->info.qos;
1823 ivi->spoofchk = evport->info.spoofchk;
1824 ivi->trusted = evport->info.trusted;
1825 ivi->min_tx_rate = evport->qos.min_rate;
1826 ivi->max_tx_rate = evport->qos.max_rate;
1827 mutex_unlock(&esw->state_lock);
1828
1829 return 0;
1830}
1831
1832int __mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
1833 u16 vport, u16 vlan, u8 qos, u8 set_flags)
1834{
1835 struct mlx5_vport *evport = mlx5_eswitch_get_vport(esw, vport);
1836 int err = 0;
1837
1838 if (IS_ERR(evport))
1839 return PTR_ERR(evport);
1840 if (vlan > 4095 || qos > 7)
1841 return -EINVAL;
1842
1843 err = modify_esw_vport_cvlan(esw->dev, vport, vlan, qos, set_flags);
1844 if (err)
1845 return err;
1846
1847 evport->info.vlan = vlan;
1848 evport->info.qos = qos;
1849 if (evport->enabled && esw->mode == MLX5_ESWITCH_LEGACY) {
1850 err = esw_acl_ingress_lgcy_setup(esw, evport);
1851 if (err)
1852 return err;
1853 err = esw_acl_egress_lgcy_setup(esw, evport);
1854 }
1855
1856 return err;
1857}
1858
1859int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
1860 u16 vport_num,
1861 struct ifla_vf_stats *vf_stats)
1862{
1863 struct mlx5_vport *vport = mlx5_eswitch_get_vport(esw, vport_num);
1864 int outlen = MLX5_ST_SZ_BYTES(query_vport_counter_out);
1865 u32 in[MLX5_ST_SZ_DW(query_vport_counter_in)] = {};
1866 struct mlx5_vport_drop_stats stats = {};
1867 int err = 0;
1868 u32 *out;
1869
1870 if (IS_ERR(vport))
1871 return PTR_ERR(vport);
1872
1873 out = kvzalloc(outlen, GFP_KERNEL);
1874 if (!out)
1875 return -ENOMEM;
1876
1877 MLX5_SET(query_vport_counter_in, in, opcode,
1878 MLX5_CMD_OP_QUERY_VPORT_COUNTER);
1879 MLX5_SET(query_vport_counter_in, in, op_mod, 0);
1880 MLX5_SET(query_vport_counter_in, in, vport_number, vport->vport);
1881 MLX5_SET(query_vport_counter_in, in, other_vport, 1);
1882
1883 err = mlx5_cmd_exec_inout(esw->dev, query_vport_counter, in, out);
1884 if (err)
1885 goto free_out;
1886
1887 #define MLX5_GET_CTR(p, x) \
1888 MLX5_GET64(query_vport_counter_out, p, x)
1889
1890 memset(vf_stats, 0, sizeof(*vf_stats));
1891 vf_stats->rx_packets =
1892 MLX5_GET_CTR(out, received_eth_unicast.packets) +
1893 MLX5_GET_CTR(out, received_ib_unicast.packets) +
1894 MLX5_GET_CTR(out, received_eth_multicast.packets) +
1895 MLX5_GET_CTR(out, received_ib_multicast.packets) +
1896 MLX5_GET_CTR(out, received_eth_broadcast.packets);
1897
1898 vf_stats->rx_bytes =
1899 MLX5_GET_CTR(out, received_eth_unicast.octets) +
1900 MLX5_GET_CTR(out, received_ib_unicast.octets) +
1901 MLX5_GET_CTR(out, received_eth_multicast.octets) +
1902 MLX5_GET_CTR(out, received_ib_multicast.octets) +
1903 MLX5_GET_CTR(out, received_eth_broadcast.octets);
1904
1905 vf_stats->tx_packets =
1906 MLX5_GET_CTR(out, transmitted_eth_unicast.packets) +
1907 MLX5_GET_CTR(out, transmitted_ib_unicast.packets) +
1908 MLX5_GET_CTR(out, transmitted_eth_multicast.packets) +
1909 MLX5_GET_CTR(out, transmitted_ib_multicast.packets) +
1910 MLX5_GET_CTR(out, transmitted_eth_broadcast.packets);
1911
1912 vf_stats->tx_bytes =
1913 MLX5_GET_CTR(out, transmitted_eth_unicast.octets) +
1914 MLX5_GET_CTR(out, transmitted_ib_unicast.octets) +
1915 MLX5_GET_CTR(out, transmitted_eth_multicast.octets) +
1916 MLX5_GET_CTR(out, transmitted_ib_multicast.octets) +
1917 MLX5_GET_CTR(out, transmitted_eth_broadcast.octets);
1918
1919 vf_stats->multicast =
1920 MLX5_GET_CTR(out, received_eth_multicast.packets) +
1921 MLX5_GET_CTR(out, received_ib_multicast.packets);
1922
1923 vf_stats->broadcast =
1924 MLX5_GET_CTR(out, received_eth_broadcast.packets);
1925
1926 err = mlx5_esw_query_vport_drop_stats(esw->dev, vport, &stats);
1927 if (err)
1928 goto free_out;
1929 vf_stats->rx_dropped = stats.rx_dropped;
1930 vf_stats->tx_dropped = stats.tx_dropped;
1931
1932free_out:
1933 kvfree(out);
1934 return err;
1935}
1936
1937u8 mlx5_eswitch_mode(struct mlx5_core_dev *dev)
1938{
1939 struct mlx5_eswitch *esw = dev->priv.eswitch;
1940
1941 return mlx5_esw_allowed(esw) ? esw->mode : MLX5_ESWITCH_NONE;
1942}
1943EXPORT_SYMBOL_GPL(mlx5_eswitch_mode);
1944
1945enum devlink_eswitch_encap_mode
1946mlx5_eswitch_get_encap_mode(const struct mlx5_core_dev *dev)
1947{
1948 struct mlx5_eswitch *esw;
1949
1950 esw = dev->priv.eswitch;
1951 return mlx5_esw_allowed(esw) ? esw->offloads.encap :
1952 DEVLINK_ESWITCH_ENCAP_MODE_NONE;
1953}
1954EXPORT_SYMBOL(mlx5_eswitch_get_encap_mode);
1955
1956bool mlx5_esw_lag_prereq(struct mlx5_core_dev *dev0, struct mlx5_core_dev *dev1)
1957{
1958 if ((dev0->priv.eswitch->mode == MLX5_ESWITCH_NONE &&
1959 dev1->priv.eswitch->mode == MLX5_ESWITCH_NONE) ||
1960 (dev0->priv.eswitch->mode == MLX5_ESWITCH_OFFLOADS &&
1961 dev1->priv.eswitch->mode == MLX5_ESWITCH_OFFLOADS))
1962 return true;
1963
1964 return false;
1965}
1966
1967bool mlx5_esw_multipath_prereq(struct mlx5_core_dev *dev0,
1968 struct mlx5_core_dev *dev1)
1969{
1970 return (dev0->priv.eswitch->mode == MLX5_ESWITCH_OFFLOADS &&
1971 dev1->priv.eswitch->mode == MLX5_ESWITCH_OFFLOADS);
1972}
1973
1974int mlx5_esw_event_notifier_register(struct mlx5_eswitch *esw, struct notifier_block *nb)
1975{
1976 return blocking_notifier_chain_register(&esw->n_head, nb);
1977}
1978
1979void mlx5_esw_event_notifier_unregister(struct mlx5_eswitch *esw, struct notifier_block *nb)
1980{
1981 blocking_notifier_chain_unregister(&esw->n_head, nb);
1982}
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992bool mlx5_esw_hold(struct mlx5_core_dev *mdev)
1993{
1994 struct mlx5_eswitch *esw = mdev->priv.eswitch;
1995
1996
1997 if (!mlx5_esw_allowed(esw))
1998 return true;
1999
2000 if (down_read_trylock(&esw->mode_lock) != 0)
2001 return true;
2002
2003 return false;
2004}
2005
2006
2007
2008
2009
2010void mlx5_esw_release(struct mlx5_core_dev *mdev)
2011{
2012 struct mlx5_eswitch *esw = mdev->priv.eswitch;
2013
2014 if (mlx5_esw_allowed(esw))
2015 up_read(&esw->mode_lock);
2016}
2017
2018
2019
2020
2021
2022void mlx5_esw_get(struct mlx5_core_dev *mdev)
2023{
2024 struct mlx5_eswitch *esw = mdev->priv.eswitch;
2025
2026 if (mlx5_esw_allowed(esw))
2027 atomic64_inc(&esw->user_count);
2028}
2029
2030
2031
2032
2033
2034void mlx5_esw_put(struct mlx5_core_dev *mdev)
2035{
2036 struct mlx5_eswitch *esw = mdev->priv.eswitch;
2037
2038 if (mlx5_esw_allowed(esw))
2039 atomic64_dec_if_positive(&esw->user_count);
2040}
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053int mlx5_esw_try_lock(struct mlx5_eswitch *esw)
2054{
2055 if (down_write_trylock(&esw->mode_lock) == 0)
2056 return -EINVAL;
2057
2058 if (atomic64_read(&esw->user_count) > 0) {
2059 up_write(&esw->mode_lock);
2060 return -EBUSY;
2061 }
2062
2063 return esw->mode;
2064}
2065
2066
2067
2068
2069
2070void mlx5_esw_unlock(struct mlx5_eswitch *esw)
2071{
2072 if (!mlx5_esw_allowed(esw))
2073 return;
2074 up_write(&esw->mode_lock);
2075}
2076
2077
2078
2079
2080
2081void mlx5_esw_lock(struct mlx5_eswitch *esw)
2082{
2083 if (!mlx5_esw_allowed(esw))
2084 return;
2085 down_write(&esw->mode_lock);
2086}
2087
2088
2089
2090
2091
2092
2093
2094
2095u16 mlx5_eswitch_get_total_vports(const struct mlx5_core_dev *dev)
2096{
2097 struct mlx5_eswitch *esw;
2098
2099 esw = dev->priv.eswitch;
2100 return mlx5_esw_allowed(esw) ? esw->total_vports : 0;
2101}
2102EXPORT_SYMBOL_GPL(mlx5_eswitch_get_total_vports);
2103
2104
2105
2106
2107
2108
2109
2110struct mlx5_core_dev *mlx5_eswitch_get_core_dev(struct mlx5_eswitch *esw)
2111{
2112 return mlx5_esw_allowed(esw) ? esw->dev : NULL;
2113}
2114EXPORT_SYMBOL(mlx5_eswitch_get_core_dev);
2115