1
2
3
4#include <linux/module.h>
5#include <linux/netdevice.h>
6#include <linux/etherdevice.h>
7#include <linux/pci.h>
8
9#include "ionic.h"
10#include "ionic_bus.h"
11#include "ionic_lif.h"
12#include "ionic_debugfs.h"
13
14
15static const struct pci_device_id ionic_id_table[] = {
16 { PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_IONIC_ETH_PF) },
17 { PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_IONIC_ETH_VF) },
18 { 0, }
19};
20MODULE_DEVICE_TABLE(pci, ionic_id_table);
21
22int ionic_bus_get_irq(struct ionic *ionic, unsigned int num)
23{
24 return pci_irq_vector(ionic->pdev, num);
25}
26
27const char *ionic_bus_info(struct ionic *ionic)
28{
29 return pci_name(ionic->pdev);
30}
31
32int ionic_bus_alloc_irq_vectors(struct ionic *ionic, unsigned int nintrs)
33{
34 return pci_alloc_irq_vectors(ionic->pdev, nintrs, nintrs,
35 PCI_IRQ_MSIX);
36}
37
38void ionic_bus_free_irq_vectors(struct ionic *ionic)
39{
40 if (!ionic->nintrs)
41 return;
42
43 pci_free_irq_vectors(ionic->pdev);
44}
45
46static int ionic_map_bars(struct ionic *ionic)
47{
48 struct pci_dev *pdev = ionic->pdev;
49 struct device *dev = ionic->dev;
50 struct ionic_dev_bar *bars;
51 unsigned int i, j;
52
53 bars = ionic->bars;
54 ionic->num_bars = 0;
55
56 for (i = 0, j = 0; i < IONIC_BARS_MAX; i++) {
57 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
58 continue;
59 bars[j].len = pci_resource_len(pdev, i);
60
61
62 if (j > 0) {
63 bars[j].vaddr = NULL;
64 } else {
65 bars[j].vaddr = pci_iomap(pdev, i, bars[j].len);
66 if (!bars[j].vaddr) {
67 dev_err(dev,
68 "Cannot memory-map BAR %d, aborting\n",
69 i);
70 return -ENODEV;
71 }
72 }
73
74 bars[j].bus_addr = pci_resource_start(pdev, i);
75 bars[j].res_index = i;
76 ionic->num_bars++;
77 j++;
78 }
79
80 return 0;
81}
82
83static void ionic_unmap_bars(struct ionic *ionic)
84{
85 struct ionic_dev_bar *bars = ionic->bars;
86 unsigned int i;
87
88 for (i = 0; i < IONIC_BARS_MAX; i++) {
89 if (bars[i].vaddr) {
90 iounmap(bars[i].vaddr);
91 bars[i].bus_addr = 0;
92 bars[i].vaddr = NULL;
93 bars[i].len = 0;
94 }
95 }
96}
97
98void __iomem *ionic_bus_map_dbpage(struct ionic *ionic, int page_num)
99{
100 return pci_iomap_range(ionic->pdev,
101 ionic->bars[IONIC_PCI_BAR_DBELL].res_index,
102 (u64)page_num << PAGE_SHIFT, PAGE_SIZE);
103}
104
105void ionic_bus_unmap_dbpage(struct ionic *ionic, void __iomem *page)
106{
107 iounmap(page);
108}
109
110static void ionic_vf_dealloc_locked(struct ionic *ionic)
111{
112 struct ionic_vf *v;
113 dma_addr_t dma = 0;
114 int i;
115
116 if (!ionic->vfs)
117 return;
118
119 for (i = ionic->num_vfs - 1; i >= 0; i--) {
120 v = &ionic->vfs[i];
121
122 if (v->stats_pa) {
123 (void)ionic_set_vf_config(ionic, i,
124 IONIC_VF_ATTR_STATSADDR,
125 (u8 *)&dma);
126 dma_unmap_single(ionic->dev, v->stats_pa,
127 sizeof(v->stats), DMA_FROM_DEVICE);
128 v->stats_pa = 0;
129 }
130 }
131
132 kfree(ionic->vfs);
133 ionic->vfs = NULL;
134 ionic->num_vfs = 0;
135}
136
137static void ionic_vf_dealloc(struct ionic *ionic)
138{
139 down_write(&ionic->vf_op_lock);
140 ionic_vf_dealloc_locked(ionic);
141 up_write(&ionic->vf_op_lock);
142}
143
144static int ionic_vf_alloc(struct ionic *ionic, int num_vfs)
145{
146 struct ionic_vf *v;
147 int err = 0;
148 int i;
149
150 down_write(&ionic->vf_op_lock);
151
152 ionic->vfs = kcalloc(num_vfs, sizeof(struct ionic_vf), GFP_KERNEL);
153 if (!ionic->vfs) {
154 err = -ENOMEM;
155 goto out;
156 }
157
158 for (i = 0; i < num_vfs; i++) {
159 v = &ionic->vfs[i];
160 v->stats_pa = dma_map_single(ionic->dev, &v->stats,
161 sizeof(v->stats), DMA_FROM_DEVICE);
162 if (dma_mapping_error(ionic->dev, v->stats_pa)) {
163 v->stats_pa = 0;
164 err = -ENODEV;
165 goto out;
166 }
167
168 ionic->num_vfs++;
169
170 (void)ionic_set_vf_config(ionic, i, IONIC_VF_ATTR_STATSADDR,
171 (u8 *)&v->stats_pa);
172 }
173
174out:
175 if (err)
176 ionic_vf_dealloc_locked(ionic);
177 up_write(&ionic->vf_op_lock);
178 return err;
179}
180
181static int ionic_sriov_configure(struct pci_dev *pdev, int num_vfs)
182{
183 struct ionic *ionic = pci_get_drvdata(pdev);
184 struct device *dev = ionic->dev;
185 int ret = 0;
186
187 if (ionic->lif &&
188 test_bit(IONIC_LIF_F_FW_RESET, ionic->lif->state))
189 return -EBUSY;
190
191 if (num_vfs > 0) {
192 ret = pci_enable_sriov(pdev, num_vfs);
193 if (ret) {
194 dev_err(dev, "Cannot enable SRIOV: %d\n", ret);
195 goto out;
196 }
197
198 ret = ionic_vf_alloc(ionic, num_vfs);
199 if (ret) {
200 dev_err(dev, "Cannot alloc VFs: %d\n", ret);
201 pci_disable_sriov(pdev);
202 goto out;
203 }
204
205 ret = num_vfs;
206 } else {
207 pci_disable_sriov(pdev);
208 ionic_vf_dealloc(ionic);
209 }
210
211out:
212 return ret;
213}
214
215static int ionic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
216{
217 struct device *dev = &pdev->dev;
218 struct ionic *ionic;
219 int num_vfs;
220 int err;
221
222 ionic = ionic_devlink_alloc(dev);
223 if (!ionic)
224 return -ENOMEM;
225
226 ionic->pdev = pdev;
227 ionic->dev = dev;
228 pci_set_drvdata(pdev, ionic);
229 mutex_init(&ionic->dev_cmd_lock);
230
231
232 err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(IONIC_ADDR_LEN));
233 if (err) {
234 dev_err(dev, "Unable to obtain 64-bit DMA for consistent allocations, aborting. err=%d\n",
235 err);
236 goto err_out_clear_drvdata;
237 }
238
239 ionic_debugfs_add_dev(ionic);
240
241
242 err = pci_enable_device_mem(pdev);
243 if (err) {
244 dev_err(dev, "Cannot enable PCI device: %d, aborting\n", err);
245 goto err_out_debugfs_del_dev;
246 }
247
248 err = pci_request_regions(pdev, IONIC_DRV_NAME);
249 if (err) {
250 dev_err(dev, "Cannot request PCI regions: %d, aborting\n", err);
251 goto err_out_pci_disable_device;
252 }
253
254 pcie_print_link_status(pdev);
255
256 err = ionic_map_bars(ionic);
257 if (err)
258 goto err_out_pci_disable_device;
259
260
261 err = ionic_setup(ionic);
262 if (err) {
263 dev_err(dev, "Cannot setup device: %d, aborting\n", err);
264 goto err_out_unmap_bars;
265 }
266 pci_set_master(pdev);
267
268 err = ionic_identify(ionic);
269 if (err) {
270 dev_err(dev, "Cannot identify device: %d, aborting\n", err);
271 goto err_out_teardown;
272 }
273 ionic_debugfs_add_ident(ionic);
274
275 err = ionic_init(ionic);
276 if (err) {
277 dev_err(dev, "Cannot init device: %d, aborting\n", err);
278 goto err_out_teardown;
279 }
280
281
282 err = ionic_port_identify(ionic);
283 if (err) {
284 dev_err(dev, "Cannot identify port: %d, aborting\n", err);
285 goto err_out_reset;
286 }
287
288 err = ionic_port_init(ionic);
289 if (err) {
290 dev_err(dev, "Cannot init port: %d, aborting\n", err);
291 goto err_out_reset;
292 }
293
294
295 err = ionic_lif_size(ionic);
296 if (err) {
297 dev_err(dev, "Cannot size LIF: %d, aborting\n", err);
298 goto err_out_port_reset;
299 }
300
301 err = ionic_lif_alloc(ionic);
302 if (err) {
303 dev_err(dev, "Cannot allocate LIF: %d, aborting\n", err);
304 goto err_out_free_irqs;
305 }
306
307 err = ionic_lif_init(ionic->lif);
308 if (err) {
309 dev_err(dev, "Cannot init LIF: %d, aborting\n", err);
310 goto err_out_free_lifs;
311 }
312
313 init_rwsem(&ionic->vf_op_lock);
314 num_vfs = pci_num_vf(pdev);
315 if (num_vfs) {
316 dev_info(dev, "%d VFs found already enabled\n", num_vfs);
317 err = ionic_vf_alloc(ionic, num_vfs);
318 if (err)
319 dev_err(dev, "Cannot enable existing VFs: %d\n", err);
320 }
321
322 err = ionic_lif_register(ionic->lif);
323 if (err) {
324 dev_err(dev, "Cannot register LIF: %d, aborting\n", err);
325 goto err_out_deinit_lifs;
326 }
327
328 err = ionic_devlink_register(ionic);
329 if (err) {
330 dev_err(dev, "Cannot register devlink: %d\n", err);
331 goto err_out_deregister_lifs;
332 }
333
334 return 0;
335
336err_out_deregister_lifs:
337 ionic_lif_unregister(ionic->lif);
338err_out_deinit_lifs:
339 ionic_vf_dealloc(ionic);
340 ionic_lif_deinit(ionic->lif);
341err_out_free_lifs:
342 ionic_lif_free(ionic->lif);
343 ionic->lif = NULL;
344err_out_free_irqs:
345 ionic_bus_free_irq_vectors(ionic);
346err_out_port_reset:
347 ionic_port_reset(ionic);
348err_out_reset:
349 ionic_reset(ionic);
350err_out_teardown:
351 del_timer_sync(&ionic->watchdog_timer);
352 pci_clear_master(pdev);
353
354
355
356 return 0;
357
358err_out_unmap_bars:
359 ionic_unmap_bars(ionic);
360 pci_release_regions(pdev);
361err_out_pci_disable_device:
362 pci_disable_device(pdev);
363err_out_debugfs_del_dev:
364 ionic_debugfs_del_dev(ionic);
365err_out_clear_drvdata:
366 mutex_destroy(&ionic->dev_cmd_lock);
367 ionic_devlink_free(ionic);
368
369 return err;
370}
371
372static void ionic_remove(struct pci_dev *pdev)
373{
374 struct ionic *ionic = pci_get_drvdata(pdev);
375
376 del_timer_sync(&ionic->watchdog_timer);
377
378 if (ionic->lif) {
379 ionic_devlink_unregister(ionic);
380 ionic_lif_unregister(ionic->lif);
381 ionic_lif_deinit(ionic->lif);
382 ionic_lif_free(ionic->lif);
383 ionic->lif = NULL;
384 ionic_bus_free_irq_vectors(ionic);
385 }
386
387 ionic_port_reset(ionic);
388 ionic_reset(ionic);
389 pci_clear_master(pdev);
390 ionic_unmap_bars(ionic);
391 pci_release_regions(pdev);
392 pci_disable_device(pdev);
393 ionic_debugfs_del_dev(ionic);
394 mutex_destroy(&ionic->dev_cmd_lock);
395 ionic_devlink_free(ionic);
396}
397
398static struct pci_driver ionic_driver = {
399 .name = IONIC_DRV_NAME,
400 .id_table = ionic_id_table,
401 .probe = ionic_probe,
402 .remove = ionic_remove,
403 .sriov_configure = ionic_sriov_configure,
404};
405
406int ionic_bus_register_driver(void)
407{
408 return pci_register_driver(&ionic_driver);
409}
410
411void ionic_bus_unregister_driver(void)
412{
413 pci_unregister_driver(&ionic_driver);
414}
415
