1
2
3
4#ifndef _IONIC_LIF_H_
5#define _IONIC_LIF_H_
6
7#include <linux/ptp_clock_kernel.h>
8#include <linux/timecounter.h>
9#include <uapi/linux/net_tstamp.h>
10#include <linux/dim.h>
11#include <linux/pci.h>
12#include "ionic_rx_filter.h"
13
14#define IONIC_ADMINQ_LENGTH 16
15#define IONIC_NOTIFYQ_LENGTH 64
16
17#define IONIC_MAX_NUM_NAPI_CNTR (NAPI_POLL_WEIGHT + 1)
18#define IONIC_MAX_NUM_SG_CNTR (IONIC_TX_MAX_SG_ELEMS + 1)
19
20#define ADD_ADDR true
21#define DEL_ADDR false
22#define CAN_SLEEP true
23#define CAN_NOT_SLEEP false
24
25#define IONIC_RX_COPYBREAK_DEFAULT 256
26#define IONIC_TX_BUDGET_DEFAULT 256
27
28struct ionic_tx_stats {
29 u64 pkts;
30 u64 bytes;
31 u64 csum_none;
32 u64 csum;
33 u64 tso;
34 u64 tso_bytes;
35 u64 frags;
36 u64 vlan_inserted;
37 u64 clean;
38 u64 linearize;
39 u64 crc32_csum;
40 u64 sg_cntr[IONIC_MAX_NUM_SG_CNTR];
41 u64 dma_map_err;
42 u64 hwstamp_valid;
43 u64 hwstamp_invalid;
44};
45
46struct ionic_rx_stats {
47 u64 pkts;
48 u64 bytes;
49 u64 csum_none;
50 u64 csum_complete;
51 u64 buffers_posted;
52 u64 dropped;
53 u64 vlan_stripped;
54 u64 csum_error;
55 u64 dma_map_err;
56 u64 alloc_err;
57 u64 hwstamp_valid;
58 u64 hwstamp_invalid;
59};
60
61#define IONIC_QCQ_F_INITED BIT(0)
62#define IONIC_QCQ_F_SG BIT(1)
63#define IONIC_QCQ_F_INTR BIT(2)
64#define IONIC_QCQ_F_TX_STATS BIT(3)
65#define IONIC_QCQ_F_RX_STATS BIT(4)
66#define IONIC_QCQ_F_NOTIFYQ BIT(5)
67
68struct ionic_napi_stats {
69 u64 poll_count;
70 u64 work_done_cntr[IONIC_MAX_NUM_NAPI_CNTR];
71};
72
73struct ionic_qcq {
74 void *q_base;
75 dma_addr_t q_base_pa;
76 u32 q_size;
77 void *cq_base;
78 dma_addr_t cq_base_pa;
79 u32 cq_size;
80 void *sg_base;
81 dma_addr_t sg_base_pa;
82 u32 sg_size;
83 struct dim dim;
84 struct ionic_queue q;
85 struct ionic_cq cq;
86 struct ionic_intr_info intr;
87 struct napi_struct napi;
88 struct ionic_napi_stats napi_stats;
89 unsigned int flags;
90 struct dentry *dentry;
91};
92
93#define q_to_qcq(q) container_of(q, struct ionic_qcq, q)
94#define q_to_tx_stats(q) (&(q)->lif->txqstats[(q)->index])
95#define q_to_rx_stats(q) (&(q)->lif->rxqstats[(q)->index])
96#define napi_to_qcq(napi) container_of(napi, struct ionic_qcq, napi)
97#define napi_to_cq(napi) (&napi_to_qcq(napi)->cq)
98
99enum ionic_deferred_work_type {
100 IONIC_DW_TYPE_RX_MODE,
101 IONIC_DW_TYPE_LINK_STATUS,
102 IONIC_DW_TYPE_LIF_RESET,
103};
104
105struct ionic_deferred_work {
106 struct list_head list;
107 enum ionic_deferred_work_type type;
108 union {
109 u8 addr[ETH_ALEN];
110 u8 fw_status;
111 };
112};
113
114struct ionic_deferred {
115 spinlock_t lock;
116 struct list_head list;
117 struct work_struct work;
118};
119
120struct ionic_lif_sw_stats {
121 u64 tx_packets;
122 u64 tx_bytes;
123 u64 rx_packets;
124 u64 rx_bytes;
125 u64 tx_tso;
126 u64 tx_tso_bytes;
127 u64 tx_csum_none;
128 u64 tx_csum;
129 u64 rx_csum_none;
130 u64 rx_csum_complete;
131 u64 rx_csum_error;
132 u64 tx_hwstamp_valid;
133 u64 tx_hwstamp_invalid;
134 u64 rx_hwstamp_valid;
135 u64 rx_hwstamp_invalid;
136 u64 hw_tx_dropped;
137 u64 hw_rx_dropped;
138 u64 hw_rx_over_errors;
139 u64 hw_rx_missed_errors;
140 u64 hw_tx_aborted_errors;
141};
142
143enum ionic_lif_state_flags {
144 IONIC_LIF_F_INITED,
145 IONIC_LIF_F_SW_DEBUG_STATS,
146 IONIC_LIF_F_UP,
147 IONIC_LIF_F_LINK_CHECK_REQUESTED,
148 IONIC_LIF_F_FILTER_SYNC_NEEDED,
149 IONIC_LIF_F_FW_RESET,
150 IONIC_LIF_F_SPLIT_INTR,
151 IONIC_LIF_F_BROKEN,
152 IONIC_LIF_F_TX_DIM_INTR,
153 IONIC_LIF_F_RX_DIM_INTR,
154
155
156 IONIC_LIF_F_STATE_SIZE
157};
158
159struct ionic_qtype_info {
160 u8 version;
161 u8 supported;
162 u64 features;
163 u16 desc_sz;
164 u16 comp_sz;
165 u16 sg_desc_sz;
166 u16 max_sg_elems;
167 u16 sg_desc_stride;
168};
169
170struct ionic_phc;
171
172#define IONIC_LIF_NAME_MAX_SZ 32
173struct ionic_lif {
174 struct net_device *netdev;
175 DECLARE_BITMAP(state, IONIC_LIF_F_STATE_SIZE);
176 struct ionic *ionic;
177 unsigned int index;
178 unsigned int hw_index;
179 struct mutex queue_lock;
180 struct mutex config_lock;
181 spinlock_t adminq_lock;
182 struct ionic_qcq *adminqcq;
183 struct ionic_qcq *notifyqcq;
184 struct ionic_qcq **txqcqs;
185 struct ionic_qcq *hwstamp_txq;
186 struct ionic_tx_stats *txqstats;
187 struct ionic_qcq **rxqcqs;
188 struct ionic_qcq *hwstamp_rxq;
189 struct ionic_rx_stats *rxqstats;
190 struct ionic_deferred deferred;
191 struct work_struct tx_timeout_work;
192 u64 last_eid;
193 unsigned int kern_pid;
194 u64 __iomem *kern_dbpage;
195 unsigned int neqs;
196 unsigned int nxqs;
197 unsigned int ntxq_descs;
198 unsigned int nrxq_descs;
199 u32 rx_copybreak;
200 u64 rxq_features;
201 u16 rx_mode;
202 u64 hw_features;
203 bool registered;
204 bool mc_overflow;
205 bool uc_overflow;
206 u16 lif_type;
207 unsigned int nmcast;
208 unsigned int nucast;
209 char name[IONIC_LIF_NAME_MAX_SZ];
210
211 union ionic_lif_identity *identity;
212 struct ionic_lif_info *info;
213 dma_addr_t info_pa;
214 u32 info_sz;
215 struct ionic_qtype_info qtype_info[IONIC_QTYPE_MAX];
216
217 u16 rss_types;
218 u8 rss_hash_key[IONIC_RSS_HASH_KEY_SIZE];
219 u8 *rss_ind_tbl;
220 dma_addr_t rss_ind_tbl_pa;
221 u32 rss_ind_tbl_sz;
222
223 struct ionic_rx_filters rx_filters;
224 u32 rx_coalesce_usecs;
225 u32 rx_coalesce_hw;
226 u32 tx_coalesce_usecs;
227 u32 tx_coalesce_hw;
228 unsigned long *dbid_inuse;
229 unsigned int dbid_count;
230
231 struct ionic_phc *phc;
232
233 struct dentry *dentry;
234};
235
236struct ionic_phc {
237 spinlock_t lock;
238 struct cyclecounter cc;
239 struct timecounter tc;
240
241 struct mutex config_lock;
242 struct hwtstamp_config ts_config;
243 u64 ts_config_rx_filt;
244 u32 ts_config_tx_mode;
245
246 u32 init_cc_mult;
247 long aux_work_delay;
248
249 struct ptp_clock_info ptp_info;
250 struct ptp_clock *ptp;
251 struct ionic_lif *lif;
252};
253
254struct ionic_queue_params {
255 unsigned int nxqs;
256 unsigned int ntxq_descs;
257 unsigned int nrxq_descs;
258 unsigned int intr_split;
259 u64 rxq_features;
260};
261
262static inline void ionic_init_queue_params(struct ionic_lif *lif,
263 struct ionic_queue_params *qparam)
264{
265 qparam->nxqs = lif->nxqs;
266 qparam->ntxq_descs = lif->ntxq_descs;
267 qparam->nrxq_descs = lif->nrxq_descs;
268 qparam->intr_split = test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state);
269 qparam->rxq_features = lif->rxq_features;
270}
271
272static inline u32 ionic_coal_usec_to_hw(struct ionic *ionic, u32 usecs)
273{
274 u32 mult = le32_to_cpu(ionic->ident.dev.intr_coal_mult);
275 u32 div = le32_to_cpu(ionic->ident.dev.intr_coal_div);
276
277
278 if (!div || !mult)
279 return 0;
280
281
282 usecs += (div / mult) >> 1;
283
284
285 return (usecs * mult) / div;
286}
287
288void ionic_link_status_check_request(struct ionic_lif *lif, bool can_sleep);
289void ionic_get_stats64(struct net_device *netdev,
290 struct rtnl_link_stats64 *ns);
291void ionic_lif_deferred_enqueue(struct ionic_deferred *def,
292 struct ionic_deferred_work *work);
293int ionic_lif_alloc(struct ionic *ionic);
294int ionic_lif_init(struct ionic_lif *lif);
295void ionic_lif_free(struct ionic_lif *lif);
296void ionic_lif_deinit(struct ionic_lif *lif);
297
298int ionic_lif_addr_add(struct ionic_lif *lif, const u8 *addr);
299int ionic_lif_addr_del(struct ionic_lif *lif, const u8 *addr);
300
301int ionic_lif_register(struct ionic_lif *lif);
302void ionic_lif_unregister(struct ionic_lif *lif);
303int ionic_lif_identify(struct ionic *ionic, u8 lif_type,
304 union ionic_lif_identity *lif_ident);
305int ionic_lif_size(struct ionic *ionic);
306
307#if IS_ENABLED(CONFIG_PTP_1588_CLOCK)
308void ionic_lif_hwstamp_replay(struct ionic_lif *lif);
309void ionic_lif_hwstamp_recreate_queues(struct ionic_lif *lif);
310int ionic_lif_hwstamp_set(struct ionic_lif *lif, struct ifreq *ifr);
311int ionic_lif_hwstamp_get(struct ionic_lif *lif, struct ifreq *ifr);
312ktime_t ionic_lif_phc_ktime(struct ionic_lif *lif, u64 counter);
313void ionic_lif_register_phc(struct ionic_lif *lif);
314void ionic_lif_unregister_phc(struct ionic_lif *lif);
315void ionic_lif_alloc_phc(struct ionic_lif *lif);
316void ionic_lif_free_phc(struct ionic_lif *lif);
317#else
318static inline void ionic_lif_hwstamp_replay(struct ionic_lif *lif) {}
319static inline void ionic_lif_hwstamp_recreate_queues(struct ionic_lif *lif) {}
320
321static inline int ionic_lif_hwstamp_set(struct ionic_lif *lif, struct ifreq *ifr)
322{
323 return -EOPNOTSUPP;
324}
325
326static inline int ionic_lif_hwstamp_get(struct ionic_lif *lif, struct ifreq *ifr)
327{
328 return -EOPNOTSUPP;
329}
330
331static inline ktime_t ionic_lif_phc_ktime(struct ionic_lif *lif, u64 counter)
332{
333 return ns_to_ktime(0);
334}
335
336static inline void ionic_lif_register_phc(struct ionic_lif *lif) {}
337static inline void ionic_lif_unregister_phc(struct ionic_lif *lif) {}
338static inline void ionic_lif_alloc_phc(struct ionic_lif *lif) {}
339static inline void ionic_lif_free_phc(struct ionic_lif *lif) {}
340#endif
341
342int ionic_lif_create_hwstamp_txq(struct ionic_lif *lif);
343int ionic_lif_create_hwstamp_rxq(struct ionic_lif *lif);
344int ionic_lif_config_hwstamp_rxq_all(struct ionic_lif *lif, bool rx_all);
345int ionic_lif_set_hwstamp_txmode(struct ionic_lif *lif, u16 txstamp_mode);
346int ionic_lif_set_hwstamp_rxfilt(struct ionic_lif *lif, u64 pkt_class);
347
348int ionic_lif_rss_config(struct ionic_lif *lif, u16 types,
349 const u8 *key, const u32 *indir);
350void ionic_lif_rx_mode(struct ionic_lif *lif);
351int ionic_reconfigure_queues(struct ionic_lif *lif,
352 struct ionic_queue_params *qparam);
353
354static inline void debug_stats_txq_post(struct ionic_queue *q, bool dbell)
355{
356 struct ionic_txq_desc *desc = &q->txq[q->head_idx];
357 u8 num_sg_elems;
358
359 q->dbell_count += dbell;
360
361 num_sg_elems = ((le64_to_cpu(desc->cmd) >> IONIC_TXQ_DESC_NSGE_SHIFT)
362 & IONIC_TXQ_DESC_NSGE_MASK);
363 if (num_sg_elems > (IONIC_MAX_NUM_SG_CNTR - 1))
364 num_sg_elems = IONIC_MAX_NUM_SG_CNTR - 1;
365
366 q->lif->txqstats[q->index].sg_cntr[num_sg_elems]++;
367}
368
369static inline void debug_stats_napi_poll(struct ionic_qcq *qcq,
370 unsigned int work_done)
371{
372 qcq->napi_stats.poll_count++;
373
374 if (work_done > (IONIC_MAX_NUM_NAPI_CNTR - 1))
375 work_done = IONIC_MAX_NUM_NAPI_CNTR - 1;
376
377 qcq->napi_stats.work_done_cntr[work_done]++;
378}
379
380#define DEBUG_STATS_CQE_CNT(cq) ((cq)->compl_count++)
381#define DEBUG_STATS_RX_BUFF_CNT(q) ((q)->lif->rxqstats[q->index].buffers_posted++)
382#define DEBUG_STATS_TXQ_POST(q, dbell) debug_stats_txq_post(q, dbell)
383#define DEBUG_STATS_NAPI_POLL(qcq, work_done) \
384 debug_stats_napi_poll(qcq, work_done)
385
386#endif
387
