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11#include <linux/platform_device.h>
12#include <linux/pm_runtime.h>
13#include <linux/module.h>
14#include <linux/io.h>
15#include <linux/of.h>
16#include <linux/of_net.h>
17#include <linux/of_device.h>
18#include <linux/of_mdio.h>
19
20#include "stmmac.h"
21#include "stmmac_platform.h"
22
23#ifdef CONFIG_OF
24
25
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28
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31
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34
35
36
37
38static int dwmac1000_validate_mcast_bins(struct device *dev, int mcast_bins)
39{
40 int x = mcast_bins;
41
42 switch (x) {
43 case HASH_TABLE_SIZE:
44 case 128:
45 case 256:
46 break;
47 default:
48 x = 0;
49 dev_info(dev, "Hash table entries set to unexpected value %d\n",
50 mcast_bins);
51 break;
52 }
53 return x;
54}
55
56
57
58
59
60
61
62
63
64
65
66
67
68static int dwmac1000_validate_ucast_entries(struct device *dev,
69 int ucast_entries)
70{
71 int x = ucast_entries;
72
73 switch (x) {
74 case 1 ... 32:
75 case 64:
76 case 128:
77 break;
78 default:
79 x = 1;
80 dev_info(dev, "Unicast table entries set to unexpected value %d\n",
81 ucast_entries);
82 break;
83 }
84 return x;
85}
86
87
88
89
90
91
92
93
94static struct stmmac_axi *stmmac_axi_setup(struct platform_device *pdev)
95{
96 struct device_node *np;
97 struct stmmac_axi *axi;
98
99 np = of_parse_phandle(pdev->dev.of_node, "snps,axi-config", 0);
100 if (!np)
101 return NULL;
102
103 axi = devm_kzalloc(&pdev->dev, sizeof(*axi), GFP_KERNEL);
104 if (!axi) {
105 of_node_put(np);
106 return ERR_PTR(-ENOMEM);
107 }
108
109 axi->axi_lpi_en = of_property_read_bool(np, "snps,lpi_en");
110 axi->axi_xit_frm = of_property_read_bool(np, "snps,xit_frm");
111 axi->axi_kbbe = of_property_read_bool(np, "snps,axi_kbbe");
112 axi->axi_fb = of_property_read_bool(np, "snps,axi_fb");
113 axi->axi_mb = of_property_read_bool(np, "snps,axi_mb");
114 axi->axi_rb = of_property_read_bool(np, "snps,axi_rb");
115
116 if (of_property_read_u32(np, "snps,wr_osr_lmt", &axi->axi_wr_osr_lmt))
117 axi->axi_wr_osr_lmt = 1;
118 if (of_property_read_u32(np, "snps,rd_osr_lmt", &axi->axi_rd_osr_lmt))
119 axi->axi_rd_osr_lmt = 1;
120 of_property_read_u32_array(np, "snps,blen", axi->axi_blen, AXI_BLEN);
121 of_node_put(np);
122
123 return axi;
124}
125
126
127
128
129
130
131static int stmmac_mtl_setup(struct platform_device *pdev,
132 struct plat_stmmacenet_data *plat)
133{
134 struct device_node *q_node;
135 struct device_node *rx_node;
136 struct device_node *tx_node;
137 u8 queue = 0;
138 int ret = 0;
139
140
141
142
143
144 plat->rx_queues_to_use = 1;
145 plat->tx_queues_to_use = 1;
146
147
148
149
150
151 plat->rx_queues_cfg[0].mode_to_use = MTL_QUEUE_DCB;
152 plat->tx_queues_cfg[0].mode_to_use = MTL_QUEUE_DCB;
153
154 rx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-rx-config", 0);
155 if (!rx_node)
156 return ret;
157
158 tx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-tx-config", 0);
159 if (!tx_node) {
160 of_node_put(rx_node);
161 return ret;
162 }
163
164
165 if (of_property_read_u32(rx_node, "snps,rx-queues-to-use",
166 &plat->rx_queues_to_use))
167 plat->rx_queues_to_use = 1;
168
169 if (of_property_read_bool(rx_node, "snps,rx-sched-sp"))
170 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
171 else if (of_property_read_bool(rx_node, "snps,rx-sched-wsp"))
172 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_WSP;
173 else
174 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
175
176
177 for_each_child_of_node(rx_node, q_node) {
178 if (queue >= plat->rx_queues_to_use)
179 break;
180
181 if (of_property_read_bool(q_node, "snps,dcb-algorithm"))
182 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
183 else if (of_property_read_bool(q_node, "snps,avb-algorithm"))
184 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
185 else
186 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
187
188 if (of_property_read_u32(q_node, "snps,map-to-dma-channel",
189 &plat->rx_queues_cfg[queue].chan))
190 plat->rx_queues_cfg[queue].chan = queue;
191
192
193 if (of_property_read_u32(q_node, "snps,priority",
194 &plat->rx_queues_cfg[queue].prio)) {
195 plat->rx_queues_cfg[queue].prio = 0;
196 plat->rx_queues_cfg[queue].use_prio = false;
197 } else {
198 plat->rx_queues_cfg[queue].use_prio = true;
199 }
200
201
202 if (of_property_read_bool(q_node, "snps,route-avcp"))
203 plat->rx_queues_cfg[queue].pkt_route = PACKET_AVCPQ;
204 else if (of_property_read_bool(q_node, "snps,route-ptp"))
205 plat->rx_queues_cfg[queue].pkt_route = PACKET_PTPQ;
206 else if (of_property_read_bool(q_node, "snps,route-dcbcp"))
207 plat->rx_queues_cfg[queue].pkt_route = PACKET_DCBCPQ;
208 else if (of_property_read_bool(q_node, "snps,route-up"))
209 plat->rx_queues_cfg[queue].pkt_route = PACKET_UPQ;
210 else if (of_property_read_bool(q_node, "snps,route-multi-broad"))
211 plat->rx_queues_cfg[queue].pkt_route = PACKET_MCBCQ;
212 else
213 plat->rx_queues_cfg[queue].pkt_route = 0x0;
214
215 queue++;
216 }
217 if (queue != plat->rx_queues_to_use) {
218 ret = -EINVAL;
219 dev_err(&pdev->dev, "Not all RX queues were configured\n");
220 goto out;
221 }
222
223
224 if (of_property_read_u32(tx_node, "snps,tx-queues-to-use",
225 &plat->tx_queues_to_use))
226 plat->tx_queues_to_use = 1;
227
228 if (of_property_read_bool(tx_node, "snps,tx-sched-wrr"))
229 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WRR;
230 else if (of_property_read_bool(tx_node, "snps,tx-sched-wfq"))
231 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WFQ;
232 else if (of_property_read_bool(tx_node, "snps,tx-sched-dwrr"))
233 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_DWRR;
234 else
235 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_SP;
236
237 queue = 0;
238
239
240 for_each_child_of_node(tx_node, q_node) {
241 if (queue >= plat->tx_queues_to_use)
242 break;
243
244 if (of_property_read_u32(q_node, "snps,weight",
245 &plat->tx_queues_cfg[queue].weight))
246 plat->tx_queues_cfg[queue].weight = 0x10 + queue;
247
248 if (of_property_read_bool(q_node, "snps,dcb-algorithm")) {
249 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
250 } else if (of_property_read_bool(q_node,
251 "snps,avb-algorithm")) {
252 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
253
254
255 if (of_property_read_u32(q_node, "snps,send_slope",
256 &plat->tx_queues_cfg[queue].send_slope))
257 plat->tx_queues_cfg[queue].send_slope = 0x0;
258 if (of_property_read_u32(q_node, "snps,idle_slope",
259 &plat->tx_queues_cfg[queue].idle_slope))
260 plat->tx_queues_cfg[queue].idle_slope = 0x0;
261 if (of_property_read_u32(q_node, "snps,high_credit",
262 &plat->tx_queues_cfg[queue].high_credit))
263 plat->tx_queues_cfg[queue].high_credit = 0x0;
264 if (of_property_read_u32(q_node, "snps,low_credit",
265 &plat->tx_queues_cfg[queue].low_credit))
266 plat->tx_queues_cfg[queue].low_credit = 0x0;
267 } else {
268 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
269 }
270
271 if (of_property_read_u32(q_node, "snps,priority",
272 &plat->tx_queues_cfg[queue].prio)) {
273 plat->tx_queues_cfg[queue].prio = 0;
274 plat->tx_queues_cfg[queue].use_prio = false;
275 } else {
276 plat->tx_queues_cfg[queue].use_prio = true;
277 }
278
279 queue++;
280 }
281 if (queue != plat->tx_queues_to_use) {
282 ret = -EINVAL;
283 dev_err(&pdev->dev, "Not all TX queues were configured\n");
284 goto out;
285 }
286
287out:
288 of_node_put(rx_node);
289 of_node_put(tx_node);
290 of_node_put(q_node);
291
292 return ret;
293}
294
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319
320static int stmmac_dt_phy(struct plat_stmmacenet_data *plat,
321 struct device_node *np, struct device *dev)
322{
323 bool mdio = !of_phy_is_fixed_link(np);
324 static const struct of_device_id need_mdio_ids[] = {
325 { .compatible = "snps,dwc-qos-ethernet-4.10" },
326 {},
327 };
328
329 if (of_match_node(need_mdio_ids, np)) {
330 plat->mdio_node = of_get_child_by_name(np, "mdio");
331 } else {
332
333
334
335
336 for_each_child_of_node(np, plat->mdio_node) {
337 if (of_device_is_compatible(plat->mdio_node,
338 "snps,dwmac-mdio"))
339 break;
340 }
341 }
342
343 if (plat->mdio_node) {
344 dev_dbg(dev, "Found MDIO subnode\n");
345 mdio = true;
346 }
347
348 if (mdio) {
349 plat->mdio_bus_data =
350 devm_kzalloc(dev, sizeof(struct stmmac_mdio_bus_data),
351 GFP_KERNEL);
352 if (!plat->mdio_bus_data)
353 return -ENOMEM;
354
355 plat->mdio_bus_data->needs_reset = true;
356 }
357
358 return 0;
359}
360
361
362
363
364
365
366
367
368
369
370static int stmmac_of_get_mac_mode(struct device_node *np)
371{
372 const char *pm;
373 int err, i;
374
375 err = of_property_read_string(np, "mac-mode", &pm);
376 if (err < 0)
377 return err;
378
379 for (i = 0; i < PHY_INTERFACE_MODE_MAX; i++) {
380 if (!strcasecmp(pm, phy_modes(i)))
381 return i;
382 }
383
384 return -ENODEV;
385}
386
387
388
389
390
391
392
393
394
395struct plat_stmmacenet_data *
396stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
397{
398 struct device_node *np = pdev->dev.of_node;
399 struct plat_stmmacenet_data *plat;
400 struct stmmac_dma_cfg *dma_cfg;
401 int phy_mode;
402 void *ret;
403 int rc;
404
405 plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
406 if (!plat)
407 return ERR_PTR(-ENOMEM);
408
409 rc = of_get_mac_address(np, mac);
410 if (rc) {
411 if (rc == -EPROBE_DEFER)
412 return ERR_PTR(rc);
413
414 eth_zero_addr(mac);
415 }
416
417 phy_mode = device_get_phy_mode(&pdev->dev);
418 if (phy_mode < 0)
419 return ERR_PTR(phy_mode);
420
421 plat->phy_interface = phy_mode;
422 plat->interface = stmmac_of_get_mac_mode(np);
423 if (plat->interface < 0)
424 plat->interface = plat->phy_interface;
425
426
427
428 plat->phy_node = of_parse_phandle(np, "phy-handle", 0);
429
430
431 plat->phylink_node = np;
432
433
434 if (of_property_read_u32(np, "max-speed", &plat->max_speed))
435 plat->max_speed = -1;
436
437 plat->bus_id = of_alias_get_id(np, "ethernet");
438 if (plat->bus_id < 0)
439 plat->bus_id = 0;
440
441
442 plat->phy_addr = -1;
443
444
445
446
447 plat->clk_csr = -1;
448 of_property_read_u32(np, "clk_csr", &plat->clk_csr);
449
450
451
452
453 if (of_property_read_u32(np, "snps,phy-addr", &plat->phy_addr) == 0)
454 dev_warn(&pdev->dev, "snps,phy-addr property is deprecated\n");
455
456
457 rc = stmmac_dt_phy(plat, np, &pdev->dev);
458 if (rc)
459 return ERR_PTR(rc);
460
461 of_property_read_u32(np, "tx-fifo-depth", &plat->tx_fifo_size);
462
463 of_property_read_u32(np, "rx-fifo-depth", &plat->rx_fifo_size);
464
465 plat->force_sf_dma_mode =
466 of_property_read_bool(np, "snps,force_sf_dma_mode");
467
468 plat->en_tx_lpi_clockgating =
469 of_property_read_bool(np, "snps,en-tx-lpi-clockgating");
470
471
472
473
474 plat->maxmtu = JUMBO_LEN;
475
476
477 plat->multicast_filter_bins = HASH_TABLE_SIZE;
478
479
480 plat->unicast_filter_entries = 1;
481
482
483
484
485
486
487 if (of_device_is_compatible(np, "st,spear600-gmac") ||
488 of_device_is_compatible(np, "snps,dwmac-3.50a") ||
489 of_device_is_compatible(np, "snps,dwmac-3.70a") ||
490 of_device_is_compatible(np, "snps,dwmac")) {
491
492
493
494
495
496
497
498 of_property_read_u32(np, "max-frame-size", &plat->maxmtu);
499 of_property_read_u32(np, "snps,multicast-filter-bins",
500 &plat->multicast_filter_bins);
501 of_property_read_u32(np, "snps,perfect-filter-entries",
502 &plat->unicast_filter_entries);
503 plat->unicast_filter_entries = dwmac1000_validate_ucast_entries(
504 &pdev->dev, plat->unicast_filter_entries);
505 plat->multicast_filter_bins = dwmac1000_validate_mcast_bins(
506 &pdev->dev, plat->multicast_filter_bins);
507 plat->has_gmac = 1;
508 plat->pmt = 1;
509 }
510
511 if (of_device_is_compatible(np, "snps,dwmac-3.40a")) {
512 plat->has_gmac = 1;
513 plat->enh_desc = 1;
514 plat->tx_coe = 1;
515 plat->bugged_jumbo = 1;
516 plat->pmt = 1;
517 }
518
519 if (of_device_is_compatible(np, "snps,dwmac-4.00") ||
520 of_device_is_compatible(np, "snps,dwmac-4.10a") ||
521 of_device_is_compatible(np, "snps,dwmac-4.20a") ||
522 of_device_is_compatible(np, "snps,dwmac-5.10a")) {
523 plat->has_gmac4 = 1;
524 plat->has_gmac = 0;
525 plat->pmt = 1;
526 plat->tso_en = of_property_read_bool(np, "snps,tso");
527 }
528
529 if (of_device_is_compatible(np, "snps,dwmac-3.610") ||
530 of_device_is_compatible(np, "snps,dwmac-3.710")) {
531 plat->enh_desc = 1;
532 plat->bugged_jumbo = 1;
533 plat->force_sf_dma_mode = 1;
534 }
535
536 if (of_device_is_compatible(np, "snps,dwxgmac")) {
537 plat->has_xgmac = 1;
538 plat->pmt = 1;
539 plat->tso_en = of_property_read_bool(np, "snps,tso");
540 }
541
542 dma_cfg = devm_kzalloc(&pdev->dev, sizeof(*dma_cfg),
543 GFP_KERNEL);
544 if (!dma_cfg) {
545 stmmac_remove_config_dt(pdev, plat);
546 return ERR_PTR(-ENOMEM);
547 }
548 plat->dma_cfg = dma_cfg;
549
550 of_property_read_u32(np, "snps,pbl", &dma_cfg->pbl);
551 if (!dma_cfg->pbl)
552 dma_cfg->pbl = DEFAULT_DMA_PBL;
553 of_property_read_u32(np, "snps,txpbl", &dma_cfg->txpbl);
554 of_property_read_u32(np, "snps,rxpbl", &dma_cfg->rxpbl);
555 dma_cfg->pblx8 = !of_property_read_bool(np, "snps,no-pbl-x8");
556
557 dma_cfg->aal = of_property_read_bool(np, "snps,aal");
558 dma_cfg->fixed_burst = of_property_read_bool(np, "snps,fixed-burst");
559 dma_cfg->mixed_burst = of_property_read_bool(np, "snps,mixed-burst");
560
561 plat->force_thresh_dma_mode = of_property_read_bool(np, "snps,force_thresh_dma_mode");
562 if (plat->force_thresh_dma_mode) {
563 plat->force_sf_dma_mode = 0;
564 dev_warn(&pdev->dev,
565 "force_sf_dma_mode is ignored if force_thresh_dma_mode is set.\n");
566 }
567
568 of_property_read_u32(np, "snps,ps-speed", &plat->mac_port_sel_speed);
569
570 plat->axi = stmmac_axi_setup(pdev);
571
572 rc = stmmac_mtl_setup(pdev, plat);
573 if (rc) {
574 stmmac_remove_config_dt(pdev, plat);
575 return ERR_PTR(rc);
576 }
577
578
579 if (!of_device_is_compatible(np, "snps,dwc-qos-ethernet-4.10")) {
580 plat->stmmac_clk = devm_clk_get(&pdev->dev,
581 STMMAC_RESOURCE_NAME);
582 if (IS_ERR(plat->stmmac_clk)) {
583 dev_warn(&pdev->dev, "Cannot get CSR clock\n");
584 plat->stmmac_clk = NULL;
585 }
586 clk_prepare_enable(plat->stmmac_clk);
587 }
588
589 plat->pclk = devm_clk_get_optional(&pdev->dev, "pclk");
590 if (IS_ERR(plat->pclk)) {
591 ret = plat->pclk;
592 goto error_pclk_get;
593 }
594 clk_prepare_enable(plat->pclk);
595
596
597 plat->clk_ptp_ref = devm_clk_get(&pdev->dev, "ptp_ref");
598 if (IS_ERR(plat->clk_ptp_ref)) {
599 plat->clk_ptp_rate = clk_get_rate(plat->stmmac_clk);
600 plat->clk_ptp_ref = NULL;
601 dev_info(&pdev->dev, "PTP uses main clock\n");
602 } else {
603 plat->clk_ptp_rate = clk_get_rate(plat->clk_ptp_ref);
604 dev_dbg(&pdev->dev, "PTP rate %d\n", plat->clk_ptp_rate);
605 }
606
607 plat->stmmac_rst = devm_reset_control_get_optional(&pdev->dev,
608 STMMAC_RESOURCE_NAME);
609 if (IS_ERR(plat->stmmac_rst)) {
610 ret = plat->stmmac_rst;
611 goto error_hw_init;
612 }
613
614 plat->stmmac_ahb_rst = devm_reset_control_get_optional_shared(
615 &pdev->dev, "ahb");
616 if (IS_ERR(plat->stmmac_ahb_rst)) {
617 ret = plat->stmmac_ahb_rst;
618 goto error_hw_init;
619 }
620
621 return plat;
622
623error_hw_init:
624 clk_disable_unprepare(plat->pclk);
625error_pclk_get:
626 clk_disable_unprepare(plat->stmmac_clk);
627
628 return ret;
629}
630
631
632
633
634
635
636
637
638void stmmac_remove_config_dt(struct platform_device *pdev,
639 struct plat_stmmacenet_data *plat)
640{
641 clk_disable_unprepare(plat->stmmac_clk);
642 clk_disable_unprepare(plat->pclk);
643 of_node_put(plat->phy_node);
644 of_node_put(plat->mdio_node);
645}
646#else
647struct plat_stmmacenet_data *
648stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
649{
650 return ERR_PTR(-EINVAL);
651}
652
653void stmmac_remove_config_dt(struct platform_device *pdev,
654 struct plat_stmmacenet_data *plat)
655{
656}
657#endif
658EXPORT_SYMBOL_GPL(stmmac_probe_config_dt);
659EXPORT_SYMBOL_GPL(stmmac_remove_config_dt);
660
661int stmmac_get_platform_resources(struct platform_device *pdev,
662 struct stmmac_resources *stmmac_res)
663{
664 memset(stmmac_res, 0, sizeof(*stmmac_res));
665
666
667
668
669 stmmac_res->irq = platform_get_irq_byname(pdev, "macirq");
670 if (stmmac_res->irq < 0)
671 return stmmac_res->irq;
672
673
674
675
676
677
678
679
680 stmmac_res->wol_irq =
681 platform_get_irq_byname_optional(pdev, "eth_wake_irq");
682 if (stmmac_res->wol_irq < 0) {
683 if (stmmac_res->wol_irq == -EPROBE_DEFER)
684 return -EPROBE_DEFER;
685 dev_info(&pdev->dev, "IRQ eth_wake_irq not found\n");
686 stmmac_res->wol_irq = stmmac_res->irq;
687 }
688
689 stmmac_res->lpi_irq =
690 platform_get_irq_byname_optional(pdev, "eth_lpi");
691 if (stmmac_res->lpi_irq < 0) {
692 if (stmmac_res->lpi_irq == -EPROBE_DEFER)
693 return -EPROBE_DEFER;
694 dev_info(&pdev->dev, "IRQ eth_lpi not found\n");
695 }
696
697 stmmac_res->addr = devm_platform_ioremap_resource(pdev, 0);
698
699 return PTR_ERR_OR_ZERO(stmmac_res->addr);
700}
701EXPORT_SYMBOL_GPL(stmmac_get_platform_resources);
702
703
704
705
706
707
708
709int stmmac_pltfr_remove(struct platform_device *pdev)
710{
711 struct net_device *ndev = platform_get_drvdata(pdev);
712 struct stmmac_priv *priv = netdev_priv(ndev);
713 struct plat_stmmacenet_data *plat = priv->plat;
714 int ret = stmmac_dvr_remove(&pdev->dev);
715
716 if (plat->exit)
717 plat->exit(pdev, plat->bsp_priv);
718
719 stmmac_remove_config_dt(pdev, plat);
720
721 return ret;
722}
723EXPORT_SYMBOL_GPL(stmmac_pltfr_remove);
724
725
726
727
728
729
730
731
732static int __maybe_unused stmmac_pltfr_suspend(struct device *dev)
733{
734 int ret;
735 struct net_device *ndev = dev_get_drvdata(dev);
736 struct stmmac_priv *priv = netdev_priv(ndev);
737 struct platform_device *pdev = to_platform_device(dev);
738
739 ret = stmmac_suspend(dev);
740 if (priv->plat->exit)
741 priv->plat->exit(pdev, priv->plat->bsp_priv);
742
743 return ret;
744}
745
746
747
748
749
750
751
752
753static int __maybe_unused stmmac_pltfr_resume(struct device *dev)
754{
755 struct net_device *ndev = dev_get_drvdata(dev);
756 struct stmmac_priv *priv = netdev_priv(ndev);
757 struct platform_device *pdev = to_platform_device(dev);
758
759 if (priv->plat->init)
760 priv->plat->init(pdev, priv->plat->bsp_priv);
761
762 return stmmac_resume(dev);
763}
764
765static int __maybe_unused stmmac_runtime_suspend(struct device *dev)
766{
767 struct net_device *ndev = dev_get_drvdata(dev);
768 struct stmmac_priv *priv = netdev_priv(ndev);
769
770 stmmac_bus_clks_config(priv, false);
771
772 return 0;
773}
774
775static int __maybe_unused stmmac_runtime_resume(struct device *dev)
776{
777 struct net_device *ndev = dev_get_drvdata(dev);
778 struct stmmac_priv *priv = netdev_priv(ndev);
779
780 return stmmac_bus_clks_config(priv, true);
781}
782
783static int __maybe_unused stmmac_pltfr_noirq_suspend(struct device *dev)
784{
785 struct net_device *ndev = dev_get_drvdata(dev);
786 struct stmmac_priv *priv = netdev_priv(ndev);
787 int ret;
788
789 if (!netif_running(ndev))
790 return 0;
791
792 if (!device_may_wakeup(priv->device) || !priv->plat->pmt) {
793
794 clk_disable_unprepare(priv->plat->clk_ptp_ref);
795
796 ret = pm_runtime_force_suspend(dev);
797 if (ret)
798 return ret;
799 }
800
801 return 0;
802}
803
804static int __maybe_unused stmmac_pltfr_noirq_resume(struct device *dev)
805{
806 struct net_device *ndev = dev_get_drvdata(dev);
807 struct stmmac_priv *priv = netdev_priv(ndev);
808 int ret;
809
810 if (!netif_running(ndev))
811 return 0;
812
813 if (!device_may_wakeup(priv->device) || !priv->plat->pmt) {
814
815 ret = pm_runtime_force_resume(dev);
816 if (ret)
817 return ret;
818
819 clk_prepare_enable(priv->plat->clk_ptp_ref);
820 }
821
822 return 0;
823}
824
825const struct dev_pm_ops stmmac_pltfr_pm_ops = {
826 SET_SYSTEM_SLEEP_PM_OPS(stmmac_pltfr_suspend, stmmac_pltfr_resume)
827 SET_RUNTIME_PM_OPS(stmmac_runtime_suspend, stmmac_runtime_resume, NULL)
828 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(stmmac_pltfr_noirq_suspend, stmmac_pltfr_noirq_resume)
829};
830EXPORT_SYMBOL_GPL(stmmac_pltfr_pm_ops);
831
832MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet platform support");
833MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
834MODULE_LICENSE("GPL");
835