linux/drivers/net/wan/hd64572.c
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   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Hitachi (now Renesas) SCA-II HD64572 driver for Linux
   4 *
   5 * Copyright (C) 1998-2008 Krzysztof Halasa <khc@pm.waw.pl>
   6 *
   7 * Source of information: HD64572 SCA-II User's Manual
   8 *
   9 * We use the following SCA memory map:
  10 *
  11 * Packet buffer descriptor rings - starting from card->rambase:
  12 * rx_ring_buffers * sizeof(pkt_desc) = logical channel #0 RX ring
  13 * tx_ring_buffers * sizeof(pkt_desc) = logical channel #0 TX ring
  14 * rx_ring_buffers * sizeof(pkt_desc) = logical channel #1 RX ring (if used)
  15 * tx_ring_buffers * sizeof(pkt_desc) = logical channel #1 TX ring (if used)
  16 *
  17 * Packet data buffers - starting from card->rambase + buff_offset:
  18 * rx_ring_buffers * HDLC_MAX_MRU     = logical channel #0 RX buffers
  19 * tx_ring_buffers * HDLC_MAX_MRU     = logical channel #0 TX buffers
  20 * rx_ring_buffers * HDLC_MAX_MRU     = logical channel #0 RX buffers (if used)
  21 * tx_ring_buffers * HDLC_MAX_MRU     = logical channel #0 TX buffers (if used)
  22 */
  23
  24#include <linux/bitops.h>
  25#include <linux/errno.h>
  26#include <linux/fcntl.h>
  27#include <linux/hdlc.h>
  28#include <linux/in.h>
  29#include <linux/interrupt.h>
  30#include <linux/ioport.h>
  31#include <linux/jiffies.h>
  32#include <linux/kernel.h>
  33#include <linux/module.h>
  34#include <linux/netdevice.h>
  35#include <linux/skbuff.h>
  36#include <linux/string.h>
  37#include <linux/types.h>
  38#include <asm/io.h>
  39#include <linux/uaccess.h>
  40#include "hd64572.h"
  41
  42#define NAPI_WEIGHT             16
  43
  44#define get_msci(port)    ((port)->chan ?   MSCI1_OFFSET :   MSCI0_OFFSET)
  45#define get_dmac_rx(port) ((port)->chan ? DMAC1RX_OFFSET : DMAC0RX_OFFSET)
  46#define get_dmac_tx(port) ((port)->chan ? DMAC1TX_OFFSET : DMAC0TX_OFFSET)
  47
  48#define sca_in(reg, card)            readb((card)->scabase + (reg))
  49#define sca_out(value, reg, card)    writeb(value, (card)->scabase + (reg))
  50#define sca_inw(reg, card)           readw((card)->scabase + (reg))
  51#define sca_outw(value, reg, card)   writew(value, (card)->scabase + (reg))
  52#define sca_inl(reg, card)           readl((card)->scabase + (reg))
  53#define sca_outl(value, reg, card)   writel(value, (card)->scabase + (reg))
  54
  55static int sca_poll(struct napi_struct *napi, int budget);
  56
  57static inline port_t *dev_to_port(struct net_device *dev)
  58{
  59        return dev_to_hdlc(dev)->priv;
  60}
  61
  62static inline void enable_intr(port_t *port)
  63{
  64        /* enable DMIB and MSCI RXINTA interrupts */
  65        sca_outl(sca_inl(IER0, port->card) |
  66                 (port->chan ? 0x08002200 : 0x00080022), IER0, port->card);
  67}
  68
  69static inline void disable_intr(port_t *port)
  70{
  71        sca_outl(sca_inl(IER0, port->card) &
  72                 (port->chan ? 0x00FF00FF : 0xFF00FF00), IER0, port->card);
  73}
  74
  75static inline u16 desc_abs_number(port_t *port, u16 desc, int transmit)
  76{
  77        u16 rx_buffs = port->card->rx_ring_buffers;
  78        u16 tx_buffs = port->card->tx_ring_buffers;
  79
  80        desc %= (transmit ? tx_buffs : rx_buffs); // called with "X + 1" etc.
  81        return port->chan * (rx_buffs + tx_buffs) + transmit * rx_buffs + desc;
  82}
  83
  84static inline u16 desc_offset(port_t *port, u16 desc, int transmit)
  85{
  86        /* Descriptor offset always fits in 16 bits */
  87        return desc_abs_number(port, desc, transmit) * sizeof(pkt_desc);
  88}
  89
  90static inline pkt_desc __iomem *desc_address(port_t *port, u16 desc,
  91                                             int transmit)
  92{
  93        return (pkt_desc __iomem *)(port->card->rambase +
  94                                    desc_offset(port, desc, transmit));
  95}
  96
  97static inline u32 buffer_offset(port_t *port, u16 desc, int transmit)
  98{
  99        return port->card->buff_offset +
 100                desc_abs_number(port, desc, transmit) * (u32)HDLC_MAX_MRU;
 101}
 102
 103static inline void sca_set_carrier(port_t *port)
 104{
 105        if (!(sca_in(get_msci(port) + ST3, port->card) & ST3_DCD)) {
 106#ifdef DEBUG_LINK
 107                printk(KERN_DEBUG "%s: sca_set_carrier on\n",
 108                       port->netdev.name);
 109#endif
 110                netif_carrier_on(port->netdev);
 111        } else {
 112#ifdef DEBUG_LINK
 113                printk(KERN_DEBUG "%s: sca_set_carrier off\n",
 114                       port->netdev.name);
 115#endif
 116                netif_carrier_off(port->netdev);
 117        }
 118}
 119
 120static void sca_init_port(port_t *port)
 121{
 122        card_t *card = port->card;
 123        u16 dmac_rx = get_dmac_rx(port), dmac_tx = get_dmac_tx(port);
 124        int transmit, i;
 125
 126        port->rxin = 0;
 127        port->txin = 0;
 128        port->txlast = 0;
 129
 130        for (transmit = 0; transmit < 2; transmit++) {
 131                u16 buffs = transmit ? card->tx_ring_buffers
 132                        : card->rx_ring_buffers;
 133
 134                for (i = 0; i < buffs; i++) {
 135                        pkt_desc __iomem *desc = desc_address(port, i, transmit);
 136                        u16 chain_off = desc_offset(port, i + 1, transmit);
 137                        u32 buff_off = buffer_offset(port, i, transmit);
 138
 139                        writel(chain_off, &desc->cp);
 140                        writel(buff_off, &desc->bp);
 141                        writew(0, &desc->len);
 142                        writeb(0, &desc->stat);
 143                }
 144        }
 145
 146        /* DMA disable - to halt state */
 147        sca_out(0, DSR_RX(port->chan), card);
 148        sca_out(0, DSR_TX(port->chan), card);
 149
 150        /* software ABORT - to initial state */
 151        sca_out(DCR_ABORT, DCR_RX(port->chan), card);
 152        sca_out(DCR_ABORT, DCR_TX(port->chan), card);
 153
 154        /* current desc addr */
 155        sca_outl(desc_offset(port, 0, 0), dmac_rx + CDAL, card);
 156        sca_outl(desc_offset(port, card->tx_ring_buffers - 1, 0),
 157                 dmac_rx + EDAL, card);
 158        sca_outl(desc_offset(port, 0, 1), dmac_tx + CDAL, card);
 159        sca_outl(desc_offset(port, 0, 1), dmac_tx + EDAL, card);
 160
 161        /* clear frame end interrupt counter */
 162        sca_out(DCR_CLEAR_EOF, DCR_RX(port->chan), card);
 163        sca_out(DCR_CLEAR_EOF, DCR_TX(port->chan), card);
 164
 165        /* Receive */
 166        sca_outw(HDLC_MAX_MRU, dmac_rx + BFLL, card); /* set buffer length */
 167        sca_out(0x14, DMR_RX(port->chan), card); /* Chain mode, Multi-frame */
 168        sca_out(DIR_EOME, DIR_RX(port->chan), card); /* enable interrupts */
 169        sca_out(DSR_DE, DSR_RX(port->chan), card); /* DMA enable */
 170
 171        /* Transmit */
 172        sca_out(0x14, DMR_TX(port->chan), card); /* Chain mode, Multi-frame */
 173        sca_out(DIR_EOME, DIR_TX(port->chan), card); /* enable interrupts */
 174
 175        sca_set_carrier(port);
 176        netif_napi_add(port->netdev, &port->napi, sca_poll, NAPI_WEIGHT);
 177}
 178
 179/* MSCI interrupt service */
 180static inline void sca_msci_intr(port_t *port)
 181{
 182        u16 msci = get_msci(port);
 183        card_t *card = port->card;
 184
 185        if (sca_in(msci + ST1, card) & ST1_CDCD) {
 186                /* Reset MSCI CDCD status bit */
 187                sca_out(ST1_CDCD, msci + ST1, card);
 188                sca_set_carrier(port);
 189        }
 190}
 191
 192static inline void sca_rx(card_t *card, port_t *port, pkt_desc __iomem *desc,
 193                          u16 rxin)
 194{
 195        struct net_device *dev = port->netdev;
 196        struct sk_buff *skb;
 197        u16 len;
 198        u32 buff;
 199
 200        len = readw(&desc->len);
 201        skb = dev_alloc_skb(len);
 202        if (!skb) {
 203                dev->stats.rx_dropped++;
 204                return;
 205        }
 206
 207        buff = buffer_offset(port, rxin, 0);
 208        memcpy_fromio(skb->data, card->rambase + buff, len);
 209
 210        skb_put(skb, len);
 211#ifdef DEBUG_PKT
 212        printk(KERN_DEBUG "%s RX(%i):", dev->name, skb->len);
 213        debug_frame(skb);
 214#endif
 215        dev->stats.rx_packets++;
 216        dev->stats.rx_bytes += skb->len;
 217        skb->protocol = hdlc_type_trans(skb, dev);
 218        netif_receive_skb(skb);
 219}
 220
 221/* Receive DMA service */
 222static inline int sca_rx_done(port_t *port, int budget)
 223{
 224        struct net_device *dev = port->netdev;
 225        u16 dmac = get_dmac_rx(port);
 226        card_t *card = port->card;
 227        u8 stat = sca_in(DSR_RX(port->chan), card); /* read DMA Status */
 228        int received = 0;
 229
 230        /* Reset DSR status bits */
 231        sca_out((stat & (DSR_EOT | DSR_EOM | DSR_BOF | DSR_COF)) | DSR_DWE,
 232                DSR_RX(port->chan), card);
 233
 234        if (stat & DSR_BOF)
 235                /* Dropped one or more frames */
 236                dev->stats.rx_over_errors++;
 237
 238        while (received < budget) {
 239                u32 desc_off = desc_offset(port, port->rxin, 0);
 240                pkt_desc __iomem *desc;
 241                u32 cda = sca_inl(dmac + CDAL, card);
 242
 243                if ((cda >= desc_off) && (cda < desc_off + sizeof(pkt_desc)))
 244                        break;  /* No frame received */
 245
 246                desc = desc_address(port, port->rxin, 0);
 247                stat = readb(&desc->stat);
 248                if (!(stat & ST_RX_EOM))
 249                        port->rxpart = 1; /* partial frame received */
 250                else if ((stat & ST_ERROR_MASK) || port->rxpart) {
 251                        dev->stats.rx_errors++;
 252                        if (stat & ST_RX_OVERRUN)
 253                                dev->stats.rx_fifo_errors++;
 254                        else if ((stat & (ST_RX_SHORT | ST_RX_ABORT |
 255                                          ST_RX_RESBIT)) || port->rxpart)
 256                                dev->stats.rx_frame_errors++;
 257                        else if (stat & ST_RX_CRC)
 258                                dev->stats.rx_crc_errors++;
 259                        if (stat & ST_RX_EOM)
 260                                port->rxpart = 0; /* received last fragment */
 261                } else {
 262                        sca_rx(card, port, desc, port->rxin);
 263                        received++;
 264                }
 265
 266                /* Set new error descriptor address */
 267                sca_outl(desc_off, dmac + EDAL, card);
 268                port->rxin = (port->rxin + 1) % card->rx_ring_buffers;
 269        }
 270
 271        /* make sure RX DMA is enabled */
 272        sca_out(DSR_DE, DSR_RX(port->chan), card);
 273        return received;
 274}
 275
 276/* Transmit DMA service */
 277static inline void sca_tx_done(port_t *port)
 278{
 279        struct net_device *dev = port->netdev;
 280        card_t *card = port->card;
 281        u8 stat;
 282        unsigned count = 0;
 283
 284        spin_lock(&port->lock);
 285
 286        stat = sca_in(DSR_TX(port->chan), card); /* read DMA Status */
 287
 288        /* Reset DSR status bits */
 289        sca_out((stat & (DSR_EOT | DSR_EOM | DSR_BOF | DSR_COF)) | DSR_DWE,
 290                DSR_TX(port->chan), card);
 291
 292        while (1) {
 293                pkt_desc __iomem *desc = desc_address(port, port->txlast, 1);
 294                u8 stat = readb(&desc->stat);
 295
 296                if (!(stat & ST_TX_OWNRSHP))
 297                        break; /* not yet transmitted */
 298                if (stat & ST_TX_UNDRRUN) {
 299                        dev->stats.tx_errors++;
 300                        dev->stats.tx_fifo_errors++;
 301                } else {
 302                        dev->stats.tx_packets++;
 303                        dev->stats.tx_bytes += readw(&desc->len);
 304                }
 305                writeb(0, &desc->stat); /* Free descriptor */
 306                count++;
 307                port->txlast = (port->txlast + 1) % card->tx_ring_buffers;
 308        }
 309
 310        if (count)
 311                netif_wake_queue(dev);
 312        spin_unlock(&port->lock);
 313}
 314
 315static int sca_poll(struct napi_struct *napi, int budget)
 316{
 317        port_t *port = container_of(napi, port_t, napi);
 318        u32 isr0 = sca_inl(ISR0, port->card);
 319        int received = 0;
 320
 321        if (isr0 & (port->chan ? 0x08000000 : 0x00080000))
 322                sca_msci_intr(port);
 323
 324        if (isr0 & (port->chan ? 0x00002000 : 0x00000020))
 325                sca_tx_done(port);
 326
 327        if (isr0 & (port->chan ? 0x00000200 : 0x00000002))
 328                received = sca_rx_done(port, budget);
 329
 330        if (received < budget) {
 331                napi_complete_done(napi, received);
 332                enable_intr(port);
 333        }
 334
 335        return received;
 336}
 337
 338static irqreturn_t sca_intr(int irq, void *dev_id)
 339{
 340        card_t *card = dev_id;
 341        u32 isr0 = sca_inl(ISR0, card);
 342        int i, handled = 0;
 343
 344        for (i = 0; i < 2; i++) {
 345                port_t *port = get_port(card, i);
 346                if (port && (isr0 & (i ? 0x08002200 : 0x00080022))) {
 347                        handled = 1;
 348                        disable_intr(port);
 349                        napi_schedule(&port->napi);
 350                }
 351        }
 352
 353        return IRQ_RETVAL(handled);
 354}
 355
 356static void sca_set_port(port_t *port)
 357{
 358        card_t *card = port->card;
 359        u16 msci = get_msci(port);
 360        u8 md2 = sca_in(msci + MD2, card);
 361        unsigned int tmc, br = 10, brv = 1024;
 362
 363        if (port->settings.clock_rate > 0) {
 364                /* Try lower br for better accuracy*/
 365                do {
 366                        br--;
 367                        brv >>= 1; /* brv = 2^9 = 512 max in specs */
 368
 369                        /* Baud Rate = CLOCK_BASE / TMC / 2^BR */
 370                        tmc = CLOCK_BASE / brv / port->settings.clock_rate;
 371                } while (br > 1 && tmc <= 128);
 372
 373                if (tmc < 1) {
 374                        tmc = 1;
 375                        br = 0; /* For baud=CLOCK_BASE we use tmc=1 br=0 */
 376                        brv = 1;
 377                } else if (tmc > 255) {
 378                        tmc = 256; /* tmc=0 means 256 - low baud rates */
 379                }
 380
 381                port->settings.clock_rate = CLOCK_BASE / brv / tmc;
 382        } else {
 383                br = 9; /* Minimum clock rate */
 384                tmc = 256;      /* 8bit = 0 */
 385                port->settings.clock_rate = CLOCK_BASE / (256 * 512);
 386        }
 387
 388        port->rxs = (port->rxs & ~CLK_BRG_MASK) | br;
 389        port->txs = (port->txs & ~CLK_BRG_MASK) | br;
 390        port->tmc = tmc;
 391
 392        /* baud divisor - time constant*/
 393        sca_out(port->tmc, msci + TMCR, card);
 394        sca_out(port->tmc, msci + TMCT, card);
 395
 396        /* Set BRG bits */
 397        sca_out(port->rxs, msci + RXS, card);
 398        sca_out(port->txs, msci + TXS, card);
 399
 400        if (port->settings.loopback)
 401                md2 |= MD2_LOOPBACK;
 402        else
 403                md2 &= ~MD2_LOOPBACK;
 404
 405        sca_out(md2, msci + MD2, card);
 406}
 407
 408static void sca_open(struct net_device *dev)
 409{
 410        port_t *port = dev_to_port(dev);
 411        card_t *card = port->card;
 412        u16 msci = get_msci(port);
 413        u8 md0, md2;
 414
 415        switch (port->encoding) {
 416        case ENCODING_NRZ:
 417                md2 = MD2_NRZ;
 418                break;
 419        case ENCODING_NRZI:
 420                md2 = MD2_NRZI;
 421                break;
 422        case ENCODING_FM_MARK:
 423                md2 = MD2_FM_MARK;
 424                break;
 425        case ENCODING_FM_SPACE:
 426                md2 = MD2_FM_SPACE;
 427                break;
 428        default:
 429                md2 = MD2_MANCHESTER;
 430        }
 431
 432        if (port->settings.loopback)
 433                md2 |= MD2_LOOPBACK;
 434
 435        switch (port->parity) {
 436        case PARITY_CRC16_PR0:
 437                md0 = MD0_HDLC | MD0_CRC_16_0;
 438                break;
 439        case PARITY_CRC16_PR1:
 440                md0 = MD0_HDLC | MD0_CRC_16;
 441                break;
 442        case PARITY_CRC32_PR1_CCITT:
 443                md0 = MD0_HDLC | MD0_CRC_ITU32;
 444                break;
 445        case PARITY_CRC16_PR1_CCITT:
 446                md0 = MD0_HDLC | MD0_CRC_ITU;
 447                break;
 448        default:
 449                md0 = MD0_HDLC | MD0_CRC_NONE;
 450        }
 451
 452        sca_out(CMD_RESET, msci + CMD, card);
 453        sca_out(md0, msci + MD0, card);
 454        sca_out(0x00, msci + MD1, card); /* no address field check */
 455        sca_out(md2, msci + MD2, card);
 456        sca_out(0x7E, msci + IDL, card); /* flag character 0x7E */
 457        /* Skip the rest of underrun frame */
 458        sca_out(CTL_IDLE | CTL_URCT | CTL_URSKP, msci + CTL, card);
 459        sca_out(0x0F, msci + RNR, card); /* +1=RX DMA activation condition */
 460        sca_out(0x3C, msci + TFS, card); /* +1 = TX start */
 461        sca_out(0x38, msci + TCR, card); /* =Critical TX DMA activ condition */
 462        sca_out(0x38, msci + TNR0, card); /* =TX DMA activation condition */
 463        sca_out(0x3F, msci + TNR1, card); /* +1=TX DMA deactivation condition*/
 464
 465/* We're using the following interrupts:
 466   - RXINTA (DCD changes only)
 467   - DMIB (EOM - single frame transfer complete)
 468*/
 469        sca_outl(IE0_RXINTA | IE0_CDCD, msci + IE0, card);
 470
 471        sca_out(port->tmc, msci + TMCR, card);
 472        sca_out(port->tmc, msci + TMCT, card);
 473        sca_out(port->rxs, msci + RXS, card);
 474        sca_out(port->txs, msci + TXS, card);
 475        sca_out(CMD_TX_ENABLE, msci + CMD, card);
 476        sca_out(CMD_RX_ENABLE, msci + CMD, card);
 477
 478        sca_set_carrier(port);
 479        enable_intr(port);
 480        napi_enable(&port->napi);
 481        netif_start_queue(dev);
 482}
 483
 484static void sca_close(struct net_device *dev)
 485{
 486        port_t *port = dev_to_port(dev);
 487
 488        /* reset channel */
 489        sca_out(CMD_RESET, get_msci(port) + CMD, port->card);
 490        disable_intr(port);
 491        napi_disable(&port->napi);
 492        netif_stop_queue(dev);
 493}
 494
 495static int sca_attach(struct net_device *dev, unsigned short encoding,
 496                      unsigned short parity)
 497{
 498        if (encoding != ENCODING_NRZ &&
 499            encoding != ENCODING_NRZI &&
 500            encoding != ENCODING_FM_MARK &&
 501            encoding != ENCODING_FM_SPACE &&
 502            encoding != ENCODING_MANCHESTER)
 503                return -EINVAL;
 504
 505        if (parity != PARITY_NONE &&
 506            parity != PARITY_CRC16_PR0 &&
 507            parity != PARITY_CRC16_PR1 &&
 508            parity != PARITY_CRC32_PR1_CCITT &&
 509            parity != PARITY_CRC16_PR1_CCITT)
 510                return -EINVAL;
 511
 512        dev_to_port(dev)->encoding = encoding;
 513        dev_to_port(dev)->parity = parity;
 514        return 0;
 515}
 516
 517#ifdef DEBUG_RINGS
 518static void sca_dump_rings(struct net_device *dev)
 519{
 520        port_t *port = dev_to_port(dev);
 521        card_t *card = port->card;
 522        u16 cnt;
 523
 524        printk(KERN_DEBUG "RX ring: CDA=%u EDA=%u DSR=%02X in=%u %sactive",
 525               sca_inl(get_dmac_rx(port) + CDAL, card),
 526               sca_inl(get_dmac_rx(port) + EDAL, card),
 527               sca_in(DSR_RX(port->chan), card), port->rxin,
 528               sca_in(DSR_RX(port->chan), card) & DSR_DE ? "" : "in");
 529        for (cnt = 0; cnt < port->card->rx_ring_buffers; cnt++)
 530                pr_cont(" %02X", readb(&(desc_address(port, cnt, 0)->stat)));
 531        pr_cont("\n");
 532
 533        printk(KERN_DEBUG "TX ring: CDA=%u EDA=%u DSR=%02X in=%u "
 534               "last=%u %sactive",
 535               sca_inl(get_dmac_tx(port) + CDAL, card),
 536               sca_inl(get_dmac_tx(port) + EDAL, card),
 537               sca_in(DSR_TX(port->chan), card), port->txin, port->txlast,
 538               sca_in(DSR_TX(port->chan), card) & DSR_DE ? "" : "in");
 539
 540        for (cnt = 0; cnt < port->card->tx_ring_buffers; cnt++)
 541                pr_cont(" %02X", readb(&(desc_address(port, cnt, 1)->stat)));
 542        pr_cont("\n");
 543
 544        printk(KERN_DEBUG "MSCI: MD: %02x %02x %02x,"
 545               " ST: %02x %02x %02x %02x %02x, FST: %02x CST: %02x %02x\n",
 546               sca_in(get_msci(port) + MD0, card),
 547               sca_in(get_msci(port) + MD1, card),
 548               sca_in(get_msci(port) + MD2, card),
 549               sca_in(get_msci(port) + ST0, card),
 550               sca_in(get_msci(port) + ST1, card),
 551               sca_in(get_msci(port) + ST2, card),
 552               sca_in(get_msci(port) + ST3, card),
 553               sca_in(get_msci(port) + ST4, card),
 554               sca_in(get_msci(port) + FST, card),
 555               sca_in(get_msci(port) + CST0, card),
 556               sca_in(get_msci(port) + CST1, card));
 557
 558        printk(KERN_DEBUG "ILAR: %02x ISR: %08x %08x\n", sca_in(ILAR, card),
 559               sca_inl(ISR0, card), sca_inl(ISR1, card));
 560}
 561#endif /* DEBUG_RINGS */
 562
 563static netdev_tx_t sca_xmit(struct sk_buff *skb, struct net_device *dev)
 564{
 565        port_t *port = dev_to_port(dev);
 566        card_t *card = port->card;
 567        pkt_desc __iomem *desc;
 568        u32 buff, len;
 569
 570        spin_lock_irq(&port->lock);
 571
 572        desc = desc_address(port, port->txin + 1, 1);
 573        BUG_ON(readb(&desc->stat)); /* previous xmit should stop queue */
 574
 575#ifdef DEBUG_PKT
 576        printk(KERN_DEBUG "%s TX(%i):", dev->name, skb->len);
 577        debug_frame(skb);
 578#endif
 579
 580        desc = desc_address(port, port->txin, 1);
 581        buff = buffer_offset(port, port->txin, 1);
 582        len = skb->len;
 583        memcpy_toio(card->rambase + buff, skb->data, len);
 584
 585        writew(len, &desc->len);
 586        writeb(ST_TX_EOM, &desc->stat);
 587
 588        port->txin = (port->txin + 1) % card->tx_ring_buffers;
 589        sca_outl(desc_offset(port, port->txin, 1),
 590                 get_dmac_tx(port) + EDAL, card);
 591
 592        sca_out(DSR_DE, DSR_TX(port->chan), card); /* Enable TX DMA */
 593
 594        desc = desc_address(port, port->txin + 1, 1);
 595        if (readb(&desc->stat)) /* allow 1 packet gap */
 596                netif_stop_queue(dev);
 597
 598        spin_unlock_irq(&port->lock);
 599
 600        dev_kfree_skb(skb);
 601        return NETDEV_TX_OK;
 602}
 603
 604static u32 sca_detect_ram(card_t *card, u8 __iomem *rambase, u32 ramsize)
 605{
 606        /* Round RAM size to 32 bits, fill from end to start */
 607        u32 i = ramsize &= ~3;
 608
 609        do {
 610                i -= 4;
 611                writel(i ^ 0x12345678, rambase + i);
 612        } while (i > 0);
 613
 614        for (i = 0; i < ramsize ; i += 4) {
 615                if (readl(rambase + i) != (i ^ 0x12345678))
 616                        break;
 617        }
 618
 619        return i;
 620}
 621
 622static void sca_init(card_t *card, int wait_states)
 623{
 624        sca_out(wait_states, WCRL, card); /* Wait Control */
 625        sca_out(wait_states, WCRM, card);
 626        sca_out(wait_states, WCRH, card);
 627
 628        sca_out(0, DMER, card); /* DMA Master disable */
 629        sca_out(0x03, PCR, card); /* DMA priority */
 630        sca_out(0, DSR_RX(0), card); /* DMA disable - to halt state */
 631        sca_out(0, DSR_TX(0), card);
 632        sca_out(0, DSR_RX(1), card);
 633        sca_out(0, DSR_TX(1), card);
 634        sca_out(DMER_DME, DMER, card); /* DMA Master enable */
 635}
 636