LXR linux/drivers/net/wan/pc300too.c

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Cyclades PC300 synchronous serial card driver for Linux
   4 *
   5 * Copyright (C) 2000-2008 Krzysztof Halasa <khc@pm.waw.pl>
   6 *
   7 * For information see <https://www.kernel.org/pub/linux/utils/net/hdlc/>.
   8 *
   9 * Sources of information:
  10 *    Hitachi HD64572 SCA-II User's Manual
  11 *    Original Cyclades PC300 Linux driver
  12 *
  13 * This driver currently supports only PC300/RSV (V.24/V.35) and
  14 * PC300/X21 cards.
  15 */
  16
  17#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  18
  19#include <linux/module.h>
  20#include <linux/kernel.h>
  21#include <linux/slab.h>
  22#include <linux/sched.h>
  23#include <linux/types.h>
  24#include <linux/fcntl.h>
  25#include <linux/in.h>
  26#include <linux/string.h>
  27#include <linux/errno.h>
  28#include <linux/init.h>
  29#include <linux/ioport.h>
  30#include <linux/moduleparam.h>
  31#include <linux/netdevice.h>
  32#include <linux/hdlc.h>
  33#include <linux/pci.h>
  34#include <linux/delay.h>
  35#include <asm/io.h>
  36
  37#include "hd64572.h"
  38
  39#undef DEBUG_PKT
  40#define DEBUG_RINGS
  41
  42#define PC300_PLX_SIZE          0x80    /* PLX control window size (128 B) */
  43#define PC300_SCA_SIZE          0x400   /* SCA window size (1 KB) */
  44#define MAX_TX_BUFFERS          10
  45
  46static int pci_clock_freq = 33000000;
  47static int use_crystal_clock;
  48static unsigned int CLOCK_BASE;
  49
  50/* Masks to access the init_ctrl PLX register */
  51#define PC300_CLKSEL_MASK        (0x00000004UL)
  52#define PC300_CHMEDIA_MASK(port) (0x00000020UL << ((port) * 3))
  53#define PC300_CTYPE_MASK         (0x00000800UL)
  54
  55enum { PC300_RSV = 1, PC300_X21, PC300_TE }; /* card types */
  56
  57/*      PLX PCI9050-1 local configuration and shared runtime registers.
  58 *      This structure can be used to access 9050 registers (memory mapped).
  59 */
  60typedef struct {
  61        u32 loc_addr_range[4];  /* 00-0Ch : Local Address Ranges */
  62        u32 loc_rom_range;      /* 10h : Local ROM Range */
  63        u32 loc_addr_base[4];   /* 14-20h : Local Address Base Addrs */
  64        u32 loc_rom_base;       /* 24h : Local ROM Base */
  65        u32 loc_bus_descr[4];   /* 28-34h : Local Bus Descriptors */
  66        u32 rom_bus_descr;      /* 38h : ROM Bus Descriptor */
  67        u32 cs_base[4];         /* 3C-48h : Chip Select Base Addrs */
  68        u32 intr_ctrl_stat;     /* 4Ch : Interrupt Control/Status */
  69        u32 init_ctrl;          /* 50h : EEPROM ctrl, Init Ctrl, etc */
  70} plx9050;
  71
  72typedef struct port_s {
  73        struct napi_struct napi;
  74        struct net_device *netdev;
  75        struct card_s *card;
  76        spinlock_t lock;        /* TX lock */
  77        sync_serial_settings settings;
  78        int rxpart;             /* partial frame received, next frame invalid*/
  79        unsigned short encoding;
  80        unsigned short parity;
  81        unsigned int iface;
  82        u16 rxin;               /* rx ring buffer 'in' pointer */
  83        u16 txin;               /* tx ring buffer 'in' and 'last' pointers */
  84        u16 txlast;
  85        u8 rxs, txs, tmc;       /* SCA registers */
  86        u8 chan;                /* physical port # - 0 or 1 */
  87} port_t;
  88
  89typedef struct card_s {
  90        int type;               /* RSV, X21, etc. */
  91        int n_ports;            /* 1 or 2 ports */
  92        u8 __iomem *rambase;    /* buffer memory base (virtual) */
  93        u8 __iomem *scabase;    /* SCA memory base (virtual) */
  94        plx9050 __iomem *plxbase; /* PLX registers memory base (virtual) */
  95        u32 init_ctrl_value;    /* Saved value - 9050 bug workaround */
  96        u16 rx_ring_buffers;    /* number of buffers in a ring */
  97        u16 tx_ring_buffers;
  98        u16 buff_offset;        /* offset of first buffer of first channel */
  99        u8 irq;                 /* interrupt request level */
 100
 101        port_t ports[2];
 102} card_t;
 103
 104#define get_port(card, port)         ((port) < (card)->n_ports ? \
 105                                         (&(card)->ports[port]) : (NULL))
 106
 107#include "hd64572.c"
 108
 109static void pc300_set_iface(port_t *port)
 110{
 111        card_t *card = port->card;
 112        u32 __iomem *init_ctrl = &card->plxbase->init_ctrl;
 113        u16 msci = get_msci(port);
 114        u8 rxs = port->rxs & CLK_BRG_MASK;
 115        u8 txs = port->txs & CLK_BRG_MASK;
 116
 117        sca_out(EXS_TES1, (port->chan ? MSCI1_OFFSET : MSCI0_OFFSET) + EXS,
 118                port->card);
 119        switch (port->settings.clock_type) {
 120        case CLOCK_INT:
 121                rxs |= CLK_BRG; /* BRG output */
 122                txs |= CLK_PIN_OUT | CLK_TX_RXCLK; /* RX clock */
 123                break;
 124
 125        case CLOCK_TXINT:
 126                rxs |= CLK_LINE; /* RXC input */
 127                txs |= CLK_PIN_OUT | CLK_BRG; /* BRG output */
 128                break;
 129
 130        case CLOCK_TXFROMRX:
 131                rxs |= CLK_LINE; /* RXC input */
 132                txs |= CLK_PIN_OUT | CLK_TX_RXCLK; /* RX clock */
 133                break;
 134
 135        default:                /* EXTernal clock */
 136                rxs |= CLK_LINE; /* RXC input */
 137                txs |= CLK_PIN_OUT | CLK_LINE; /* TXC input */
 138                break;
 139        }
 140
 141        port->rxs = rxs;
 142        port->txs = txs;
 143        sca_out(rxs, msci + RXS, card);
 144        sca_out(txs, msci + TXS, card);
 145        sca_set_port(port);
 146
 147        if (port->card->type == PC300_RSV) {
 148                if (port->iface == IF_IFACE_V35)
 149                        writel(card->init_ctrl_value |
 150                               PC300_CHMEDIA_MASK(port->chan), init_ctrl);
 151                else
 152                        writel(card->init_ctrl_value &
 153                               ~PC300_CHMEDIA_MASK(port->chan), init_ctrl);
 154        }
 155}
 156
 157static int pc300_open(struct net_device *dev)
 158{
 159        port_t *port = dev_to_port(dev);
 160        int result = hdlc_open(dev);
 161
 162        if (result)
 163                return result;
 164
 165        sca_open(dev);
 166        pc300_set_iface(port);
 167        return 0;
 168}
 169
 170static int pc300_close(struct net_device *dev)
 171{
 172        sca_close(dev);
 173        hdlc_close(dev);
 174        return 0;
 175}
 176
 177static int pc300_siocdevprivate(struct net_device *dev, struct ifreq *ifr,
 178                                void __user *data, int cmd)
 179{
 180#ifdef DEBUG_RINGS
 181        if (cmd == SIOCDEVPRIVATE) {
 182                sca_dump_rings(dev);
 183                return 0;
 184        }
 185#endif
 186        return -EOPNOTSUPP;
 187}
 188
 189static int pc300_ioctl(struct net_device *dev, struct if_settings *ifs)
 190{
 191        const size_t size = sizeof(sync_serial_settings);
 192        sync_serial_settings new_line;
 193        sync_serial_settings __user *line = ifs->ifs_ifsu.sync;
 194        int new_type;
 195        port_t *port = dev_to_port(dev);
 196
 197        if (ifs->type == IF_GET_IFACE) {
 198                ifs->type = port->iface;
 199                if (ifs->size < size) {
 200                        ifs->size = size; /* data size wanted */
 201                        return -ENOBUFS;
 202                }
 203                if (copy_to_user(line, &port->settings, size))
 204                        return -EFAULT;
 205                return 0;
 206        }
 207
 208        if (port->card->type == PC300_X21 &&
 209            (ifs->type == IF_IFACE_SYNC_SERIAL ||
 210             ifs->type == IF_IFACE_X21))
 211                new_type = IF_IFACE_X21;
 212
 213        else if (port->card->type == PC300_RSV &&
 214                 (ifs->type == IF_IFACE_SYNC_SERIAL ||
 215                  ifs->type == IF_IFACE_V35))
 216                new_type = IF_IFACE_V35;
 217
 218        else if (port->card->type == PC300_RSV &&
 219                 ifs->type == IF_IFACE_V24)
 220                new_type = IF_IFACE_V24;
 221
 222        else
 223                return hdlc_ioctl(dev, ifs);
 224
 225        if (!capable(CAP_NET_ADMIN))
 226                return -EPERM;
 227
 228        if (copy_from_user(&new_line, line, size))
 229                return -EFAULT;
 230
 231        if (new_line.clock_type != CLOCK_EXT &&
 232            new_line.clock_type != CLOCK_TXFROMRX &&
 233            new_line.clock_type != CLOCK_INT &&
 234            new_line.clock_type != CLOCK_TXINT)
 235                return -EINVAL; /* No such clock setting */
 236
 237        if (new_line.loopback != 0 && new_line.loopback != 1)
 238                return -EINVAL;
 239
 240        memcpy(&port->settings, &new_line, size); /* Update settings */
 241        port->iface = new_type;
 242        pc300_set_iface(port);
 243        return 0;
 244}
 245
 246static void pc300_pci_remove_one(struct pci_dev *pdev)
 247{
 248        int i;
 249        card_t *card = pci_get_drvdata(pdev);
 250
 251        for (i = 0; i < 2; i++)
 252                if (card->ports[i].card)
 253                        unregister_hdlc_device(card->ports[i].netdev);
 254
 255        if (card->irq)
 256                free_irq(card->irq, card);
 257
 258        if (card->rambase)
 259                iounmap(card->rambase);
 260        if (card->scabase)
 261                iounmap(card->scabase);
 262        if (card->plxbase)
 263                iounmap(card->plxbase);
 264
 265        pci_release_regions(pdev);
 266        pci_disable_device(pdev);
 267        if (card->ports[0].netdev)
 268                free_netdev(card->ports[0].netdev);
 269        if (card->ports[1].netdev)
 270                free_netdev(card->ports[1].netdev);
 271        kfree(card);
 272}
 273
 274static const struct net_device_ops pc300_ops = {
 275        .ndo_open       = pc300_open,
 276        .ndo_stop       = pc300_close,
 277        .ndo_start_xmit = hdlc_start_xmit,
 278        .ndo_siocwandev = pc300_ioctl,
 279        .ndo_siocdevprivate = pc300_siocdevprivate,
 280};
 281
 282static int pc300_pci_init_one(struct pci_dev *pdev,
 283                              const struct pci_device_id *ent)
 284{
 285        card_t *card;
 286        u32 __iomem *p;
 287        int i;
 288        u32 ramsize;
 289        u32 ramphys;            /* buffer memory base */
 290        u32 scaphys;            /* SCA memory base */
 291        u32 plxphys;            /* PLX registers memory base */
 292
 293        i = pci_enable_device(pdev);
 294        if (i)
 295                return i;
 296
 297        i = pci_request_regions(pdev, "PC300");
 298        if (i) {
 299                pci_disable_device(pdev);
 300                return i;
 301        }
 302
 303        card = kzalloc(sizeof(card_t), GFP_KERNEL);
 304        if (!card) {
 305                pci_release_regions(pdev);
 306                pci_disable_device(pdev);
 307                return -ENOBUFS;
 308        }
 309        pci_set_drvdata(pdev, card);
 310
 311        if (pci_resource_len(pdev, 0) != PC300_PLX_SIZE ||
 312            pci_resource_len(pdev, 2) != PC300_SCA_SIZE ||
 313            pci_resource_len(pdev, 3) < 16384) {
 314                pr_err("invalid card EEPROM parameters\n");
 315                pc300_pci_remove_one(pdev);
 316                return -EFAULT;
 317        }
 318
 319        plxphys = pci_resource_start(pdev, 0) & PCI_BASE_ADDRESS_MEM_MASK;
 320        card->plxbase = ioremap(plxphys, PC300_PLX_SIZE);
 321
 322        scaphys = pci_resource_start(pdev, 2) & PCI_BASE_ADDRESS_MEM_MASK;
 323        card->scabase = ioremap(scaphys, PC300_SCA_SIZE);
 324
 325        ramphys = pci_resource_start(pdev, 3) & PCI_BASE_ADDRESS_MEM_MASK;
 326        card->rambase = pci_ioremap_bar(pdev, 3);
 327
 328        if (!card->plxbase || !card->scabase || !card->rambase) {
 329                pr_err("ioremap() failed\n");
 330                pc300_pci_remove_one(pdev);
 331                return -ENOMEM;
 332        }
 333
 334        /* PLX PCI 9050 workaround for local configuration register read bug */
 335        pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, scaphys);
 336        card->init_ctrl_value = readl(&((plx9050 __iomem *)card->scabase)->init_ctrl);
 337        pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, plxphys);
 338
 339        if (pdev->device == PCI_DEVICE_ID_PC300_TE_1 ||
 340            pdev->device == PCI_DEVICE_ID_PC300_TE_2)
 341                card->type = PC300_TE; /* not fully supported */
 342        else if (card->init_ctrl_value & PC300_CTYPE_MASK)
 343                card->type = PC300_X21;
 344        else
 345                card->type = PC300_RSV;
 346
 347        if (pdev->device == PCI_DEVICE_ID_PC300_RX_1 ||
 348            pdev->device == PCI_DEVICE_ID_PC300_TE_1)
 349                card->n_ports = 1;
 350        else
 351                card->n_ports = 2;
 352
 353        for (i = 0; i < card->n_ports; i++) {
 354                card->ports[i].netdev = alloc_hdlcdev(&card->ports[i]);
 355                if (!card->ports[i].netdev) {
 356                        pr_err("unable to allocate memory\n");
 357                        pc300_pci_remove_one(pdev);
 358                        return -ENOMEM;
 359                }
 360        }
 361
 362        /* Reset PLX */
 363        p = &card->plxbase->init_ctrl;
 364        writel(card->init_ctrl_value | 0x40000000, p);
 365        readl(p);               /* Flush the write - do not use sca_flush */
 366        udelay(1);
 367
 368        writel(card->init_ctrl_value, p);
 369        readl(p);               /* Flush the write - do not use sca_flush */
 370        udelay(1);
 371
 372        /* Reload Config. Registers from EEPROM */
 373        writel(card->init_ctrl_value | 0x20000000, p);
 374        readl(p);               /* Flush the write - do not use sca_flush */
 375        udelay(1);
 376
 377        writel(card->init_ctrl_value, p);
 378        readl(p);               /* Flush the write - do not use sca_flush */
 379        udelay(1);
 380
 381        ramsize = sca_detect_ram(card, card->rambase,
 382                                 pci_resource_len(pdev, 3));
 383
 384        if (use_crystal_clock)
 385                card->init_ctrl_value &= ~PC300_CLKSEL_MASK;
 386        else
 387                card->init_ctrl_value |= PC300_CLKSEL_MASK;
 388
 389        writel(card->init_ctrl_value, &card->plxbase->init_ctrl);
 390        /* number of TX + RX buffers for one port */
 391        i = ramsize / (card->n_ports * (sizeof(pkt_desc) + HDLC_MAX_MRU));
 392        card->tx_ring_buffers = min(i / 2, MAX_TX_BUFFERS);
 393        card->rx_ring_buffers = i - card->tx_ring_buffers;
 394
 395        card->buff_offset = card->n_ports * sizeof(pkt_desc) *
 396                (card->tx_ring_buffers + card->rx_ring_buffers);
 397
 398        pr_info("PC300/%s, %u KB RAM at 0x%x, IRQ%u, using %u TX + %u RX packets rings\n",
 399                card->type == PC300_X21 ? "X21" :
 400                card->type == PC300_TE ? "TE" : "RSV",
 401                ramsize / 1024, ramphys, pdev->irq,
 402                card->tx_ring_buffers, card->rx_ring_buffers);
 403
 404        if (card->tx_ring_buffers < 1) {
 405                pr_err("RAM test failed\n");
 406                pc300_pci_remove_one(pdev);
 407                return -EFAULT;
 408        }
 409
 410        /* Enable interrupts on the PCI bridge, LINTi1 active low */
 411        writew(0x0041, &card->plxbase->intr_ctrl_stat);
 412
 413        /* Allocate IRQ */
 414        if (request_irq(pdev->irq, sca_intr, IRQF_SHARED, "pc300", card)) {
 415                pr_warn("could not allocate IRQ%d\n", pdev->irq);
 416                pc300_pci_remove_one(pdev);
 417                return -EBUSY;
 418        }
 419        card->irq = pdev->irq;
 420
 421        sca_init(card, 0);
 422
 423        // COTE not set - allows better TX DMA settings
 424        // sca_out(sca_in(PCR, card) | PCR_COTE, PCR, card);
 425
 426        sca_out(0x10, BTCR, card);
 427
 428        for (i = 0; i < card->n_ports; i++) {
 429                port_t *port = &card->ports[i];
 430                struct net_device *dev = port->netdev;
 431                hdlc_device *hdlc = dev_to_hdlc(dev);
 432
 433                port->chan = i;
 434
 435                spin_lock_init(&port->lock);
 436                dev->irq = card->irq;
 437                dev->mem_start = ramphys;
 438                dev->mem_end = ramphys + ramsize - 1;
 439                dev->tx_queue_len = 50;
 440                dev->netdev_ops = &pc300_ops;
 441                hdlc->attach = sca_attach;
 442                hdlc->xmit = sca_xmit;
 443                port->settings.clock_type = CLOCK_EXT;
 444                port->card = card;
 445                if (card->type == PC300_X21)
 446                        port->iface = IF_IFACE_X21;
 447                else
 448                        port->iface = IF_IFACE_V35;
 449
 450                sca_init_port(port);
 451                if (register_hdlc_device(dev)) {
 452                        pr_err("unable to register hdlc device\n");
 453                        port->card = NULL;
 454                        pc300_pci_remove_one(pdev);
 455                        return -ENOBUFS;
 456                }
 457
 458                netdev_info(dev, "PC300 channel %d\n", port->chan);
 459        }
 460        return 0;
 461}
 462
 463static const struct pci_device_id pc300_pci_tbl[] = {
 464        { PCI_VENDOR_ID_CYCLADES, PCI_DEVICE_ID_PC300_RX_1, PCI_ANY_ID,
 465          PCI_ANY_ID, 0, 0, 0 },
 466        { PCI_VENDOR_ID_CYCLADES, PCI_DEVICE_ID_PC300_RX_2, PCI_ANY_ID,
 467          PCI_ANY_ID, 0, 0, 0 },
 468        { PCI_VENDOR_ID_CYCLADES, PCI_DEVICE_ID_PC300_TE_1, PCI_ANY_ID,
 469          PCI_ANY_ID, 0, 0, 0 },
 470        { PCI_VENDOR_ID_CYCLADES, PCI_DEVICE_ID_PC300_TE_2, PCI_ANY_ID,
 471          PCI_ANY_ID, 0, 0, 0 },
 472        { 0, }
 473};
 474
 475static struct pci_driver pc300_pci_driver = {
 476        .name =          "PC300",
 477        .id_table =      pc300_pci_tbl,
 478        .probe =         pc300_pci_init_one,
 479        .remove =        pc300_pci_remove_one,
 480};
 481
 482static int __init pc300_init_module(void)
 483{
 484        if (pci_clock_freq < 1000000 || pci_clock_freq > 80000000) {
 485                pr_err("Invalid PCI clock frequency\n");
 486                return -EINVAL;
 487        }
 488        if (use_crystal_clock != 0 && use_crystal_clock != 1) {
 489                pr_err("Invalid 'use_crystal_clock' value\n");
 490                return -EINVAL;
 491        }
 492
 493        CLOCK_BASE = use_crystal_clock ? 24576000 : pci_clock_freq;
 494
 495        return pci_register_driver(&pc300_pci_driver);
 496}
 497
 498static void __exit pc300_cleanup_module(void)
 499{
 500        pci_unregister_driver(&pc300_pci_driver);
 501}
 502
 503MODULE_AUTHOR("Krzysztof Halasa <khc@pm.waw.pl>");
 504MODULE_DESCRIPTION("Cyclades PC300 serial port driver");
 505MODULE_LICENSE("GPL v2");
 506MODULE_DEVICE_TABLE(pci, pc300_pci_tbl);
 507module_param(pci_clock_freq, int, 0444);
 508MODULE_PARM_DESC(pci_clock_freq, "System PCI clock frequency in Hz");
 509module_param(use_crystal_clock, int, 0444);
 510MODULE_PARM_DESC(use_crystal_clock,
 511                 "Use 24.576 MHz clock instead of PCI clock");
 512module_init(pc300_init_module);
 513module_exit(pc300_cleanup_module);
 514