1
2
3
4
5
6#include "core.h"
7#include "debug.h"
8
9static int ath11k_dbring_bufs_replenish(struct ath11k *ar,
10 struct ath11k_dbring *ring,
11 struct ath11k_dbring_element *buff,
12 gfp_t gfp)
13{
14 struct ath11k_base *ab = ar->ab;
15 struct hal_srng *srng;
16 dma_addr_t paddr;
17 void *ptr_aligned, *ptr_unaligned, *desc;
18 int ret;
19 int buf_id;
20 u32 cookie;
21
22 srng = &ab->hal.srng_list[ring->refill_srng.ring_id];
23
24 lockdep_assert_held(&srng->lock);
25
26 ath11k_hal_srng_access_begin(ab, srng);
27
28 ptr_unaligned = buff->payload;
29 ptr_aligned = PTR_ALIGN(ptr_unaligned, ring->buf_align);
30 paddr = dma_map_single(ab->dev, ptr_aligned, ring->buf_sz,
31 DMA_FROM_DEVICE);
32
33 ret = dma_mapping_error(ab->dev, paddr);
34 if (ret)
35 goto err;
36
37 spin_lock_bh(&ring->idr_lock);
38 buf_id = idr_alloc(&ring->bufs_idr, buff, 0, ring->bufs_max, gfp);
39 spin_unlock_bh(&ring->idr_lock);
40 if (buf_id < 0) {
41 ret = -ENOBUFS;
42 goto err_dma_unmap;
43 }
44
45 desc = ath11k_hal_srng_src_get_next_entry(ab, srng);
46 if (!desc) {
47 ret = -ENOENT;
48 goto err_idr_remove;
49 }
50
51 buff->paddr = paddr;
52
53 cookie = FIELD_PREP(DP_RXDMA_BUF_COOKIE_PDEV_ID, ar->pdev_idx) |
54 FIELD_PREP(DP_RXDMA_BUF_COOKIE_BUF_ID, buf_id);
55
56 ath11k_hal_rx_buf_addr_info_set(desc, paddr, cookie, 0);
57
58 ath11k_hal_srng_access_end(ab, srng);
59
60 return 0;
61
62err_idr_remove:
63 spin_lock_bh(&ring->idr_lock);
64 idr_remove(&ring->bufs_idr, buf_id);
65 spin_unlock_bh(&ring->idr_lock);
66err_dma_unmap:
67 dma_unmap_single(ab->dev, paddr, ring->buf_sz,
68 DMA_FROM_DEVICE);
69err:
70 ath11k_hal_srng_access_end(ab, srng);
71 return ret;
72}
73
74static int ath11k_dbring_fill_bufs(struct ath11k *ar,
75 struct ath11k_dbring *ring,
76 gfp_t gfp)
77{
78 struct ath11k_dbring_element *buff;
79 struct hal_srng *srng;
80 int num_remain, req_entries, num_free;
81 u32 align;
82 int size, ret;
83
84 srng = &ar->ab->hal.srng_list[ring->refill_srng.ring_id];
85
86 spin_lock_bh(&srng->lock);
87
88 num_free = ath11k_hal_srng_src_num_free(ar->ab, srng, true);
89 req_entries = min(num_free, ring->bufs_max);
90 num_remain = req_entries;
91 align = ring->buf_align;
92 size = sizeof(*buff) + ring->buf_sz + align - 1;
93
94 while (num_remain > 0) {
95 buff = kzalloc(size, gfp);
96 if (!buff)
97 break;
98
99 ret = ath11k_dbring_bufs_replenish(ar, ring, buff, gfp);
100 if (ret) {
101 ath11k_warn(ar->ab, "failed to replenish db ring num_remain %d req_ent %d\n",
102 num_remain, req_entries);
103 kfree(buff);
104 break;
105 }
106 num_remain--;
107 }
108
109 spin_unlock_bh(&srng->lock);
110
111 return num_remain;
112}
113
114int ath11k_dbring_wmi_cfg_setup(struct ath11k *ar,
115 struct ath11k_dbring *ring,
116 enum wmi_direct_buffer_module id)
117{
118 struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd param = {0};
119 int ret;
120
121 if (id >= WMI_DIRECT_BUF_MAX)
122 return -EINVAL;
123
124 param.pdev_id = DP_SW2HW_MACID(ring->pdev_id);
125 param.module_id = id;
126 param.base_paddr_lo = lower_32_bits(ring->refill_srng.paddr);
127 param.base_paddr_hi = upper_32_bits(ring->refill_srng.paddr);
128 param.head_idx_paddr_lo = lower_32_bits(ring->hp_addr);
129 param.head_idx_paddr_hi = upper_32_bits(ring->hp_addr);
130 param.tail_idx_paddr_lo = lower_32_bits(ring->tp_addr);
131 param.tail_idx_paddr_hi = upper_32_bits(ring->tp_addr);
132 param.num_elems = ring->bufs_max;
133 param.buf_size = ring->buf_sz;
134 param.num_resp_per_event = ring->num_resp_per_event;
135 param.event_timeout_ms = ring->event_timeout_ms;
136
137 ret = ath11k_wmi_pdev_dma_ring_cfg(ar, ¶m);
138 if (ret) {
139 ath11k_warn(ar->ab, "failed to setup db ring cfg\n");
140 return ret;
141 }
142
143 return 0;
144}
145
146int ath11k_dbring_set_cfg(struct ath11k *ar, struct ath11k_dbring *ring,
147 u32 num_resp_per_event, u32 event_timeout_ms,
148 int (*handler)(struct ath11k *,
149 struct ath11k_dbring_data *))
150{
151 if (WARN_ON(!ring))
152 return -EINVAL;
153
154 ring->num_resp_per_event = num_resp_per_event;
155 ring->event_timeout_ms = event_timeout_ms;
156 ring->handler = handler;
157
158 return 0;
159}
160
161int ath11k_dbring_buf_setup(struct ath11k *ar,
162 struct ath11k_dbring *ring,
163 struct ath11k_dbring_cap *db_cap)
164{
165 struct ath11k_base *ab = ar->ab;
166 struct hal_srng *srng;
167 int ret;
168
169 srng = &ab->hal.srng_list[ring->refill_srng.ring_id];
170 ring->bufs_max = ring->refill_srng.size /
171 ath11k_hal_srng_get_entrysize(ab, HAL_RXDMA_DIR_BUF);
172
173 ring->buf_sz = db_cap->min_buf_sz;
174 ring->buf_align = db_cap->min_buf_align;
175 ring->pdev_id = db_cap->pdev_id;
176 ring->hp_addr = ath11k_hal_srng_get_hp_addr(ar->ab, srng);
177 ring->tp_addr = ath11k_hal_srng_get_tp_addr(ar->ab, srng);
178
179 ret = ath11k_dbring_fill_bufs(ar, ring, GFP_KERNEL);
180
181 return ret;
182}
183
184int ath11k_dbring_srng_setup(struct ath11k *ar, struct ath11k_dbring *ring,
185 int ring_num, int num_entries)
186{
187 int ret;
188
189 ret = ath11k_dp_srng_setup(ar->ab, &ring->refill_srng, HAL_RXDMA_DIR_BUF,
190 ring_num, ar->pdev_idx, num_entries);
191 if (ret < 0) {
192 ath11k_warn(ar->ab, "failed to setup srng: %d ring_id %d\n",
193 ret, ring_num);
194 goto err;
195 }
196
197 return 0;
198err:
199 ath11k_dp_srng_cleanup(ar->ab, &ring->refill_srng);
200 return ret;
201}
202
203int ath11k_dbring_get_cap(struct ath11k_base *ab,
204 u8 pdev_idx,
205 enum wmi_direct_buffer_module id,
206 struct ath11k_dbring_cap *db_cap)
207{
208 int i;
209
210 if (!ab->num_db_cap || !ab->db_caps)
211 return -ENOENT;
212
213 if (id >= WMI_DIRECT_BUF_MAX)
214 return -EINVAL;
215
216 for (i = 0; i < ab->num_db_cap; i++) {
217 if (pdev_idx == ab->db_caps[i].pdev_id &&
218 id == ab->db_caps[i].id) {
219 *db_cap = ab->db_caps[i];
220
221 return 0;
222 }
223 }
224
225 return -ENOENT;
226}
227
228int ath11k_dbring_buffer_release_event(struct ath11k_base *ab,
229 struct ath11k_dbring_buf_release_event *ev)
230{
231 struct ath11k_dbring *ring;
232 struct hal_srng *srng;
233 struct ath11k *ar;
234 struct ath11k_dbring_element *buff;
235 struct ath11k_dbring_data handler_data;
236 struct ath11k_buffer_addr desc;
237 u8 *vaddr_unalign;
238 u32 num_entry, num_buff_reaped;
239 u8 pdev_idx, rbm;
240 u32 cookie;
241 int buf_id;
242 int size;
243 dma_addr_t paddr;
244 int ret = 0;
245
246 pdev_idx = ev->fixed.pdev_id;
247
248 if (pdev_idx >= ab->num_radios) {
249 ath11k_warn(ab, "Invalid pdev id %d\n", pdev_idx);
250 return -EINVAL;
251 }
252
253 if (ev->fixed.num_buf_release_entry !=
254 ev->fixed.num_meta_data_entry) {
255 ath11k_warn(ab, "Buffer entry %d mismatch meta entry %d\n",
256 ev->fixed.num_buf_release_entry,
257 ev->fixed.num_meta_data_entry);
258 return -EINVAL;
259 }
260
261 ar = ab->pdevs[pdev_idx].ar;
262
263 rcu_read_lock();
264 if (!rcu_dereference(ab->pdevs_active[pdev_idx])) {
265 ret = -EINVAL;
266 goto rcu_unlock;
267 }
268
269 switch (ev->fixed.module_id) {
270 case WMI_DIRECT_BUF_SPECTRAL:
271 ring = ath11k_spectral_get_dbring(ar);
272 break;
273 default:
274 ring = NULL;
275 ath11k_warn(ab, "Recv dma buffer release ev on unsupp module %d\n",
276 ev->fixed.module_id);
277 break;
278 }
279
280 if (!ring) {
281 ret = -EINVAL;
282 goto rcu_unlock;
283 }
284
285 srng = &ab->hal.srng_list[ring->refill_srng.ring_id];
286 num_entry = ev->fixed.num_buf_release_entry;
287 size = sizeof(*buff) + ring->buf_sz + ring->buf_align - 1;
288 num_buff_reaped = 0;
289
290 spin_lock_bh(&srng->lock);
291
292 while (num_buff_reaped < num_entry) {
293 desc.info0 = ev->buf_entry[num_buff_reaped].paddr_lo;
294 desc.info1 = ev->buf_entry[num_buff_reaped].paddr_hi;
295 handler_data.meta = ev->meta_data[num_buff_reaped];
296
297 num_buff_reaped++;
298
299 ath11k_hal_rx_buf_addr_info_get(&desc, &paddr, &cookie, &rbm);
300
301 buf_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_BUF_ID, cookie);
302
303 spin_lock_bh(&ring->idr_lock);
304 buff = idr_find(&ring->bufs_idr, buf_id);
305 if (!buff) {
306 spin_unlock_bh(&ring->idr_lock);
307 continue;
308 }
309 idr_remove(&ring->bufs_idr, buf_id);
310 spin_unlock_bh(&ring->idr_lock);
311
312 dma_unmap_single(ab->dev, buff->paddr, ring->buf_sz,
313 DMA_FROM_DEVICE);
314
315 if (ring->handler) {
316 vaddr_unalign = buff->payload;
317 handler_data.data = PTR_ALIGN(vaddr_unalign,
318 ring->buf_align);
319 handler_data.data_sz = ring->buf_sz;
320
321 ring->handler(ar, &handler_data);
322 }
323
324 memset(buff, 0, size);
325 ath11k_dbring_bufs_replenish(ar, ring, buff, GFP_ATOMIC);
326 }
327
328 spin_unlock_bh(&srng->lock);
329
330rcu_unlock:
331 rcu_read_unlock();
332
333 return ret;
334}
335
336void ath11k_dbring_srng_cleanup(struct ath11k *ar, struct ath11k_dbring *ring)
337{
338 ath11k_dp_srng_cleanup(ar->ab, &ring->refill_srng);
339}
340
341void ath11k_dbring_buf_cleanup(struct ath11k *ar, struct ath11k_dbring *ring)
342{
343 struct ath11k_dbring_element *buff;
344 int buf_id;
345
346 spin_lock_bh(&ring->idr_lock);
347 idr_for_each_entry(&ring->bufs_idr, buff, buf_id) {
348 idr_remove(&ring->bufs_idr, buf_id);
349 dma_unmap_single(ar->ab->dev, buff->paddr,
350 ring->buf_sz, DMA_FROM_DEVICE);
351 kfree(buff);
352 }
353
354 idr_destroy(&ring->bufs_idr);
355 spin_unlock_bh(&ring->idr_lock);
356}
357
